skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036288/0748   Pages: 247
Recorded: 08/06/2015
Attorney Dkt #:70341.00400
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1836
Page 10 of 19
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1
Patent #:
8080867
Issue Dt:
12/20/2011
Application #:
12608587
Filing Dt:
10/29/2009
Publication #:
US20110101542
Pub Dt:
05/05/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT AND METHOD OF MANUFACTURE THEREOF
2
Patent #:
8173536
Issue Dt:
05/08/2012
Application #:
12610763
Filing Dt:
11/02/2009
Publication #:
US20110101518
Pub Dt:
05/05/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING COLUMN INTERCONNECT STRUCTURE TO REDUCE WAFER STRESS
3
Patent #:
8008121
Issue Dt:
08/30/2011
Application #:
12612365
Filing Dt:
11/04/2009
Publication #:
US20110101512
Pub Dt:
05/05/2011
Title:
SEMICONDUCTOR PACKAGE AND METHOD OF MOUNTING SEMICONDUCTOR DIE TO OPPOSITE SIDES OF TSV SUBSTRATE
4
Patent #:
8617924
Issue Dt:
12/31/2013
Application #:
12612603
Filing Dt:
11/04/2009
Publication #:
US20100044849
Pub Dt:
02/25/2010
Title:
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF
5
Patent #:
7863726
Issue Dt:
01/04/2011
Application #:
12612630
Filing Dt:
11/04/2009
Publication #:
US20100052150
Pub Dt:
03/04/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE SUBSTRATE HAVING CORNER CONTACTS AND METHOD OF MANUFACTURE THEREOF
6
Patent #:
8916452
Issue Dt:
12/23/2014
Application #:
12612938
Filing Dt:
11/05/2009
Publication #:
US20100127360
Pub Dt:
05/27/2010
Title:
Semiconductor Device and Method of Forming WLCSP Using Wafer Sections Containing Multiple Die
7
Patent #:
7915738
Issue Dt:
03/29/2011
Application #:
12615195
Filing Dt:
11/09/2009
Publication #:
US20100052117
Pub Dt:
03/04/2010
Title:
STACKABLE MULTI-CHIP PACKAGE SYSTEM WITH SUPPORT STRUCTURE
8
Patent #:
7923295
Issue Dt:
04/12/2011
Application #:
12615428
Filing Dt:
11/10/2009
Publication #:
US20100052135
Pub Dt:
03/04/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE DEVICE USING SACRIFICIAL CARRIER
9
Patent #:
9136144
Issue Dt:
09/15/2015
Application #:
12617877
Filing Dt:
11/13/2009
Publication #:
US20110115070
Pub Dt:
05/19/2011
Title:
Method of Forming Protective Material Between Semiconductor Die Stacked on Semiconductor Wafer to Reduce Defects During Singulation
10
Patent #:
8304921
Issue Dt:
11/06/2012
Application #:
12618417
Filing Dt:
11/13/2009
Publication #:
US20110115065
Pub Dt:
05/19/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
11
Patent #:
8158510
Issue Dt:
04/17/2012
Application #:
12621738
Filing Dt:
11/19/2009
Publication #:
US20110115050
Pub Dt:
05/19/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING IPD ON MOLDED SUBSTRATE
12
Patent #:
7838899
Issue Dt:
11/23/2010
Application #:
12623351
Filing Dt:
11/20/2009
Publication #:
US20100065936
Pub Dt:
03/18/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH IMAGE SENSOR SYSTEM
13
Patent #:
8129841
Issue Dt:
03/06/2012
Application #:
12624482
Filing Dt:
11/24/2009
Publication #:
US20100065966
Pub Dt:
03/18/2010
Title:
SOLDER JOINT FLIP CHIP INTERCONNECTION
14
Patent #:
8034661
Issue Dt:
10/11/2011
Application #:
12625975
Filing Dt:
11/25/2009
Publication #:
US20110121449
Pub Dt:
05/26/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPLIANT STRESS RELIEF BUFFER AROUND LARGE ARRAY WLCSP
15
Patent #:
7859085
Issue Dt:
12/28/2010
Application #:
12627884
Filing Dt:
11/30/2009
Publication #:
US20100072570
Pub Dt:
03/25/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING EMBEDDED PASSIVE CIRCUIT ELEMENTS INTERCONNECTED TO THROUGH HOLE VIAS
16
Patent #:
8575018
Issue Dt:
11/05/2013
Application #:
12628631
Filing Dt:
12/01/2009
Publication #:
US20120299176
Pub Dt:
11/29/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING BUMP STRUCTURE WITH MULTI-LAYER UBM AROUND BUMP FORMATION AREA
17
Patent #:
8334171
Issue Dt:
12/18/2012
Application #:
12629877
Filing Dt:
12/02/2009
Publication #:
US20110127653
Pub Dt:
06/02/2011
Title:
PACKAGE SYSTEM WITH A SHIELDED INVERTED INTERNAL STACKING MODULE AND METHOD OF MANUFACTURE THEREOF
18
Patent #:
8766428
Issue Dt:
07/01/2014
Application #:
12629879
Filing Dt:
12/02/2009
Publication #:
US20110127661
Pub Dt:
06/02/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLIP CHIP AND METHOD OF MANUFACTURE THEREOF
19
Patent #:
8518752
Issue Dt:
08/27/2013
Application #:
12629881
Filing Dt:
12/02/2009
Publication #:
US20110127662
Pub Dt:
06/02/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKABLE PACKAGE AND METHOD OF MANUFACTURE THEREOF
20
Patent #:
7786575
Issue Dt:
08/31/2010
Application #:
12631476
Filing Dt:
12/04/2009
Publication #:
US20100078794
Pub Dt:
04/01/2010
Title:
STACKED DIE SEMICONDUCTOR DEVICE HAVING CIRCUIT TAPE
21
Patent #:
8198186
Issue Dt:
06/12/2012
Application #:
12633531
Filing Dt:
12/08/2009
Publication #:
US20100164097
Pub Dt:
07/01/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL DURING REFLOW WITH SOLDER MASK PATCH
22
Patent #:
8115293
Issue Dt:
02/14/2012
Application #:
12633789
Filing Dt:
12/08/2009
Publication #:
US20110133325
Pub Dt:
06/09/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
23
Patent #:
7958628
Issue Dt:
06/14/2011
Application #:
12635536
Filing Dt:
12/10/2009
Publication #:
US20100083494
Pub Dt:
04/08/2010
Title:
BONDING TOOL FOR MOUNTING SEMICONDUCTOR CHIPS
24
Patent #:
8283209
Issue Dt:
10/09/2012
Application #:
12635631
Filing Dt:
12/10/2009
Publication #:
US20110140263
Pub Dt:
06/16/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PIP WITH INNER KNOWN GOOD DIE INTERCONNECTED WITH CONDUCTIVE BUMPS
25
Patent #:
8212342
Issue Dt:
07/03/2012
Application #:
12635695
Filing Dt:
12/10/2009
Publication #:
US20110140251
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HAVING PLATED TERMINAL LEADS AND METHOD OF MANUFACTURE THEREOF
26
Patent #:
8115287
Issue Dt:
02/14/2012
Application #:
12635699
Filing Dt:
12/10/2009
Publication #:
US20110140252
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL ROW LEAD-FRAME HAVING TOP AND BOTTOM TERMINALS AND METHOD OF MANUFACTURE THEREOF
27
Patent #:
8344495
Issue Dt:
01/01/2013
Application #:
12636696
Filing Dt:
12/11/2009
Publication #:
US20110140261
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
28
Patent #:
8304286
Issue Dt:
11/06/2012
Application #:
12636703
Filing Dt:
12/11/2009
Publication #:
US20110140247
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDED PACKAGE AND METHOD OF MANUFACTURE THEREOF
29
Patent #:
8404518
Issue Dt:
03/26/2013
Application #:
12636779
Filing Dt:
12/13/2009
Publication #:
US20110140258
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
30
Patent #:
8304337
Issue Dt:
11/06/2012
Application #:
12637746
Filing Dt:
12/14/2009
Publication #:
US20110140287
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BOND WIRE PADS AND METHOD OF MANUFACTURE THEREOF
31
Patent #:
8390108
Issue Dt:
03/05/2013
Application #:
12639984
Filing Dt:
12/16/2009
Publication #:
US20110140259
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKING INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
32
Patent #:
8653654
Issue Dt:
02/18/2014
Application #:
12639990
Filing Dt:
12/16/2009
Publication #:
US20110140283
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A STACKABLE PACKAGE AND METHOD OF MANUFACTURE THEREOF
33
Patent #:
8476775
Issue Dt:
07/02/2013
Application #:
12639997
Filing Dt:
12/17/2009
Publication #:
US20110147906
Pub Dt:
06/23/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
34
Patent #:
8288844
Issue Dt:
10/16/2012
Application #:
12641319
Filing Dt:
12/17/2009
Publication #:
US20110147901
Pub Dt:
06/23/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
35
Patent #:
8080882
Issue Dt:
12/20/2011
Application #:
12641958
Filing Dt:
12/18/2009
Publication #:
US20100096731
Pub Dt:
04/22/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED-DOWN RDL AND RECESSED THV IN PERIPHERAL REGION OF THE DEVICE
36
Patent #:
8216930
Issue Dt:
07/10/2012
Application #:
12643180
Filing Dt:
12/21/2009
Publication #:
US20100099222
Pub Dt:
04/22/2010
Title:
SOLDER JOINT FLIP CHIP INTERCONNECTION HAVING RELIEF STRUCTURE
37
Patent #:
7968445
Issue Dt:
06/28/2011
Application #:
12651758
Filing Dt:
01/04/2010
Publication #:
US20100105200
Pub Dt:
04/29/2010
Title:
SEMICONDUCTOR PACKAGE WITH PASSIVATION ISLAND FOR REDUCING STRESS ON SOLDER BUMPS
38
Patent #:
9343429
Issue Dt:
05/17/2016
Application #:
12683008
Filing Dt:
01/06/2010
Publication #:
US20100102456
Pub Dt:
04/29/2010
Title:
Semiconductor Device and Method of Forming Double-Sided Through Vias in Saw Streets
39
Patent #:
NONE
Issue Dt:
Application #:
12688124
Filing Dt:
01/15/2010
Publication #:
US20100117230
Pub Dt:
05/13/2010
Title:
Flip Chip Interconnection Structure Having Void-Free Fine Pitch and Method Thereof
40
Patent #:
7919838
Issue Dt:
04/05/2011
Application #:
12690092
Filing Dt:
01/19/2010
Publication #:
US20100117205
Pub Dt:
05/13/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ENCAPSULATION LOCK AND METHOD OF MANUFACTURE THEREOF
41
Patent #:
8138014
Issue Dt:
03/20/2012
Application #:
12696923
Filing Dt:
01/29/2010
Publication #:
US20110186977
Pub Dt:
08/04/2011
Title:
METHOD OF FORMING THIN PROFILE WLCSP WITH VERTICAL INTERCONNECT OVER PACKAGE FOOTPRINT
42
Patent #:
8368187
Issue Dt:
02/05/2013
Application #:
12699431
Filing Dt:
02/03/2010
Publication #:
US20110186973
Pub Dt:
08/04/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING AIR GAP ADJACENT TO STRESS SENSITIVE REGION OF THE DIE
43
Patent #:
8574960
Issue Dt:
11/05/2013
Application #:
12699482
Filing Dt:
02/03/2010
Publication #:
US20110187005
Pub Dt:
08/04/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CAVITY ADJACENT TO SENSITIVE REGION OF SEMICONDUCTOR DIE USING WAFER-LEVEL UNDERFILL MATERIAL
44
Patent #:
8304904
Issue Dt:
11/06/2012
Application #:
12700114
Filing Dt:
02/04/2010
Publication #:
US20100133687
Pub Dt:
06/03/2010
Title:
SEMICONDUCTOR DEVICE WITH SOLDER BUMP FORMED ON HIGH TOPOGRAPHY PLATED CU PADS
45
Patent #:
8097496
Issue Dt:
01/17/2012
Application #:
12703450
Filing Dt:
02/10/2010
Publication #:
US20100144100
Pub Dt:
06/10/2010
Title:
METHOD OF FORMING QUAD FLAT PACKAGE
46
Patent #:
8097935
Issue Dt:
01/17/2012
Application #:
12703461
Filing Dt:
02/10/2010
Publication #:
US20100140761
Pub Dt:
06/10/2010
Title:
QUAD FLAT PACKAGE
47
Patent #:
8716853
Issue Dt:
05/06/2014
Application #:
12704345
Filing Dt:
02/11/2010
Publication #:
US20100140799
Pub Dt:
06/10/2010
Title:
Extended Redistribution Layers Bumped Wafer
48
Patent #:
8310058
Issue Dt:
11/13/2012
Application #:
12704366
Filing Dt:
02/11/2010
Publication #:
US20100140737
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING PASSIVE CIRCUIT ELEMENTS WITH THROUGH SILICON VIAS TO BACKSIDE INTERCONNECT STRUCTURES
49
Patent #:
8111112
Issue Dt:
02/07/2012
Application #:
12705790
Filing Dt:
02/15/2010
Publication #:
US20100140738
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPACT COILS FOR HIGH PERFORMANCE FILTER
50
Patent #:
8111113
Issue Dt:
02/07/2012
Application #:
12705810
Filing Dt:
02/15/2010
Publication #:
US20100140742
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THIN FILM CAPACITOR
51
Patent #:
8497575
Issue Dt:
07/30/2013
Application #:
12710359
Filing Dt:
02/22/2010
Publication #:
US20110204508
Pub Dt:
08/25/2011
Title:
SEMICONDUCTOR PACKAGING SYSTEM WITH AN ALIGNED INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
52
Patent #:
8822281
Issue Dt:
09/02/2014
Application #:
12710995
Filing Dt:
02/23/2010
Publication #:
US20110204505
Pub Dt:
08/25/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING TMV AND TSV IN WLCSP USING SAME CARRIER
53
Patent #:
8314486
Issue Dt:
11/20/2012
Application #:
12711250
Filing Dt:
02/23/2010
Publication #:
US20110204494
Pub Dt:
08/25/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELD AND METHOD OF MANUFACTURE THEREOF
54
Patent #:
8241952
Issue Dt:
08/14/2012
Application #:
12713018
Filing Dt:
02/25/2010
Publication #:
US20110204509
Pub Dt:
08/25/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING IPD IN FAN-OUT LEVEL CHIP SCALE PACKAGE
55
Patent #:
9875911
Issue Dt:
01/23/2018
Application #:
12714190
Filing Dt:
02/26/2010
Publication #:
US20110068459
Pub Dt:
03/24/2011
Title:
Semiconductor Device and Method of Forming Interposer with Opening to Contain Semiconductor Die
56
Patent #:
9299648
Issue Dt:
03/29/2016
Application #:
12714291
Filing Dt:
02/26/2010
Publication #:
US20100224974
Pub Dt:
09/09/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PATTERNED SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
57
Patent #:
8067306
Issue Dt:
11/29/2011
Application #:
12714320
Filing Dt:
02/26/2010
Publication #:
US20110210437
Pub Dt:
09/01/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EXPOSED CONDUCTOR AND METHOD OF MANUFACTURE THEREOF
58
Patent #:
8624364
Issue Dt:
01/07/2014
Application #:
12714431
Filing Dt:
02/26/2010
Publication #:
US20110210436
Pub Dt:
09/01/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATED CONNECTOR AND METHOD OF MANUFACTURE THEREOF
59
Patent #:
8143107
Issue Dt:
03/27/2012
Application #:
12715910
Filing Dt:
03/02/2010
Publication #:
US20100155926
Pub Dt:
06/24/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM FOR FINE PITCH SUBSTRATES AND METHOD OF MANUFACTURE THEREOF
60
Patent #:
9355939
Issue Dt:
05/31/2016
Application #:
12716269
Filing Dt:
03/02/2010
Publication #:
US20110215448
Pub Dt:
09/08/2011
Title:
INTEGRATED CIRCUIT PACKAGE STACKING SYSTEM WITH SHIELDING AND METHOD OF MANUFACTURE THEREOF
61
Patent #:
8420950
Issue Dt:
04/16/2013
Application #:
12716271
Filing Dt:
03/02/2010
Publication #:
US20110214911
Pub Dt:
09/08/2011
Title:
CIRCUIT SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF
62
Patent #:
7973406
Issue Dt:
07/05/2011
Application #:
12716455
Filing Dt:
03/03/2010
Publication #:
US20100164100
Pub Dt:
07/01/2010
Title:
BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
63
Patent #:
8421202
Issue Dt:
04/16/2013
Application #:
12717085
Filing Dt:
03/03/2010
Publication #:
US20100224978
Pub Dt:
09/09/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLEX TAPE AND METHOD OF MANUFACTURE THEREOF
64
Patent #:
9922955
Issue Dt:
03/20/2018
Application #:
12717335
Filing Dt:
03/04/2010
Publication #:
US20110215458
Pub Dt:
09/08/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PACKAGE-ON-PACKAGE STRUCTURE ELECTRICALLY INTERCONNECTED THROUGH TSV IN WLCSP
65
Patent #:
NONE
Issue Dt:
Application #:
12718939
Filing Dt:
03/05/2010
Publication #:
US20110215450
Pub Dt:
09/08/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
66
Patent #:
9006882
Issue Dt:
04/14/2015
Application #:
12719398
Filing Dt:
03/08/2010
Publication #:
US20100155922
Pub Dt:
06/24/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING RECESSED CONDUCTIVE VIAS IN SAW STREETS
67
Patent #:
8241956
Issue Dt:
08/14/2012
Application #:
12719476
Filing Dt:
03/08/2010
Publication #:
US20110215449
Pub Dt:
09/08/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING WAFER LEVEL MULTI-ROW ETCHED LEAD PACKAGE
68
Patent #:
8039384
Issue Dt:
10/18/2011
Application #:
12720029
Filing Dt:
03/09/2010
Publication #:
US20110221058
Pub Dt:
09/15/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON DIFFERENT HEIGHT TRACES
69
Patent #:
8409926
Issue Dt:
04/02/2013
Application #:
12720057
Filing Dt:
03/09/2010
Publication #:
US20110221041
Pub Dt:
09/15/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE
70
Patent #:
8541886
Issue Dt:
09/24/2013
Application #:
12720667
Filing Dt:
03/09/2010
Publication #:
US20110221072
Pub Dt:
09/15/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VIA AND METHOD OF MANUFACTURE THEREOF
71
Patent #:
7928552
Issue Dt:
04/19/2011
Application #:
12722759
Filing Dt:
03/12/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI-TIER CONDUCTIVE INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
72
Patent #:
9496152
Issue Dt:
11/15/2016
Application #:
12722852
Filing Dt:
03/12/2010
Publication #:
US20110220395
Pub Dt:
09/15/2011
Title:
CARRIER SYSTEM WITH MULTI-TIER CONDUCTIVE POSTS AND METHOD OF MANUFACTURE THEREOF
73
Patent #:
8633056
Issue Dt:
01/21/2014
Application #:
12723596
Filing Dt:
03/12/2010
Publication #:
US20100171228
Pub Dt:
07/08/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF
74
Patent #:
8951839
Issue Dt:
02/10/2015
Application #:
12724354
Filing Dt:
03/15/2010
Publication #:
US20110221054
Pub Dt:
09/15/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE VIAS THROUGH INTERCONNECT STRUCTURES AND ENCAPSULANT OF WLCSP
75
Patent #:
8343809
Issue Dt:
01/01/2013
Application #:
12724367
Filing Dt:
03/15/2010
Publication #:
US20110221055
Pub Dt:
09/15/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING REPASSIVATION LAYER WITH REDUCED OPENING TO CONTACT PAD OF SEMICONDUCTOR DIE
76
Patent #:
8420508
Issue Dt:
04/16/2013
Application #:
12726342
Filing Dt:
03/17/2010
Publication #:
US20110227211
Pub Dt:
09/22/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BUMP CONTACT ON PACKAGE LEADS AND METHOD OF MANUFACTURE THEREOF
77
Patent #:
8791006
Issue Dt:
07/29/2014
Application #:
12726880
Filing Dt:
03/18/2010
Publication #:
US20130181323
Pub Dt:
07/18/2013
Title:
Semiconductor Device and Method of Forming an Inductor on Polymer Matrix Composite Substrate
78
Patent #:
8299595
Issue Dt:
10/30/2012
Application #:
12727229
Filing Dt:
03/18/2010
Publication #:
US20110227209
Pub Dt:
09/22/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
79
Patent #:
8304922
Issue Dt:
11/06/2012
Application #:
12729204
Filing Dt:
03/22/2010
Publication #:
US20100176503
Pub Dt:
07/15/2010
Title:
SEMICONDUCTOR PACKAGE SYSTEM WITH THERMAL DIE BONDING
80
Patent #:
8569869
Issue Dt:
10/29/2013
Application #:
12729841
Filing Dt:
03/23/2010
Publication #:
US20110233736
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
81
Patent #:
7868434
Issue Dt:
01/11/2011
Application #:
12730171
Filing Dt:
03/23/2010
Publication #:
US20100176497
Pub Dt:
07/15/2010
Title:
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM
82
Patent #:
8643181
Issue Dt:
02/04/2014
Application #:
12730989
Filing Dt:
03/24/2010
Publication #:
US20110233751
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
83
Patent #:
8981577
Issue Dt:
03/17/2015
Application #:
12731045
Filing Dt:
03/24/2010
Publication #:
US20110233748
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
84
Patent #:
8525350
Issue Dt:
09/03/2013
Application #:
12731330
Filing Dt:
03/25/2010
Publication #:
US20100176510
Pub Dt:
07/15/2010
Title:
FUSIBLE I/O INTERCONNECTION SYSTEMS AND METHODS FOR FLIP-CHIP PACKAGING INVOLVING SUBSTRATE-MOUNTED STUD BUMPS
85
Patent #:
8193035
Issue Dt:
06/05/2012
Application #:
12731354
Filing Dt:
03/25/2010
Publication #:
US20100178735
Pub Dt:
07/15/2010
Title:
FUSIBLE I/O INTERCONNECTION SYSTEMS AND METHODS FOR FLIP-CHIP PACKAGING INVOLVING SUBSTRATE-MOUNTED STUD BUMPS
86
Patent #:
8492887
Issue Dt:
07/23/2013
Application #:
12731472
Filing Dt:
03/25/2010
Publication #:
US20110233743
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME AND METHOD OF MANUFACTURE THEREOF
87
Patent #:
8378476
Issue Dt:
02/19/2013
Application #:
12731870
Filing Dt:
03/25/2010
Publication #:
US20110233747
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKING OPTION AND METHOD OF MANUFACTURE THEREOF
88
Patent #:
8138595
Issue Dt:
03/20/2012
Application #:
12732423
Filing Dt:
03/26/2010
Publication #:
US20110233752
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERMEDIATE PAD AND METHOD OF MANUFACTURE THEREOF
89
Patent #:
8203201
Issue Dt:
06/19/2012
Application #:
12732465
Filing Dt:
03/26/2010
Publication #:
US20110233753
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF
90
Patent #:
8304919
Issue Dt:
11/06/2012
Application #:
12748335
Filing Dt:
03/26/2010
Publication #:
US20110233763
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT SYSTEM WITH STRESS REDISTRIBUTION LAYER AND METHOD OF MANUFACTURE THEREOF
91
Patent #:
8791775
Issue Dt:
07/29/2014
Application #:
12750517
Filing Dt:
03/30/2010
Publication #:
US20110241163
Pub Dt:
10/06/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH-ATTENUATION BALANCED BAND-PASS FILTER
92
Patent #:
8269575
Issue Dt:
09/18/2012
Application #:
12750555
Filing Dt:
03/30/2010
Publication #:
US20110241793
Pub Dt:
10/06/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING RF BALUN HAVING REDUCED CAPACITIVE COUPLING AND HIGH CMRR
93
Patent #:
8466557
Issue Dt:
06/18/2013
Application #:
12756067
Filing Dt:
04/07/2010
Publication #:
US20100193226
Pub Dt:
08/05/2010
Title:
SOLDER BUMP CONFINEMENT SYSTEM FOR AN INTEGRATED CIRCUIT PACKAGE
94
Patent #:
9847253
Issue Dt:
12/19/2017
Application #:
12757750
Filing Dt:
04/09/2010
Publication #:
US20120199963
Pub Dt:
08/09/2012
Title:
PACKAGE-ON-PACKAGE USING THROUGH-HOLE VIA DIE ON SAW STREETS
95
Patent #:
8318537
Issue Dt:
11/27/2012
Application #:
12757889
Filing Dt:
04/09/2010
Publication #:
US20120211880
Pub Dt:
08/23/2012
Title:
FLIP CHIP INTERCONNECTION HAVING NARROW INTERCONNECTION SITES ON THE SUBSTRATE
96
Patent #:
8018041
Issue Dt:
09/13/2011
Application #:
12759158
Filing Dt:
04/13/2010
Publication #:
US20100193926
Pub Dt:
08/05/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKED DIE
97
Patent #:
8574964
Issue Dt:
11/05/2013
Application #:
12760428
Filing Dt:
04/14/2010
Publication #:
US20110254146
Pub Dt:
10/20/2011
Title:
Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape
98
Patent #:
7923822
Issue Dt:
04/12/2011
Application #:
12762602
Filing Dt:
04/19/2010
Publication #:
US20100200967
Pub Dt:
08/12/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING SHIELD
99
Patent #:
NONE
Issue Dt:
Application #:
12763378
Filing Dt:
04/20/2010
Publication #:
US20120211881
Pub Dt:
08/23/2012
Title:
Semiconductor Device and Method of Protecting Passivation Layer in a Solder Bump Process
100
Patent #:
8120183
Issue Dt:
02/21/2012
Application #:
12763386
Filing Dt:
04/20/2010
Publication #:
US20100200951
Pub Dt:
08/12/2010
Title:
METHOD OF FORMING TOP ELECTRODE FOR CAPACITOR AND INTERCONNECTION IN INTEGRATED PASSIVE DEVICE (IPD)
Assignors
1
STATS CHIPPAC, INC.
Exec Dt:
08/06/2015
2
STATS CHIPPAC LTD.
Exec Dt:
08/06/2015
Assignee
1
CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
39TH FLOOR, CITIBANK TOWER, CITIBANK PLAZA, 3 GARDEN ROAD
ATTENTION: AGENCY AND TRUST
CENTRAL, HONG KONG
Correspondence name and address
LAWRENCE KASS
28 LIBERTY STREET
C/O LAWRENCE KASS
NEW YORK, NY 10005

Search Results as of: 05/25/2024 08:23 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT