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Patent #:
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Issue Dt:
|
11/29/2016
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Application #:
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13929775
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Filing Dt:
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06/27/2013
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Publication #:
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Pub Dt:
|
01/01/2015
| | | | |
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Title:
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METHODS OF FORMING CONDUCTIVE JUMPER TRACES
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Patent #:
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Issue Dt:
|
08/02/2016
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Application #:
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13929776
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Filing Dt:
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06/27/2013
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Publication #:
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|
Pub Dt:
|
01/01/2015
| | | | |
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Title:
|
Methods of Forming Conductive and Insulating Layers
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Patent #:
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Issue Dt:
|
06/14/2016
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Application #:
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13930980
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Filing Dt:
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06/28/2013
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Publication #:
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|
Pub Dt:
|
01/01/2015
| | | | |
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Title:
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Semiconductor Device and Method of Using Substrate With Conductive Posts and Protective Layers to Form Embedded Sensor Die Package
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Patent #:
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Issue Dt:
|
02/10/2015
|
Application #:
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13931295
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Filing Dt:
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06/28/2013
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Title:
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METHODS OF FORMING SOLDER BALLS IN SEMICONDUCTOR PACKAGES
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Patent #:
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Issue Dt:
|
03/17/2015
|
Application #:
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13931397
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Filing Dt:
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06/28/2013
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Publication #:
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Pub Dt:
|
01/01/2015
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING LOW PROFILE 3D FAN-OUT PACKAGE
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Patent #:
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Issue Dt:
|
03/17/2015
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Application #:
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13931397
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Filing Dt:
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06/28/2013
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|
Publication #:
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Pub Dt:
|
01/01/2015
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING LOW PROFILE 3D FAN-OUT PACKAGE
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Patent #:
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Issue Dt:
|
09/13/2016
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Application #:
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13933406
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Filing Dt:
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07/02/2013
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Publication #:
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Pub Dt:
|
10/31/2013
| | | | |
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Title:
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Semiconductor Device and Method of Forming a Thin Wafer Without a Carrier
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Patent #:
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Issue Dt:
|
01/20/2015
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Application #:
|
13934797
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Filing Dt:
|
07/03/2013
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TRENCHED LEADFRAME AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
07/05/2016
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Application #:
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13935053
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Filing Dt:
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07/03/2013
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Publication #:
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Pub Dt:
|
11/07/2013
| | | | |
|
Title:
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SEMICONDUCTOR PACKAGE WITH EMBEDDED DIE
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Patent #:
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Issue Dt:
|
01/20/2015
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Application #:
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13935312
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Filing Dt:
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07/03/2013
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Publication #:
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|
Pub Dt:
|
11/07/2013
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE DISPOSED IN A CAVITY OF AN INTERCONNECT STRUCTURE AND GROUNDED THROUGH THE DIE TSV
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Patent #:
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Issue Dt:
|
01/20/2015
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Application #:
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13935312
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Filing Dt:
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07/03/2013
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Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE DISPOSED IN A CAVITY OF AN INTERCONNECT STRUCTURE AND GROUNDED THROUGH THE DIE TSV
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Patent #:
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Issue Dt:
|
09/02/2014
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Application #:
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13935963
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Filing Dt:
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07/05/2013
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Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
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Title:
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Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant
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Patent #:
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Issue Dt:
|
09/02/2014
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Application #:
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13935963
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Filing Dt:
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07/05/2013
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|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant
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Patent #:
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Issue Dt:
|
09/05/2017
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Application #:
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13936099
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Filing Dt:
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07/05/2013
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|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING TSV SEMICONDUCTOR WAFER WITH EMBEDDED SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
|
08/30/2016
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Application #:
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13937849
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Filing Dt:
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07/09/2013
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|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PENETRABLE FILM ENCAPSULANT AROUND SEMICONDUCTOR DIE AND INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
|
02/09/2021
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Application #:
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13937952
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Filing Dt:
|
07/09/2013
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|
Publication #:
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|
Pub Dt:
|
11/07/2013
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Reconstituted Wafer with Larger Carrier to Achieve More EWLB Packages per Wafer with Encapsulant Deposited Under Temperature and Pressure
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Patent #:
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Issue Dt:
|
02/09/2016
|
Application #:
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13939044
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Filing Dt:
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07/10/2013
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|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Guard Ring Around Conductive TSV Through Semiconductor Wafer
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|
Patent #:
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Issue Dt:
|
10/06/2015
|
Application #:
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13943735
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Filing Dt:
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07/16/2013
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Publication #:
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|
Pub Dt:
|
11/14/2013
| | | | |
|
Title:
|
Semiconductor Die and Method of Forming FO-WLCSP Vertical Interconnect Using TSV and TMV
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|
Patent #:
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|
Issue Dt:
|
02/16/2016
|
Application #:
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13943737
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Filing Dt:
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07/16/2013
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|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
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Patent #:
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Issue Dt:
|
05/03/2016
|
Application #:
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13944783
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Filing Dt:
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07/17/2013
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Publication #:
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|
Pub Dt:
|
11/14/2013
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material
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Patent #:
|
NONE
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Issue Dt:
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Application #:
|
13944825
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Filing Dt:
|
07/17/2013
|
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Interposer with Opening to Contain Semiconductor Die
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Patent #:
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Issue Dt:
|
02/02/2016
|
Application #:
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13950122
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Filing Dt:
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07/24/2013
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Publication #:
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|
Pub Dt:
|
01/29/2015
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH MOLD HOLE WITH ALIGNMENT AND DIMENSION CONTROL
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Patent #:
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Issue Dt:
|
03/20/2018
|
Application #:
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13965356
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Filing Dt:
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08/13/2013
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Publication #:
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|
Pub Dt:
|
12/12/2013
| | | | |
|
Title:
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Bump-on-Lead Flip Chip Interconnection
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Patent #:
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Issue Dt:
|
03/07/2017
|
Application #:
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14011491
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Filing Dt:
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08/27/2013
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Publication #:
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|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A WAFER LEVEL PACKAGE WITH TOP AND BOTTOM SOLDER BUMP INTERCONNECTION
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Patent #:
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Issue Dt:
|
06/02/2015
|
Application #:
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14017963
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Filing Dt:
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09/04/2013
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Publication #:
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|
Pub Dt:
|
01/02/2014
| | | | |
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Title:
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Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation
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Patent #:
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Issue Dt:
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06/02/2015
|
Application #:
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14017963
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Filing Dt:
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09/04/2013
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Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation
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Patent #:
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Issue Dt:
|
03/10/2015
|
Application #:
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14018282
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Filing Dt:
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09/04/2013
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE HAVING BALANCED BAND-PASS FILTER IMPLEMENTED WITH LC RESONATORS
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Patent #:
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Issue Dt:
|
03/10/2015
|
Application #:
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14018282
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Filing Dt:
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09/04/2013
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE HAVING BALANCED BAND-PASS FILTER IMPLEMENTED WITH LC RESONATORS
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Patent #:
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Issue Dt:
|
07/22/2014
|
Application #:
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14020996
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Filing Dt:
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09/09/2013
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Publication #:
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|
Pub Dt:
|
01/02/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
|
07/22/2014
|
Application #:
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14020996
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
|
01/02/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
|
11/18/2014
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Application #:
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14021056
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Filing Dt:
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09/09/2013
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Publication #:
|
|
Pub Dt:
|
01/09/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Interconnect Structure Over Seed Layer on Contact Pad of Semiconductor Die Without Undercutting Seed Layer Beneath Interconnect Structure
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Patent #:
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Issue Dt:
|
11/18/2014
|
Application #:
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14021056
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Filing Dt:
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09/09/2013
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Publication #:
|
|
Pub Dt:
|
01/09/2014
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Interconnect Structure Over Seed Layer on Contact Pad of Semiconductor Die Without Undercutting Seed Layer Beneath Interconnect Structure
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Patent #:
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Issue Dt:
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06/13/2017
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Application #:
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14021206
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Filing Dt:
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09/09/2013
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Publication #:
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|
Pub Dt:
|
01/09/2014
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CAVITY ADJACENT TO SENSITIVE REGION OF SEMICONDUCTOR DIE USING WAFER-LEVEL UNDERFILL MATERIAL
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Patent #:
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Issue Dt:
|
07/19/2016
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Application #:
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14021208
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Filing Dt:
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09/09/2013
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Publication #:
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Pub Dt:
|
01/09/2014
| | | | |
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Title:
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Optical Semiconductor Device Having Pre-Molded Leadframe with Window and Method Therefor
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14021740
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Filing Dt:
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09/09/2013
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Publication #:
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|
Pub Dt:
|
01/09/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape
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Patent #:
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Issue Dt:
|
06/23/2015
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Application #:
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14021914
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Filing Dt:
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09/09/2013
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Publication #:
|
|
Pub Dt:
|
01/09/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Bump-on-Lead Interconnection
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Patent #:
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Issue Dt:
|
06/23/2015
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Application #:
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14021914
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Filing Dt:
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09/09/2013
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Publication #:
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|
Pub Dt:
|
01/09/2014
| | | | |
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Title:
|
Semiconductor Device and Method of Forming Bump-on-Lead Interconnection
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Patent #:
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Issue Dt:
|
09/17/2019
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Application #:
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14035726
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Filing Dt:
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09/24/2013
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Publication #:
|
|
Pub Dt:
|
03/26/2015
| | | | |
|
Title:
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Semiconductor Device and Method of Forming Dual Fan-Out Semiconductor Package
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Patent #:
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Issue Dt:
|
03/28/2017
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Application #:
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14036193
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Filing Dt:
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09/25/2013
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Publication #:
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|
Pub Dt:
|
03/26/2015
| | | | |
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Title:
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Semiconductor Device and Method of Controlling Warpage in Reconstituted Wafer
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Patent #:
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Issue Dt:
|
08/01/2017
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Application #:
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14036525
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Filing Dt:
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09/25/2013
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Publication #:
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|
Pub Dt:
|
07/03/2014
| | | | |
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Title:
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Semiconductor Device and Method of Using a Standardized Carrier to Form Embedded Wafer Level Chip Scale Packages
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Patent #:
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Issue Dt:
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07/28/2015
|
Application #:
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14037110
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Filing Dt:
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09/25/2013
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Publication #:
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|
Pub Dt:
|
03/26/2015
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SPREADER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
01/26/2016
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Application #:
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14038339
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Filing Dt:
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09/26/2013
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Publication #:
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|
Pub Dt:
|
06/26/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF SIMULTANEOUS MOLDING AND THERMALCOMPRESSION BONDING
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Patent #:
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Issue Dt:
|
07/11/2017
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Application #:
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14038575
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Filing Dt:
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09/26/2013
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Publication #:
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|
Pub Dt:
|
06/12/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Low Profile Fan-Out Package with Vertical Interconnection Units
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Patent #:
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Issue Dt:
|
08/11/2015
|
Application #:
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14038577
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Filing Dt:
|
09/26/2013
|
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE TRACES AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
03/15/2016
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Application #:
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14039092
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Filing Dt:
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09/27/2013
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Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
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Title:
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Semiconductor Device and Method of Bonding Semiconductor Die to Substrate in Reconstituted Wafer Form
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Patent #:
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Issue Dt:
|
01/19/2016
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Application #:
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14039418
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Filing Dt:
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09/27/2013
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|
Publication #:
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|
Pub Dt:
|
06/26/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING BUMPLESS FLIPCHIP INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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03/31/2015
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Application #:
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14043751
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Filing Dt:
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10/01/2013
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Publication #:
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|
Pub Dt:
|
01/30/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Vertical Interconnect Structure with Conductive Micro Via Array for 3-D FO-WLCSP
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Patent #:
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Issue Dt:
|
03/31/2015
|
Application #:
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14043751
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Filing Dt:
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10/01/2013
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|
Publication #:
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|
Pub Dt:
|
01/30/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Vertical Interconnect Structure with Conductive Micro Via Array for 3-D FO-WLCSP
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|
Patent #:
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Issue Dt:
|
08/14/2018
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Application #:
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14061244
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Filing Dt:
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10/23/2013
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Publication #:
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Pub Dt:
|
02/20/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
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Patent #:
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Issue Dt:
|
07/07/2015
|
Application #:
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14063274
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Filing Dt:
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10/25/2013
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Publication #:
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Pub Dt:
|
02/20/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF DUAL-MOLDING DIE FORMED ON OPPOSITE SIDES OF BUILD-UP INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
|
07/07/2015
|
Application #:
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14063274
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Filing Dt:
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10/25/2013
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Publication #:
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|
Pub Dt:
|
02/20/2014
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF DUAL-MOLDING DIE FORMED ON OPPOSITE SIDES OF BUILD-UP INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
|
07/11/2017
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Application #:
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14070509
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Filing Dt:
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11/02/2013
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Publication #:
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Pub Dt:
|
07/03/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Embedded Wafer Level Chip Scale Packages
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Patent #:
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03/08/2016
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Application #:
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14079273
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Filing Dt:
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11/13/2013
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Publication #:
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Pub Dt:
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03/06/2014
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Title:
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Semiconductor Device and Method of Forming Thick Encapsulant for Stiffness with Recesses for Stress Relief in FO-WLCSP
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Patent #:
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09/22/2015
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14080609
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11/14/2013
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Publication #:
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Pub Dt:
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03/20/2014
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Title:
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Semiconductor Device and Method of Forming FO-WLCSP with Multiple Encapsulants
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Patent #:
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NONE
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14082155
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11/17/2013
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Pub Dt:
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03/13/2014
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Title:
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Semiconductor Device and Method of Forming Conductive THV and RDL on Opposite Sides of Semiconductor Die for RDL-to-RDL Bonding
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02/02/2016
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14084745
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Filing Dt:
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11/20/2013
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Publication #:
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Pub Dt:
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03/13/2014
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Title:
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Semiconductor Device and Method of Forming Multi-Layered UBM with Intermediate Insulating Buffer Layer to Reduce Stress for Semiconductor Wafer
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Patent #:
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Issue Dt:
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09/22/2015
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Application #:
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14087653
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Filing Dt:
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11/22/2013
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Publication #:
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Pub Dt:
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03/20/2014
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Title:
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Semiconductor Device with Protective Layer Over Exposed Surfaces of Semiconductor Die
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Patent #:
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Issue Dt:
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12/25/2018
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Application #:
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14090036
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Filing Dt:
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11/26/2013
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Publication #:
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Pub Dt:
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03/27/2014
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Title:
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SEMICONDUCTOR DEVICE WITH DUMMY METAL PROTECTIVE STRUCTURE AROUND SEMICONDUCTOR DIE FOR LOCALIZED PLANARIZATION OF INSULATING LAYER
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Patent #:
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06/14/2016
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Application #:
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14092304
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Filing Dt:
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11/27/2013
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Publication #:
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Pub Dt:
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03/27/2014
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Title:
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SEMICONDUCTOR DEVICE INCLUDING INTEGRATED PASSIVE DEVICE FORMED OVER SEMICONDUCTOR DIE WITH CONDUCTIVE BRIDGE AND FAN-OUT REDISTRIBUTION LAYER
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Patent #:
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04/11/2017
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14097534
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12/05/2013
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Publication #:
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Pub Dt:
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04/03/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF USING A STANDARDIZED CARRIER IN SEMICONDUCTOR PACKAGING
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Patent #:
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12/12/2017
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14135415
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12/19/2013
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Pub Dt:
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04/17/2014
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Title:
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Semiconductor Device and Method of Forming a POP Device with Embedded Vertical Interconnect Units
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Patent #:
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NONE
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Application #:
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14136274
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12/20/2013
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Publication #:
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Pub Dt:
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06/25/2015
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE INK AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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NONE
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Application #:
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14136513
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Filing Dt:
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12/20/2013
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Publication #:
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Pub Dt:
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06/25/2015
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VIALESS SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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07/28/2015
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Application #:
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14137352
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Filing Dt:
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12/20/2013
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Title:
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METHOD OF MANUFACTURE OF INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PLASMA PROCESSING
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Patent #:
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Issue Dt:
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08/25/2015
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Application #:
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14138382
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Filing Dt:
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12/23/2013
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Publication #:
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Pub Dt:
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04/17/2014
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Title:
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Semiconductor Device and Method of Forming Non-Linear Interconnect Layer with Extended Length for Joint Reliability
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Patent #:
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Issue Dt:
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04/05/2016
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Application #:
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14138646
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Filing Dt:
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12/23/2013
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Publication #:
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Pub Dt:
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04/24/2014
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Title:
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Semiconductor Package and Method of Mounting Semiconductor Die to Opposite Sides of TSV Substrate
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Patent #:
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Issue Dt:
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06/09/2015
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Application #:
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14143891
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Filing Dt:
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12/30/2013
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Publication #:
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Pub Dt:
|
04/24/2014
| | | | |
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Title:
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Semiconductor Device and Method of Making TSV Interconnect Structures Using Encapsulant for Structural Support
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Patent #:
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Issue Dt:
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06/09/2015
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Application #:
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14143891
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Filing Dt:
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12/30/2013
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
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Title:
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Semiconductor Device and Method of Making TSV Interconnect Structures Using Encapsulant for Structural Support
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Patent #:
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Issue Dt:
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06/13/2017
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Application #:
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14144906
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Filing Dt:
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12/31/2013
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Publication #:
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Pub Dt:
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04/24/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL WITH SOLDER MASK PATCH
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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14154049
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Filing Dt:
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01/13/2014
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Publication #:
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Pub Dt:
|
05/08/2014
| | | | |
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Title:
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EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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14154049
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Filing Dt:
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01/13/2014
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Publication #:
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Pub Dt:
|
05/08/2014
| | | | |
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Title:
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EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER
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Patent #:
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Issue Dt:
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12/22/2015
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Application #:
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14160796
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Filing Dt:
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01/22/2014
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Publication #:
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Pub Dt:
|
05/15/2014
| | | | |
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Title:
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Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14170295
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Filing Dt:
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01/31/2014
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Publication #:
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Pub Dt:
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05/29/2014
| | | | |
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Title:
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Flip Chip Interconnection Structure
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14181429
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Filing Dt:
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02/14/2014
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Publication #:
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Pub Dt:
|
06/12/2014
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Title:
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Semiconductor Device Having High-Density Interconnect Array with Core Pillars Formed With OSP Coating
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Patent #:
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Issue Dt:
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04/18/2017
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Application #:
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14187014
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Filing Dt:
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02/21/2014
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Publication #:
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Pub Dt:
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09/11/2014
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Title:
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Semiconductor Device and Method of Forming Ultra High Density Embedded Semiconductor Die Package
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Patent #:
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Issue Dt:
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06/21/2016
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Application #:
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14192706
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Filing Dt:
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02/27/2014
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Publication #:
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Pub Dt:
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06/26/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE WITH CONDUCTIVE PADS HAVING EXPANDED INTERCONNECT SURFACE AREA FOR ENHANCED INTERCONNECTION PROPERTIES
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Patent #:
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06/20/2017
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14193267
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02/28/2014
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Publication #:
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Pub Dt:
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09/11/2014
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Title:
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Semiconductor Device and Method of Forming Embedded Conductive Layer for Power/Ground Planes in FO-EWLB
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Patent #:
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Issue Dt:
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10/06/2015
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Application #:
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14194691
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Filing Dt:
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03/01/2014
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Publication #:
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Pub Dt:
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06/26/2014
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Title:
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Semiconductor Device and Method of Forming Discontinuous ESD Protection Layers Between Semiconductor Die
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Patent #:
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Issue Dt:
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08/02/2016
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Application #:
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14214120
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Filing Dt:
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03/14/2014
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Publication #:
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Pub Dt:
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07/17/2014
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Title:
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EXTENDED REDISTRIBUTION LAYERS BUMPED WAFER
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01/09/2018
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14222547
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Filing Dt:
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03/21/2014
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Pub Dt:
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10/09/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE VIAS USING BACKSIDE VIA REVEAL AND SELECTIVE PASSIVATION
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Patent #:
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05/24/2016
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14223695
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03/24/2014
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Pub Dt:
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10/30/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING STRESS-REDUCED CONDUCTIVE JOINT STRUCTURES
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05/02/2017
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Application #:
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14224931
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Filing Dt:
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03/25/2014
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Publication #:
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Pub Dt:
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07/24/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING Z-INTERCONNECT CONDUCTIVE PILLARS WITH INNER POLYMER CORE
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Patent #:
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Issue Dt:
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03/21/2017
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14249307
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Filing Dt:
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04/09/2014
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Publication #:
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Pub Dt:
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08/07/2014
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Title:
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Semiconductor Device and Method of Forming Conductive Vias with Trench in Saw Street
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Patent #:
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Issue Dt:
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10/25/2016
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Application #:
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14256047
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Filing Dt:
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04/18/2014
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Publication #:
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Pub Dt:
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08/14/2014
| | | | |
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Title:
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Semiconductor Device with Conductive Pillars Having Recesses or Protrusions to Detect Interconnect Continuity Between Semiconductor Die and Substrate
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Patent #:
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Issue Dt:
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12/05/2017
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Application #:
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14257850
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Filing Dt:
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04/21/2014
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Publication #:
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Pub Dt:
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08/14/2014
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Title:
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Semiconductor Device and Method of Forming Insulating Layer in Notches Around Conductive TSV for Stress Relief
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Patent #:
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Issue Dt:
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11/11/2014
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Application #:
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14258300
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Filing Dt:
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04/22/2014
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Publication #:
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Pub Dt:
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08/14/2014
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Title:
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Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch
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Patent #:
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Issue Dt:
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11/11/2014
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Application #:
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14258300
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Filing Dt:
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04/22/2014
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Publication #:
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Pub Dt:
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08/14/2014
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Title:
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Semiconductor Device and Method of Confining Conductive Bump Material During Reflow with Solder Mask Patch
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Patent #:
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Issue Dt:
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10/25/2016
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Application #:
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14261252
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Filing Dt:
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04/24/2014
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Publication #:
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Pub Dt:
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01/01/2015
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Title:
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Semiconductor Device and Method of Stacking Semiconductor Die on a Fan-Out WLCSP
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Patent #:
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Issue Dt:
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02/09/2016
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Application #:
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14265782
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Filing Dt:
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04/30/2014
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Publication #:
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Pub Dt:
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08/21/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF EMBEDDING BUMPS FORMED ON SEMICONDUCTOR DIE INTO PENETRABLE ADHESIVE LAYER TO REDUCE DIE SHIFTING DURING ENCAPSULATION
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Patent #:
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Issue Dt:
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10/25/2016
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Application #:
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14267777
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Filing Dt:
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05/01/2014
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Publication #:
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Pub Dt:
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08/28/2014
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Title:
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Semiconductor Device and Method of Forming Topside and Bottom-side Interconnect Structures Around Core Die with TSV
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Patent #:
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Issue Dt:
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07/26/2016
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Application #:
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14267800
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Filing Dt:
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05/01/2014
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Publication #:
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Pub Dt:
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08/28/2014
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Title:
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Semiconductor Device and Method of Forming a Vertical Interconnect Structure for 3-D FO-WLCSP
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Patent #:
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Issue Dt:
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06/20/2017
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Application #:
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14268316
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Filing Dt:
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05/02/2014
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Publication #:
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Pub Dt:
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08/28/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO-VIAS PARTIALLY THROUGH INSULATING MATERIAL AROUND BUMP INTERCONNECT
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Patent #:
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Issue Dt:
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07/21/2015
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Application #:
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14274599
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05/09/2014
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Publication #:
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Pub Dt:
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09/04/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
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Patent #:
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07/21/2015
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Application #:
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14274599
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Filing Dt:
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05/09/2014
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Publication #:
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Pub Dt:
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09/04/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
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07/18/2017
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Application #:
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14275213
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05/12/2014
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Publication #:
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Pub Dt:
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09/18/2014
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Title:
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Semiconductor Device and Method of Forming a Dual UBM Structure for Lead Free Bump Connections
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Patent #:
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Issue Dt:
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10/18/2016
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Application #:
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14284752
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05/22/2014
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Pub Dt:
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09/11/2014
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Title:
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Semiconductor Device and Method of Forming Repassivation Layer with Reduced Opening to Contact Pad of Semiconductor Die
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03/21/2017
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Application #:
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14288589
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05/28/2014
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Pub Dt:
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09/18/2014
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING UBM STRUCTURE ON BACK SURFACE OF TSV SEMICONDUCTOR WAFER
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01/17/2017
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14289344
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05/28/2014
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Pub Dt:
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09/18/2014
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Title:
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Semiconductor Device and Method of Forming an Inductor on Polymer Matrix Composite Substrate
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Patent #:
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09/06/2016
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14292925
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06/01/2014
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Publication #:
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Pub Dt:
|
09/18/2014
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Title:
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Semiconductor Device Including RDL Along Sloped Side Surface of Semiconductor Die for Z-Direction Interconnect
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Patent #:
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09/06/2016
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14303484
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06/12/2014
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Pub Dt:
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10/02/2014
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Title:
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Semiconductor Device and Method of Forming Shielding Layer Over Active Surface of Semiconductor Die
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