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Patent #:
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Issue Dt:
|
06/21/2016
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Application #:
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14305185
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Filing Dt:
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06/16/2014
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Publication #:
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Pub Dt:
|
10/02/2014
| | | | |
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Title:
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SOLDER JOINT FLIP CHIP INTERCONNECTION
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
14321370
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Filing Dt:
|
07/01/2014
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Publication #:
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Pub Dt:
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10/23/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer
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Patent #:
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Issue Dt:
|
12/29/2015
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Application #:
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14326237
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Filing Dt:
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07/08/2014
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Publication #:
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Pub Dt:
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10/30/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming TMV and TSV in WLCSP Using Same Carrier
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Patent #:
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Issue Dt:
|
01/09/2018
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Application #:
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14326789
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Filing Dt:
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07/09/2014
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Publication #:
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Pub Dt:
|
10/30/2014
| | | | |
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Title:
|
SEMICONDUCTOR METHOD AND DEVICE OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
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Patent #:
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Issue Dt:
|
01/26/2016
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Application #:
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14328348
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Filing Dt:
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07/10/2014
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Publication #:
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Pub Dt:
|
10/30/2014
| | | | |
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Title:
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STACKABLE PACKAGE BY USING INTERNAL STACKING MODULES
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Patent #:
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Issue Dt:
|
10/03/2017
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Application #:
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14328922
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Filing Dt:
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07/11/2014
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Publication #:
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Pub Dt:
|
10/30/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Bump Structure with Insulating Buffer Layer to Reduce Stress on Semiconductor Wafer
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Patent #:
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Issue Dt:
|
03/03/2020
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Application #:
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14329162
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Filing Dt:
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07/11/2014
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Publication #:
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Pub Dt:
|
10/30/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH ROUTING DENSITY INTERCONNECT SITES ON SUBSTRATE
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Patent #:
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Issue Dt:
|
09/20/2016
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Application #:
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14329464
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Filing Dt:
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07/11/2014
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Publication #:
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Pub Dt:
|
04/30/2015
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF BALANCING SURFACES OF AN EMBEDDED PCB UNIT WITH A DUMMY COPPER PATTERN
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Patent #:
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Issue Dt:
|
04/19/2016
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Application #:
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14330704
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Filing Dt:
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07/14/2014
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Publication #:
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Pub Dt:
|
10/30/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Stacked Semiconductor Die and Conductive Interconnect Structure Through an Encapsulant
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Patent #:
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Issue Dt:
|
06/20/2017
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Application #:
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14331050
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Filing Dt:
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07/14/2014
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Publication #:
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Pub Dt:
|
10/30/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Shielding Layer Over Semiconductor Die Mounted to TSV Interposer
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Patent #:
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Issue Dt:
|
05/02/2017
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Application #:
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14332631
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Filing Dt:
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07/16/2014
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Publication #:
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Pub Dt:
|
11/06/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INDUCTOR OVER INSULATING MATERIAL FILLED TRENCH IN SUBSTRATE
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Patent #:
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Issue Dt:
|
10/24/2017
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Application #:
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14334229
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Filing Dt:
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07/17/2014
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Publication #:
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Pub Dt:
|
11/06/2014
| | | | |
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Title:
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Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces
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Patent #:
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Issue Dt:
|
08/16/2016
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Application #:
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14340187
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Filing Dt:
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07/24/2014
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Publication #:
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Pub Dt:
|
11/13/2014
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING ADHESIVE MATERIAL TO SECURE SEMICONDUCTOR DIE TO CARRIER IN WLCSP
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Patent #:
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Issue Dt:
|
05/10/2016
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Application #:
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14340436
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Filing Dt:
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07/24/2014
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Publication #:
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Pub Dt:
|
11/13/2014
| | | | |
|
Title:
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Integrated Circuit Package System with Removable Backing Element Having Plated Terminal Leads and Method of Manufacture Thereof
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
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14341578
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Filing Dt:
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07/25/2014
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Publication #:
|
|
Pub Dt:
|
11/13/2014
| | | | |
|
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTING STRUCTURE
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Patent #:
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Issue Dt:
|
09/06/2016
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Application #:
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14449869
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Filing Dt:
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08/01/2014
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Publication #:
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Pub Dt:
|
11/20/2014
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
|
06/06/2017
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Application #:
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14449914
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Filing Dt:
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08/01/2014
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Publication #:
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Pub Dt:
|
02/12/2015
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING WAFER LEVEL CHIP SCALE PACKAGE
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Patent #:
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Issue Dt:
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12/27/2016
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Application #:
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14462347
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Filing Dt:
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08/18/2014
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Publication #:
|
|
Pub Dt:
|
12/04/2014
| | | | |
|
Title:
|
Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant
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Patent #:
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Issue Dt:
|
01/26/2021
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Application #:
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14466923
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Filing Dt:
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08/22/2014
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Publication #:
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Pub Dt:
|
12/11/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF USING LEADFRAME BODIES TO FORM OPENINGS THROUGH ENCAPSULANT FOR VERTICAL INTERCONNECT OF SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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01/31/2017
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Application #:
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14494508
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Filing Dt:
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09/23/2014
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Publication #:
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Pub Dt:
|
01/08/2015
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SACRIFICIAL PROTECTIVE LAYER TO PROTECT SEMICONDUCTOR DIE EDGE DURING SINGULATION
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Patent #:
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Issue Dt:
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10/03/2017
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Application #:
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14503086
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Filing Dt:
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09/30/2014
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Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PAD LAYOUT FOR FLIPCHIP SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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08/11/2015
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Application #:
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14503698
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Filing Dt:
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10/01/2014
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Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE OVER SEED LAYER ON CONTACT PAD OF SEMICONDUCTOR DIE WITHOUT UNDERCUTTING SEED LAYER BENEATH INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
|
12/01/2015
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Application #:
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14509785
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Filing Dt:
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10/08/2014
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Publication #:
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Pub Dt:
|
01/22/2015
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Title:
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Semiconductor Device and Method of Forming Thermal Lid for Balancing Warpage and Thermal Management
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Patent #:
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Issue Dt:
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03/28/2017
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Application #:
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14512614
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Filing Dt:
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10/13/2014
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Publication #:
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|
Pub Dt:
|
03/05/2015
| | | | |
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Title:
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Semiconductor Device and Method for Forming Openings and Trenches in Insulating Layer by First LDA and Second LDA for RDL Formation
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Patent #:
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Issue Dt:
|
08/01/2017
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Application #:
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14514190
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Filing Dt:
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10/14/2014
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Publication #:
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|
Pub Dt:
|
01/29/2015
| | | | |
|
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING OVERLAPPING SEMICONDUCTOR DIE WITH COPLANAR VERTICAL INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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01/31/2017
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Application #:
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14523556
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Filing Dt:
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10/24/2014
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Publication #:
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Pub Dt:
|
03/05/2015
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Title:
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Semiconductor Device and Method of Forming Interconnect Structure for Encapsulated Die Having Pre-Applied Protective Layer
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Patent #:
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Issue Dt:
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02/28/2017
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Application #:
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14553358
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Filing Dt:
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11/25/2014
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Publication #:
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Pub Dt:
|
04/30/2015
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Title:
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Semiconductor Device and Method of Forming a Shielding Layer Between Stacked Semiconductor Die
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Patent #:
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Issue Dt:
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07/19/2016
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Application #:
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14563448
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Filing Dt:
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12/08/2014
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Publication #:
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Pub Dt:
|
04/02/2015
| | | | |
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Title:
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Semiconductor Device and Method of Forming Patterned Repassivation Openings Between RDL and UBM to Reduce Adverse Effects of Electro-Migration
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14565731
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Filing Dt:
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12/10/2014
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Publication #:
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Pub Dt:
|
05/21/2015
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Title:
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Semiconductor Device and Method of Forming WLCSP Using Wafer Sections Containing Multiple Die
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Patent #:
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Issue Dt:
|
11/27/2018
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Application #:
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14566870
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Filing Dt:
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12/11/2014
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Publication #:
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Pub Dt:
|
04/02/2015
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE VIAS THROUGH INTERCONNECT STRUCTURES AND ENCAPSULANT OF WLCSP
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Patent #:
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Issue Dt:
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06/13/2017
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Application #:
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14572298
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Filing Dt:
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12/16/2014
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Publication #:
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Pub Dt:
|
04/09/2015
| | | | |
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Title:
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Semiconductor Device and Method of Forming Conductive Layer Over Substrate with Vents to Channel Bump Material and Reduce Interconnect Voids
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Patent #:
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Issue Dt:
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05/08/2018
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Application #:
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14596080
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Filing Dt:
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01/13/2015
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Publication #:
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Pub Dt:
|
05/07/2015
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Title:
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Semiconductor Device and Method of Forming Interposer Frame Electrically Connected to Embedded Semiconductor Die
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Patent #:
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Issue Dt:
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07/26/2016
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Application #:
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14600825
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Filing Dt:
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01/20/2015
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Publication #:
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Pub Dt:
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05/21/2015
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Title:
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Semiconductor Device and Method of Forming a Shielding Layer Over a Semiconductor Die Disposed in a Cavity of an Interconnect Structure and Grounded Through the Die TSV
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Patent #:
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Issue Dt:
|
11/21/2017
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Application #:
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14612075
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Filing Dt:
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02/02/2015
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Publication #:
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Pub Dt:
|
05/28/2015
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Title:
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Semiconductor Device and Method of Forming Stepped Interconnect Layer for Stacked Semiconductor Die
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Patent #:
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Issue Dt:
|
09/25/2018
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Application #:
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14637054
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Filing Dt:
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03/03/2015
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Publication #:
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Pub Dt:
|
06/25/2015
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Title:
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Semiconductor Device and Method of Forming Stress Relief Layer Between Die and Interconnect Structure
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Patent #:
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Issue Dt:
|
06/28/2016
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Application #:
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14682914
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Filing Dt:
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04/09/2015
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Publication #:
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Pub Dt:
|
07/30/2015
| | | | |
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Title:
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Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask
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