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05/06/2008
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10882078
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06/30/2004
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02/03/2005
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Title:
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07/10/2007
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10894561
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07/19/2004
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01/19/2006
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INTEGRATED CIRCUIT DIE WITH PEDESTAL
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07/10/2007
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10906697
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03/02/2005
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09/07/2006
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Title:
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STACKED SEMICONDUCTOR PACKAGES AND METHOD THEREFOR
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06/03/2008
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10907732
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04/13/2005
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10/19/2006
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INTEGRATED CIRCUIT SYSTEM FOR BONDING
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03/04/2008
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10907758
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04/14/2005
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10/19/2006
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Title:
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LEADFRAME WITH ENCAPSULANT GUIDE AND METHOD FOR THE FABRICATION THEREOF
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07/03/2007
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10907991
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04/22/2005
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10/26/2006
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Title:
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SYSTEM FOR PEELING SEMICONDUCTOR CHIPS FROM TAPE
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12/12/2006
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10908120
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04/28/2005
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11/02/2006
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Title:
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SEMICONDUCTOR PACKAGE WITH CONTROLLED SOLDER BUMP WETTING AND FABRICATION METHOD THEREFOR
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NONE
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10908254
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05/04/2005
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11/03/2005
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Title:
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INTEGRATED CIRCUIT PACKAGE WITH DIFFERENT HARDNESS BUMP PAD AND BUMP AND MANUFACTURING METHOD THEREFOR
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05/22/2007
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10908433
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05/11/2005
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11/16/2006
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Title:
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SELF-ALIGNING DOCKING SYSTEM FOR ELECTRONIC DEVICE TESTING
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06/03/2008
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10913806
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08/05/2004
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02/09/2006
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Title:
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METHOD AND APPARATUS FOR STACKED DIE PACKAGING
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11/01/2005
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10914870
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08/09/2004
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Pub Dt:
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01/13/2005
| | | | |
Title:
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SEMICONDUCTOR DEVICE PACKAGE
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07/03/2012
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10921376
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08/18/2004
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Pub Dt:
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03/03/2005
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Title:
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LEADFRAME-BASED MOLD ARRAY PACKAGE HEAT SPREADER AND FABRICATION METHOD THEREFOR
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01/04/2011
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10921377
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08/18/2004
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03/03/2005
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Title:
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ARRAY-MOLDED PACKAGE HEAT SPREADER AND FABRICATION METHOD THEREFOR
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09/13/2005
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10931654
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08/31/2004
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Title:
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MULTICHIP MODULE PACKAGE AND FABRICATION METHOD
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06/20/2006
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10931919
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08/31/2004
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Pub Dt:
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03/02/2006
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Title:
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STACKED DIE PACKAGING AND FABRICATION METHOD
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11/29/2005
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10934129
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09/02/2004
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Title:
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AIR POCKET RESISTANT SEMICONDUCTOR PACKAGE SYSTEM
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NONE
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10934835
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09/02/2004
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03/02/2006
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Title:
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Wire sweep resistant semiconductor package and manufacturing method thereof
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07/11/2006
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10959713
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10/06/2004
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09/08/2005
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Title:
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DBG SYSTEM AND METHOD WITH ADHESIVE LAYER SEVERING
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12/27/2005
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10969361
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10/19/2004
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Pub Dt:
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03/10/2005
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Title:
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INTEGRATED CIRCUIT PACKAGE
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Patent #:
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08/05/2008
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10971202
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10/22/2004
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Pub Dt:
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10/06/2005
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Title:
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WIRE BOND CAPILLARY TIP
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12/11/2007
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10976601
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10/29/2004
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Pub Dt:
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09/22/2005
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Title:
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SEMICONDUCTOR CHIP PACKAGING METHOD WITH INDIVIDUALLY PLACED FILM ADHESIVE PIECES
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01/26/2010
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10977047
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10/29/2004
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10/06/2005
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Title:
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BONDING TOOL FOR MOUNTING SEMICONDUCTOR CHIPS
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04/25/2006
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10983898
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11/08/2004
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Publication #:
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Pub Dt:
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05/12/2005
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Title:
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FLIP CHIP INTERCONNECTION PAD LAYOUT
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Patent #:
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05/06/2008
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10985654
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11/10/2004
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Publication #:
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Pub Dt:
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05/26/2005
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Title:
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BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
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Patent #:
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12/18/2007
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10986510
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11/10/2004
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Publication #:
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Pub Dt:
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04/28/2005
| | | | |
Title:
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STACKED SEMICONDUCTOR PACKAGES
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Patent #:
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08/15/2006
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10993526
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11/18/2004
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Publication #:
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04/28/2005
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Title:
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SEMICONDUCTOR PACKAGES AND LEADFRAME ASSEMBLIES
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Patent #:
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Issue Dt:
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09/17/2013
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11007896
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12/08/2004
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Publication #:
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12/01/2005
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Title:
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INTEGRATED CIRCUIT LEADFRAME AND FABRICATION METHOD THEREFOR
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Patent #:
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08/12/2008
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11009436
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12/09/2004
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Pub Dt:
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06/15/2006
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Title:
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METHOD FOR SOLDER BUMPING, AND SOLDER-BUMPING STRUCTURES PRODUCED THEREBY
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Patent #:
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03/03/2015
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11014257
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12/16/2004
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Pub Dt:
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06/23/2005
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Title:
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Multiple chip package module having inverted package stacked over die
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08/07/2007
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11022375
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12/23/2004
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Pub Dt:
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01/19/2006
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Title:
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SEMICONDUCTOR MULTIPACKAGE MODULE INCLUDING DIE AND INVERTED LAND GRID ARRAY PACKAGE STACKED OVER BALL GRID ARRAY PACKAGE
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04/06/2010
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11027002
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12/31/2004
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Pub Dt:
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07/21/2005
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Title:
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DIE ATTACH BY TEMPERATURE GRADIENT LEAD FREE SOFT SOLDER METAL SHEET OR FILM
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NONE
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11035637
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01/14/2005
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07/20/2006
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Title:
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Under bump metallurgy in integrated circuits
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06/30/2009
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11053564
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02/07/2005
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08/10/2006
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Title:
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MULTI-LEADFRAME SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURE
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09/05/2006
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11059274
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02/16/2005
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Pub Dt:
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07/07/2005
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Title:
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SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED SECOND PACKAGE STACKED OVER DIE-UP FLIP-CHIP BALL GRID ARRAY (BGA) PACKAGE
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Patent #:
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01/30/2007
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11121847
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05/03/2005
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Publication #:
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Pub Dt:
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11/09/2006
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Title:
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SEMICONDUCTOR PACKAGE WITH SELECTIVE UNDERFILL AND FABRICATION METHOD THERFOR
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Patent #:
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11/20/2007
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11126052
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05/09/2005
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Publication #:
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11/09/2006
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Title:
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LARGE DIE PACKAGE AND METHOD FOR THE FABRICATION THEREOF
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10/08/2013
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11134845
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05/20/2005
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12/08/2005
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Title:
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ADHESIVE/SPACER ISLAND STRUCTURE FOR STACKING OVER WIRE BONDED DIE
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05/01/2007
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11145246
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06/03/2005
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Pub Dt:
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10/06/2005
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Title:
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SELF-COPLANARITY BUMPING SHAPE FOR FLIP CHIP
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08/05/2008
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11145247
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06/03/2005
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Pub Dt:
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10/06/2005
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Title:
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Self-coplanarity bumping shape for flip chip
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11/04/2008
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11160837
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07/12/2005
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Pub Dt:
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03/02/2006
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Title:
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MULTICHIP MODULE PACKAGE AND FABRICATION METHOD
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06/08/2010
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11162617
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09/16/2005
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Pub Dt:
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05/18/2006
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Title:
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SEMICONDUCTOR SYSTEM WITH FINE PITCH LEAD FINGERS
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Patent #:
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05/19/2015
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11162622
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09/16/2005
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Publication #:
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Pub Dt:
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08/03/2006
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Title:
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INTEGRATED, INTEGRATED CIRCUIT SINGULATION SYSTEM
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Patent #:
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Issue Dt:
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11/29/2011
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11162629
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09/16/2005
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Publication #:
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Pub Dt:
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03/22/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PLANAR INTERCONNECTS
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01/03/2012
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11162635
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09/16/2005
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Pub Dt:
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08/10/2006
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM USING INTERPOSER
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09/18/2007
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11162637
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09/16/2005
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Pub Dt:
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08/24/2006
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Title:
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INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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09/25/2007
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11162682
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09/19/2005
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Publication #:
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Pub Dt:
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03/22/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ADHESIVE RESTRAINT
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Issue Dt:
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06/28/2011
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11162785
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Filing Dt:
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09/22/2005
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Publication #:
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Pub Dt:
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03/22/2007
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Title:
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INTEGRATED CIRCUIT PROTRUDING PAD PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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07/28/2009
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11162822
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09/23/2005
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Publication #:
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Pub Dt:
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03/29/2007
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Title:
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INTEGRATED CIRCUIT SOLDER BUMPING SYSTEM
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Patent #:
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NONE
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Application #:
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11162828
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Filing Dt:
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09/24/2005
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Publication #:
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Pub Dt:
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05/18/2006
| | | | |
Title:
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HYPER THERMALLY ENHANCED SEMICONDUCTOR PACKAGE SYSTEM
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NONE
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Application #:
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11162971
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Filing Dt:
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09/29/2005
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Pub Dt:
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03/29/2007
| | | | |
Title:
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SUBSTRATE INDEXING SYSTEM
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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11163035
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Filing Dt:
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10/03/2005
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Publication #:
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Pub Dt:
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04/05/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-SURFACE DIE ATTACH PAD
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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11163116
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Filing Dt:
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10/05/2005
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Publication #:
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Pub Dt:
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04/05/2007
| | | | |
Title:
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ULTRA-THIN WAFER SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/18/2012
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Application #:
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11163156
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Filing Dt:
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10/07/2005
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Publication #:
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Pub Dt:
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04/12/2007
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Title:
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WAFER LEVEL LASER MARKING SYSTEM FOR ULTRA-THIN WAFERS USING SUPPORT TAPE
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Patent #:
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Issue Dt:
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04/24/2012
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Application #:
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11163305
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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04/19/2007
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM USING ETCHED LEADFRAME
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11163313
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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04/19/2007
| | | | |
Title:
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STACKED DIE PACKAGING SYSTEM
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11163547
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Filing Dt:
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10/21/2005
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Publication #:
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Pub Dt:
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04/26/2007
| | | | |
Title:
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PRE-MOLDED LEADFRAME AND METHOD THEREFOR
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11163556
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Filing Dt:
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10/22/2005
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Publication #:
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Pub Dt:
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08/10/2006
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKED INTERLOCKING LEADFRAME
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Patent #:
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Issue Dt:
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05/24/2011
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11163558
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Filing Dt:
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10/22/2005
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Publication #:
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Pub Dt:
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04/26/2007
| | | | |
Title:
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THIN PACKAGE SYSTEM WITH EXTERNAL TERMINALS
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Patent #:
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Issue Dt:
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04/14/2009
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Application #:
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11163559
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Filing Dt:
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10/22/2005
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Publication #:
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Pub Dt:
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05/18/2006
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SLUG
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Patent #:
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Issue Dt:
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01/12/2010
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Application #:
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11163561
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Filing Dt:
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10/23/2005
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Publication #:
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Pub Dt:
|
05/18/2006
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFRAME SUBSTRATE
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
|
11163770
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Filing Dt:
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10/29/2005
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Publication #:
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Pub Dt:
|
08/24/2006
| | | | |
Title:
|
PACKAGE STACKING LEAD FRAME SYSTEM
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|
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Patent #:
|
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Issue Dt:
|
11/24/2009
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Application #:
|
11163771
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Filing Dt:
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10/29/2005
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Publication #:
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Pub Dt:
|
05/03/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING HIGH-DENSITY SMALL FOOTPRINT SYSTEM-IN-PACKAGE
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|
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Patent #:
|
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Issue Dt:
|
10/28/2008
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Application #:
|
11164087
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Filing Dt:
|
11/09/2005
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Publication #:
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Pub Dt:
|
05/17/2007
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING RIBBON BOND INTERCONNECT
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|
|
Patent #:
|
|
Issue Dt:
|
01/10/2012
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Application #:
|
11164088
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Filing Dt:
|
11/10/2005
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Publication #:
|
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Pub Dt:
|
08/17/2006
| | | | |
Title:
|
METHOD OF MANUFACTURING NON-LEADED INTEGRATED CIRCUIT PACKAGE SYSTEM HAVING ETCHED DIFFERENTIAL HEIGHT LEAD STRUCTURES
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|
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Patent #:
|
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Issue Dt:
|
02/28/2012
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Application #:
|
11164132
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Filing Dt:
|
11/10/2005
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Publication #:
|
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Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE SYSTEM WITH SUBSTRATE HEAT SINK
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|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
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Application #:
|
11164160
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Filing Dt:
|
11/12/2005
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Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
Title:
|
STACKED DIE PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
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Application #:
|
11164209
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Filing Dt:
|
11/14/2005
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Publication #:
|
|
Pub Dt:
|
06/22/2006
| | | | |
Title:
|
HYPER THERMALLY ENHANCED SEMICONDUCTOR PACKAGE SYSTEM COMPRISING HEAT SLUGS ON OPPOSITE SURFACES OF A SEMICONDUCTOR CHIP
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|
|
Patent #:
|
|
Issue Dt:
|
09/02/2008
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Application #:
|
11164321
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Filing Dt:
|
11/17/2005
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Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRATED CIRCUIT SUPPORT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2009
|
Application #:
|
11164329
|
Filing Dt:
|
11/18/2005
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE WITH OPEN SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2009
|
Application #:
|
11164329
|
Filing Dt:
|
11/18/2005
|
Publication #:
|
|
Pub Dt:
|
03/16/2006
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE WITH OPEN SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
11164335
|
Filing Dt:
|
11/18/2005
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
NON-LEADED INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2011
|
Application #:
|
11164336
|
Filing Dt:
|
11/18/2005
|
Publication #:
|
|
Pub Dt:
|
08/03/2006
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE SYSTEM WITH CAVITY SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
|
Application #:
|
11164453
|
Filing Dt:
|
11/22/2005
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DIE AND PACKAGE COMBINATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2009
|
Application #:
|
11169850
|
Filing Dt:
|
06/28/2005
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE FOR A LARGE DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2009
|
Application #:
|
11169850
|
Filing Dt:
|
06/28/2005
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE FOR A LARGE DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2007
|
Application #:
|
11213058
|
Filing Dt:
|
08/26/2005
|
Publication #:
|
|
Pub Dt:
|
01/26/2006
| | | | |
Title:
|
METHOD FOR MANUFACTURING PLASTIC BALL GRID ARRAY PACKAGE WITH INTEGRAL HEATSINK
|
|
|
Patent #:
|
|
Issue Dt:
|
11/28/2006
|
Application #:
|
11215090
|
Filing Dt:
|
08/29/2005
|
Publication #:
|
|
Pub Dt:
|
03/02/2006
| | | | |
Title:
|
AIR POCKET RESISTANT SEMICONDUCTOR PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2008
|
Application #:
|
11234528
|
Filing Dt:
|
09/22/2005
|
Publication #:
|
|
Pub Dt:
|
04/12/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2007
|
Application #:
|
11252193
|
Filing Dt:
|
10/17/2005
|
Publication #:
|
|
Pub Dt:
|
04/20/2006
| | | | |
Title:
|
MULTICHIP LEADFRAME PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2007
|
Application #:
|
11252990
|
Filing Dt:
|
10/18/2005
|
Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
METHOD FOR REDUCING SEMICONDUCTOR DIE WARPAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2011
|
Application #:
|
11255740
|
Filing Dt:
|
10/21/2005
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
Title:
|
STACKED INTEGRATED CIRCUIT AND PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11257894
|
Filing Dt:
|
10/24/2005
|
Publication #:
|
|
Pub Dt:
|
08/10/2006
| | | | |
Title:
|
NESTED INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2008
|
Application #:
|
11273635
|
Filing Dt:
|
11/14/2005
|
Publication #:
|
|
Pub Dt:
|
06/01/2006
| | | | |
Title:
|
WIRE BOND INTERCONNECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
11274925
|
Filing Dt:
|
11/14/2005
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE HAVING DOUBLE LAYER LEADFRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2011
|
Application #:
|
11276611
|
Filing Dt:
|
03/07/2006
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
WAFER LEVEL CHIP SCALE PACKAGE SYSTEM WITH A THERMAL DISSIPATION STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
11276645
|
Filing Dt:
|
03/08/2006
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT LEADED STACKED PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/26/2011
|
Application #:
|
11276646
|
Filing Dt:
|
03/08/2006
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2011
|
Application #:
|
11276647
|
Filing Dt:
|
03/08/2006
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2009
|
Application #:
|
11276681
|
Filing Dt:
|
03/09/2006
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE SYSTEM WITH SUBSTRATE HAVING DIFFERENT BONDABLE HEIGHTS AT LEAD FINGER TIPS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2011
|
Application #:
|
11276682
|
Filing Dt:
|
03/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
STACKED INTEGRATED CIRCUITS PACKAGE SYSTEM WITH PASSIVE COMPONENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2011
|
Application #:
|
11276684
|
Filing Dt:
|
03/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
NON-LEADED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE GROUND SITES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
11276716
|
Filing Dt:
|
03/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM HAVING INTERCONNECT STACK AND EXTERNAL INTERCONNECT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2010
|
Application #:
|
11276727
|
Filing Dt:
|
03/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2008
|
Application #:
|
11276940
|
Filing Dt:
|
03/17/2006
|
Publication #:
|
|
Pub Dt:
|
09/20/2007
| | | | |
Title:
|
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
11276941
|
Filing Dt:
|
03/17/2006
|
Publication #:
|
|
Pub Dt:
|
09/20/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2013
|
Application #:
|
11276942
|
Filing Dt:
|
03/17/2006
|
Publication #:
|
|
Pub Dt:
|
09/20/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2010
|
Application #:
|
11276945
|
Filing Dt:
|
03/17/2006
|
Publication #:
|
|
Pub Dt:
|
09/20/2007
| | | | |
Title:
|
SYSTEM FOR REMOVAL OF AN INTEGRATED CIRCUIT FROM A MOUNT MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2009
|
Application #:
|
11276946
|
Filing Dt:
|
03/17/2006
|
Publication #:
|
|
Pub Dt:
|
09/20/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11276947
|
Filing Dt:
|
03/17/2006
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/2009
|
Application #:
|
11276948
|
Filing Dt:
|
03/17/2006
|
Publication #:
|
|
Pub Dt:
|
09/20/2007
| | | | |
Title:
|
MULTICHIP PACKAGE SYSTEM
|
|