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Patent #:
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Issue Dt:
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11/29/2011
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Application #:
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11863700
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Filing Dt:
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09/28/2007
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Publication #:
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Pub Dt:
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04/02/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE DIE
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Patent #:
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Issue Dt:
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03/29/2011
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Application #:
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11864826
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Filing Dt:
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09/28/2007
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Publication #:
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Pub Dt:
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04/02/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BASE STRUCTURE DEVICE
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Patent #:
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Issue Dt:
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02/23/2010
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Application #:
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11865064
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Filing Dt:
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09/30/2007
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Publication #:
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Pub Dt:
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04/02/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLD LOCK SUBASSEMBLY
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Patent #:
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Issue Dt:
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01/26/2010
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Application #:
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11869737
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Filing Dt:
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10/09/2007
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Publication #:
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Pub Dt:
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02/07/2008
| | | | |
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Title:
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MICRO CHIP-SCALE-PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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11/17/2009
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Application #:
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11869738
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Filing Dt:
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10/09/2007
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Publication #:
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Pub Dt:
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02/07/2008
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING DIE STACKING
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Patent #:
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Issue Dt:
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04/28/2009
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Application #:
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11877613
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Filing Dt:
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10/23/2007
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Publication #:
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Pub Dt:
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02/21/2008
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Title:
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CHIP CARRIER AND FABRICATION METHOD
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Patent #:
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Issue Dt:
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02/24/2009
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Application #:
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11880893
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Filing Dt:
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07/23/2007
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Publication #:
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Pub Dt:
|
01/24/2008
| | | | |
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Title:
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METHOD FOR MAKING A SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED WIRE BOND CARRIER SECOND PACKAGE
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Patent #:
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Issue Dt:
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03/06/2012
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Application #:
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11927646
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Filing Dt:
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10/29/2007
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Publication #:
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Pub Dt:
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04/30/2009
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUBSTRATE HAVING A CONDUCTOR-FREE RECESS
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Patent #:
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Issue Dt:
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06/01/2010
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Application #:
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11934009
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Filing Dt:
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11/01/2007
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Publication #:
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Pub Dt:
|
06/26/2008
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF PROTECTING PASSIVATION LAYER IN A SOLDER BUMP PROCESS
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Patent #:
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Issue Dt:
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05/29/2012
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Application #:
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11934069
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Filing Dt:
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11/01/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTING INTERCONNECTS
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Patent #:
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Issue Dt:
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08/18/2009
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Application #:
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11934654
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Filing Dt:
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11/02/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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ELECTROSTATIC DISCHARGE (ESD) PROTECTION STRUCTURE
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Patent #:
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Issue Dt:
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08/10/2010
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Application #:
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11936461
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Filing Dt:
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11/07/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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METHOD OF FORMING AN INDUCTOR ON A SEMICONDUCTOR WAFER
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Patent #:
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Issue Dt:
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02/17/2015
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Application #:
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11936516
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Filing Dt:
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11/07/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ARRAY OF EXTERNAL INTERCONNECTS
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Patent #:
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Issue Dt:
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07/12/2011
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Application #:
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11936532
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Filing Dt:
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11/07/2007
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Publication #:
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Pub Dt:
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05/07/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL CONNECTIVITY
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Patent #:
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Issue Dt:
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09/04/2012
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Application #:
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11938371
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Filing Dt:
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11/12/2007
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Publication #:
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Pub Dt:
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05/14/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION
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Patent #:
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Issue Dt:
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01/12/2010
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Application #:
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11941409
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Filing Dt:
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11/16/2007
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Publication #:
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Pub Dt:
|
05/21/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE SUBSTRATE HAVING CORNER CONTACTS
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Patent #:
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Issue Dt:
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09/20/2011
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Application #:
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11943290
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Filing Dt:
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11/20/2007
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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DIRECT VIA WIRE BONDING AND METHOD OF ASSEMBLING THE SAME
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Patent #:
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Issue Dt:
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05/22/2012
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Application #:
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11947303
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Filing Dt:
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11/29/2007
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Publication #:
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Pub Dt:
|
06/04/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH ANTI-MOLD FLASH FEATURE
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Patent #:
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Issue Dt:
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09/07/2010
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Application #:
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11947377
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Filing Dt:
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11/29/2007
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Publication #:
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Pub Dt:
|
06/04/2009
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH HOLE VIAS IN DIE EXTENSION REGION AROUND PERIPHERY OF DIE
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Patent #:
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Issue Dt:
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04/06/2010
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Application #:
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11947617
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Filing Dt:
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11/29/2007
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Publication #:
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Pub Dt:
|
06/04/2009
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR FORMING PASSIVE CIRCUIT ELEMENTS WITH THROUGH SILICON VIAS TO BACKSIDE INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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08/14/2012
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Application #:
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11949133
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Filing Dt:
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12/03/2007
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Publication #:
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Pub Dt:
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06/04/2009
| | | | |
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Title:
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WAFER LEVEL DIE INTEGRATION AND METHOD
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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11949255
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Filing Dt:
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12/03/2007
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Publication #:
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Pub Dt:
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06/04/2009
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING INTEGRATED PASSIVE DEVICES
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Patent #:
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Issue Dt:
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09/11/2018
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Application #:
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11949282
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Filing Dt:
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12/03/2007
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Publication #:
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Pub Dt:
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06/04/2009
| | | | |
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Title:
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Wafer Level Package Integration and Method
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Patent #:
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Issue Dt:
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08/14/2012
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Application #:
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11950216
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Filing Dt:
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12/04/2007
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Publication #:
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Pub Dt:
|
06/26/2008
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKED DIE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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11/23/2010
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Application #:
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11951729
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Filing Dt:
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12/06/2007
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Publication #:
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Pub Dt:
|
06/11/2009
| | | | |
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Title:
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SEMICONDUCTOR WAFER LEVEL INTERCONNECT PACKAGE UTILIZING CONDUCTIVE RING AND PAD FOR SEPARATE VOLTAGE SUPPLIES AND METHOD OF MAKING THE SAME
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Patent #:
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Issue Dt:
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02/03/2015
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Application #:
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11951958
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Filing Dt:
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12/06/2007
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Publication #:
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Pub Dt:
|
06/11/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM HOUSING A PLURALITY OF STACKED AND OFFSET INTEGRATED CIRCUITS AND METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
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10/18/2011
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Application #:
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11952502
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Filing Dt:
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12/07/2007
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Publication #:
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Pub Dt:
|
06/11/2009
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE AND METHOD OF FORMING SIMILAR STRUCTURE FOR TOP AND BOTTOM BONDING PADS
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Patent #:
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Issue Dt:
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03/08/2011
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Application #:
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11952951
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Filing Dt:
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12/07/2007
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Publication #:
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Pub Dt:
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06/11/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR ELECTROMAGNETIC ISOLATION
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Patent #:
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Issue Dt:
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08/13/2013
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Application #:
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11952968
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Filing Dt:
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12/07/2007
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Publication #:
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Pub Dt:
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06/11/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SHIELD
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Patent #:
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Issue Dt:
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02/02/2010
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Application #:
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11953340
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Filing Dt:
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12/10/2007
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Publication #:
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Pub Dt:
|
06/19/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THERMO-MECHANICAL INTERLOCKING SUBSTRATES
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Patent #:
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Issue Dt:
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07/06/2010
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Application #:
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11953857
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Filing Dt:
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12/10/2007
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Publication #:
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Pub Dt:
|
01/29/2009
| | | | |
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Title:
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METHOD OF FABRICATING A SEMICONDUCTOR MULTIPACKAGE MODULE INCLUDING A PROCESSOR AND MEMORY PACKAGE ASSEMBLIES
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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11954601
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Filing Dt:
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12/12/2007
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Publication #:
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Pub Dt:
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06/18/2009
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTABLE INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
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12/27/2011
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Application #:
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11954603
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Filing Dt:
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12/12/2007
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Publication #:
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Pub Dt:
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06/18/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKING
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Patent #:
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Issue Dt:
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07/26/2011
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Application #:
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11954607
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Filing Dt:
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12/12/2007
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Publication #:
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Pub Dt:
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06/18/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERCONNECT LOCK
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Patent #:
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Issue Dt:
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08/24/2010
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Application #:
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11954613
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Filing Dt:
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12/12/2007
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Publication #:
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Pub Dt:
|
06/18/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKING AND ANTI-FLASH STRUCTURE
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Patent #:
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Issue Dt:
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05/15/2012
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Application #:
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11956132
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Filing Dt:
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12/13/2007
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Publication #:
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Pub Dt:
|
06/18/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR SHIELDING ELECTROMAGNETIC INTERFERENCE
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Patent #:
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Issue Dt:
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08/03/2010
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Application #:
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11957101
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Filing Dt:
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12/14/2007
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Publication #:
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Pub Dt:
|
06/18/2009
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE FOR ENCAPSULATED DIE HAVING PRE-APPLIED PROTECTIVE LAYER
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Patent #:
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Issue Dt:
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11/29/2011
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Application #:
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11957845
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Filing Dt:
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12/17/2007
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Publication #:
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Pub Dt:
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06/18/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION
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Patent #:
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Issue Dt:
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02/28/2012
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Application #:
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11958546
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Filing Dt:
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12/18/2007
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PASSIVE DEVICES
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Patent #:
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Issue Dt:
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09/07/2010
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Application #:
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11958603
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Filing Dt:
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12/18/2007
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Publication #:
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Pub Dt:
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06/18/2009
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE MODULE
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Patent #:
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Issue Dt:
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05/04/2010
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Application #:
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11958838
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Filing Dt:
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12/18/2007
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Publication #:
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Pub Dt:
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06/18/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11964397
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Filing Dt:
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12/26/2007
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Publication #:
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Pub Dt:
|
07/02/2009
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Title:
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Semiconductor Device and Method of Forming the Device Using Sacrificial Carrier
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Patent #:
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Issue Dt:
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05/24/2011
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Application #:
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11964501
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Filing Dt:
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12/26/2007
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Publication #:
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Pub Dt:
|
07/02/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEAD LOCKING STRUCTURE
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Patent #:
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Issue Dt:
|
07/20/2010
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Application #:
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11964529
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Filing Dt:
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12/26/2007
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Publication #:
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Pub Dt:
|
07/02/2009
| | | | |
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Title:
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SYSTEM-IN-PACKAGE HAVING INTEGRATED PASSIVE DEVICES AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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08/09/2011
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Application #:
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11964567
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Filing Dt:
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12/26/2007
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Publication #:
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Pub Dt:
|
07/02/2009
| | | | |
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Title:
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LEADLESS PACKAGE SYSTEM HAVING EXTERNAL CONTACTS
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Patent #:
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Issue Dt:
|
12/14/2010
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Application #:
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11965160
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Filing Dt:
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12/27/2007
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Publication #:
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Pub Dt:
|
07/02/2009
| | | | |
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Title:
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SEMICONDUCTOR DEVICE WITH OPTICAL SENSOR AND METHOD OF FORMING INTERCONNECT STRUCTURE ON FRONT AND BACKSIDE OF THE DEVICE
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Patent #:
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Issue Dt:
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05/13/2014
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Application #:
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11965383
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Filing Dt:
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12/27/2007
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Publication #:
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Pub Dt:
|
07/02/2009
| | | | |
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Title:
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SYSTEM AND APPARATUS FOR WAFER LEVEL INTEGRATION OF COMPONENTS
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Patent #:
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Issue Dt:
|
08/06/2013
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Application #:
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11965550
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Filing Dt:
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12/27/2007
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Publication #:
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Pub Dt:
|
07/02/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXTENDED CORNER LEADS
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Patent #:
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Issue Dt:
|
05/11/2010
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Application #:
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11965586
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Filing Dt:
|
12/27/2007
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Publication #:
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|
Pub Dt:
|
07/02/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SHIELDING
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Patent #:
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Issue Dt:
|
03/22/2011
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Application #:
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11965621
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Filing Dt:
|
12/27/2007
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|
Publication #:
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|
Pub Dt:
|
07/02/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE WITH IMPROVED CONNECTIONS
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Patent #:
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Issue Dt:
|
09/21/2010
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Application #:
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11965641
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Filing Dt:
|
12/27/2007
|
|
Publication #:
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|
Pub Dt:
|
07/02/2009
| | | | |
|
Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING INTERPOSER
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Patent #:
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Issue Dt:
|
08/21/2012
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Application #:
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11965653
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Filing Dt:
|
12/27/2007
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|
Publication #:
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|
Pub Dt:
|
07/02/2009
| | | | |
|
Title:
|
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTRA-STACK ENCAPSULATION
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|
Patent #:
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|
Issue Dt:
|
10/11/2011
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Application #:
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11966219
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Filing Dt:
|
12/28/2007
|
|
Publication #:
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|
Pub Dt:
|
07/02/2009
| | | | |
|
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERPOSER
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|
Patent #:
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|
Issue Dt:
|
02/02/2010
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Application #:
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11968626
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Filing Dt:
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01/02/2008
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Publication #:
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Pub Dt:
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05/29/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PEDESTAL STRUCTURE
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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12005499
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Filing Dt:
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12/26/2007
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Publication #:
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Pub Dt:
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05/08/2008
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Title:
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STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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09/30/2014
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12014578
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Filing Dt:
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01/15/2008
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Publication #:
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Pub Dt:
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07/17/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADS HAVING MULTIPLE SIDES EXPOSED
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Patent #:
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Issue Dt:
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07/17/2012
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Application #:
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12018065
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Filing Dt:
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01/22/2008
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Publication #:
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Pub Dt:
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07/24/2008
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Title:
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SYSTEM FOR PEELING SEMICONDUCTOR CHIPS FROM TAPE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12018441
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Filing Dt:
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01/23/2008
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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Apparatus and process for precise encapsulation of flip chip interconnects
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Patent #:
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Issue Dt:
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12/31/2013
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Application #:
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12022296
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Filing Dt:
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01/30/2008
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Publication #:
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Pub Dt:
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07/30/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WAFER SCALE HEAT SLUG
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Patent #:
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Issue Dt:
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09/27/2011
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Application #:
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12025745
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Filing Dt:
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02/04/2008
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Publication #:
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Pub Dt:
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08/06/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERNAL STACKING MODULE ADHESIVE
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Patent #:
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Issue Dt:
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06/29/2010
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Application #:
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12032159
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Filing Dt:
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02/15/2008
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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WIRE BOND INTERCONNECTION
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Patent #:
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Issue Dt:
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09/04/2012
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Application #:
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12035493
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Filing Dt:
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02/22/2008
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Publication #:
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Pub Dt:
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08/27/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PENETRABLE FILM ADHESIVE
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Patent #:
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Issue Dt:
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10/11/2016
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Application #:
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12035843
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Filing Dt:
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02/22/2008
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Publication #:
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Pub Dt:
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08/27/2009
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Title:
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Semiconductor Interconnect Structure with Stacked Vias Separated by Signal Line and Method Therefor
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Patent #:
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Issue Dt:
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11/01/2011
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Application #:
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12036000
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Filing Dt:
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02/22/2008
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Publication #:
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Pub Dt:
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08/27/2009
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF SUPPORTING A WAFER DURING BACKGRINDING AND REFLOW OF SOLDER BUMPS
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12036056
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Filing Dt:
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02/22/2008
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Publication #:
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Pub Dt:
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08/27/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXTERNAL INTERCONNECTS WITHIN A DIE PLATFORM
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Patent #:
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Issue Dt:
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03/23/2010
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Application #:
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12037084
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Filing Dt:
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02/25/2008
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Publication #:
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Pub Dt:
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09/04/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH UNDERFILL
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Patent #:
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Issue Dt:
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11/29/2011
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Application #:
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12037291
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Filing Dt:
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02/26/2008
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Publication #:
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Pub Dt:
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08/27/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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12037343
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Filing Dt:
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02/26/2008
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Publication #:
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Pub Dt:
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08/27/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OVERHANG FILM
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Patent #:
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Issue Dt:
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03/20/2012
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Application #:
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12037774
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Filing Dt:
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02/26/2008
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Publication #:
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Pub Dt:
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08/27/2009
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Title:
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PACKAGE SYSTEM FOR SHIELDING SEMICONDUCTOR DIES FROM ELECTROMAGNETIC INTERFERENCE
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Patent #:
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Issue Dt:
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04/01/2014
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Application #:
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12040558
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Filing Dt:
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02/29/2008
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Publication #:
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Pub Dt:
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09/04/2008
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERPOSER
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Patent #:
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Issue Dt:
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08/09/2011
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Application #:
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12042026
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Filing Dt:
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03/04/2008
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Publication #:
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Pub Dt:
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09/10/2009
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Title:
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WAFER LEVEL DIE INTEGRATION AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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03/30/2010
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Application #:
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12042312
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Filing Dt:
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03/04/2008
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Publication #:
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Pub Dt:
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07/17/2008
| | | | |
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Title:
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METHOD OF FABRICATING A SEMICONDUCTOR MULTI PACKAGE MODULE HAVING AN INVERTED PACKAGE STACKED OVER BALL GRID ARRAY (BGA) PACKAGE
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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12042903
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Filing Dt:
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03/05/2008
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Publication #:
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Pub Dt:
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09/10/2009
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE WITH STACKED SEMICONDUCTOR DIE EACH HAVING IPD AND METHOD OF REDUCING MUTUAL INDUCTIVE COUPLING BY PROVIDING SELECTABLE VERTICAL AND LATERAL SEPARATION BETWEEN IPD
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Patent #:
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Issue Dt:
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09/13/2011
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Application #:
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12043789
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Filing Dt:
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03/06/2008
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Publication #:
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Pub Dt:
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09/10/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKED DEVICES
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Patent #:
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Issue Dt:
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03/20/2012
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Application #:
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12044688
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Filing Dt:
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03/07/2008
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Publication #:
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Pub Dt:
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09/10/2009
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Title:
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OPTICAL SEMICONDUCTOR DEVICE HAVING PRE-MOLDED LEADFRAME WITH WINDOW AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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12/27/2011
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Application #:
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12044803
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Filing Dt:
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03/07/2008
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Publication #:
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Pub Dt:
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09/10/2009
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE HAVING SEMICONDUCTOR DIE WITH INTERNAL VERTICAL INTERCONNECT STRUCTURE AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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03/30/2010
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Application #:
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12045606
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Filing Dt:
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03/10/2008
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Publication #:
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Pub Dt:
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07/17/2008
| | | | |
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Title:
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STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
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01/25/2011
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Application #:
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12045646
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Filing Dt:
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03/10/2008
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Publication #:
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Pub Dt:
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09/10/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT WITH STEP MOLDED INNER STACKING MODULE PACKAGE IN PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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11/29/2011
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Application #:
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12046369
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Filing Dt:
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03/11/2008
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Publication #:
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Pub Dt:
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09/17/2009
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Title:
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SYSTEM FOR SOLDER BALL INNER STACKING MODULE CONNECTION
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Patent #:
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Issue Dt:
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09/25/2012
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Application #:
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12046430
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Filing Dt:
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03/11/2008
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Publication #:
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Pub Dt:
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09/17/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRATION PORT
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12046761
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Filing Dt:
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03/12/2008
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Publication #:
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Pub Dt:
|
09/17/2009
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Title:
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Semiconductor Device Having High-Density Interconnect Array with Core Pillars Formed With OSP Coating
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Patent #:
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Issue Dt:
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07/06/2010
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Application #:
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12047640
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Filing Dt:
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03/13/2008
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Publication #:
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Pub Dt:
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09/17/2009
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Title:
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SEMICONDUCTOR DEVICE WITH INTEGRATED PASSIVE CIRCUIT AND METHOD OF MAKING THE SAME USING SACRIFICIAL SUBSTRATE
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Patent #:
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Issue Dt:
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08/02/2011
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Application #:
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12047979
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Filing Dt:
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03/13/2008
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Publication #:
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Pub Dt:
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09/17/2009
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE WITH PENETRABLE ENCAPSULANT JOINING SEMICONDUCTOR DIE AND METHOD THEREOF
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12050400
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Filing Dt:
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03/18/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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BALL GRID ARRAY PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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06/08/2010
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Application #:
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12050428
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Filing Dt:
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03/18/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ISOLATED LEADS
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Patent #:
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Issue Dt:
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07/03/2012
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Application #:
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12050797
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Filing Dt:
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03/18/2008
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Publication #:
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Pub Dt:
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10/02/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SINK SPACER STRUCTURES
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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12051246
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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FLIP CHIP INTERCONNECTION SYSTEM HAVING SOLDER POSITION CONTROL MECHANISM
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Patent #:
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Issue Dt:
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09/18/2012
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Application #:
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12051253
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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SEMICONDUCTOR DEVICE WITH CROSS-TALK ISOLATION USING M-CAP AND METHOD THEREOF
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Patent #:
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Issue Dt:
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08/02/2011
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Application #:
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12051267
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUPPORT STRUCTURE FOR DIE OVERHANG
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Patent #:
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Issue Dt:
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03/08/2011
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Application #:
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12051280
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
| | | | |
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Title:
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PACKAGE-ON-PACKAGE SYSTEM WITH INTERNAL STACKING MODULE INTERPOSER
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Patent #:
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Issue Dt:
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10/16/2012
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Application #:
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12051305
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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PACKAGE IN PACKAGE SYSTEM INCORPORATING AN INTERNAL STIFFENER COMPONENT
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Patent #:
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Issue Dt:
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12/14/2010
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Application #:
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12051349
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING OXIDE LAYER ON SIGNAL TRACES FOR ELECTRICAL ISOLATION IN FINE PITCH BONDING
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Patent #:
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Issue Dt:
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07/15/2014
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Application #:
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12051469
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
| | | | |
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Title:
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STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12051625
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
| | | | |
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Title:
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PACKAGE-ON-PACKAGE SYSTEM WITH VIA Z-INTERCONNECTIONS
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Patent #:
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Issue Dt:
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04/05/2011
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Application #:
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12052910
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Filing Dt:
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03/21/2008
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Publication #:
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Pub Dt:
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09/24/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
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Patent #:
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Issue Dt:
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08/21/2012
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Application #:
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12053751
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Filing Dt:
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03/24/2008
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Publication #:
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Pub Dt:
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09/24/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STEP MOLD RECESS
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Patent #:
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Issue Dt:
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09/28/2010
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Application #:
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12053760
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Filing Dt:
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03/24/2008
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Publication #:
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Pub Dt:
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09/24/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING MODULE
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Patent #:
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Issue Dt:
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08/31/2010
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Application #:
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12054682
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Filing Dt:
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03/25/2008
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Publication #:
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Pub Dt:
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10/01/2009
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXPOSED EXTERNAL INTERCONNECTS
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Patent #:
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Issue Dt:
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12/21/2010
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Application #:
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12054701
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Filing Dt:
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03/25/2008
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Publication #:
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Pub Dt:
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10/01/2009
| | | | |
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUBSTRATE
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Patent #:
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Issue Dt:
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07/20/2010
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Application #:
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12055152
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Filing Dt:
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03/25/2008
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Publication #:
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Pub Dt:
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10/01/2009
| | | | |
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Title:
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FLIP CHIP INTERCONNECTION STRUCTURE WITH BUMP ON PARTIAL PAD AND METHOD THEREOF
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