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Patent Assignment Details
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Reel/Frame:036288/0748   Pages: 247
Recorded: 08/06/2015
Attorney Dkt #:70341.00400
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1836
Page 7 of 19
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1
Patent #:
Issue Dt:
02/01/2011
Application #:
12055171
Filing Dt:
03/25/2008
Publication #:
Pub Dt:
10/01/2009
Title:
WAFER INTEGRATED WITH PERMANENT CARRIER AND METHOD THEREFOR
2
Patent #:
NONE
Issue Dt:
Application #:
12055612
Filing Dt:
03/26/2008
Publication #:
Pub Dt:
10/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REDISTRIBUTION
3
Patent #:
Issue Dt:
10/11/2011
Application #:
12055634
Filing Dt:
03/26/2008
Publication #:
Pub Dt:
10/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUPPORT STRUCTURE UNDER WIRE-IN-FILM ADHESIVE
4
Patent #:
Issue Dt:
01/18/2011
Application #:
12055642
Filing Dt:
03/26/2008
Publication #:
Pub Dt:
10/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH RIGID LOCKING LEAD
5
Patent #:
Issue Dt:
01/07/2014
Application #:
12055665
Filing Dt:
03/26/2008
Publication #:
Pub Dt:
10/01/2009
Title:
MOCK BUMP SYSTEM FOR FLIP CHIP INTEGRATED CIRCUITS
6
Patent #:
Issue Dt:
06/22/2010
Application #:
12055962
Filing Dt:
03/26/2008
Publication #:
Pub Dt:
10/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING MODULE
7
Patent #:
Issue Dt:
01/12/2016
Application #:
12056402
Filing Dt:
03/27/2008
Publication #:
Pub Dt:
10/01/2009
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
8
Patent #:
Issue Dt:
07/06/2010
Application #:
12056418
Filing Dt:
03/27/2008
Publication #:
Pub Dt:
10/01/2009
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
9
Patent #:
Issue Dt:
12/06/2011
Application #:
12057199
Filing Dt:
03/27/2008
Publication #:
Pub Dt:
10/01/2009
Title:
THROUGH HOLE VIAS AT SAW STREETS INCLUDING PROTRUSIONS OR RECESSES FOR INTERCONNECTION
10
Patent #:
Issue Dt:
12/21/2010
Application #:
12057299
Filing Dt:
03/27/2008
Publication #:
Pub Dt:
07/31/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH AN ENCAPSULANT CAVITY AND METHOD OF FABRICATION THEREOF
11
Patent #:
Issue Dt:
04/02/2013
Application #:
12057360
Filing Dt:
03/27/2008
Publication #:
Pub Dt:
10/23/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR PACKAGE STACKING AND METHOD OF MANUFACTURE THEREFOR
12
Patent #:
Issue Dt:
04/02/2013
Application #:
12059077
Filing Dt:
03/31/2008
Publication #:
Pub Dt:
07/31/2008
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE INCLUDING TAPE SUBSTRATE LAND GRID ARRAY PACKAGE STACKED OVER BALL GRID ARRAY PACKAGE
13
Patent #:
Issue Dt:
01/15/2013
Application #:
12060115
Filing Dt:
03/31/2008
Publication #:
Pub Dt:
10/01/2009
Title:
METHOD AND APPARATUS FOR A PACKAGE HAVING MULTIPLE STACKED DIE
14
Patent #:
Issue Dt:
04/20/2010
Application #:
12062293
Filing Dt:
04/03/2008
Publication #:
Pub Dt:
09/04/2008
Title:
A METHOD OF FORMING A BUMP-ON-LEAD FLIP CHIP INTERCONNECTION HAVING HIGHER ESCAPE ROUTING DENSITY
15
Patent #:
NONE
Issue Dt:
Application #:
12062403
Filing Dt:
04/03/2008
Publication #:
Pub Dt:
10/08/2009
Title:
Flip Chip Interconnection Structure Having Void-Free Fine Pitch and Method Thereof
16
Patent #:
Issue Dt:
06/28/2011
Application #:
12101915
Filing Dt:
04/11/2008
Publication #:
Pub Dt:
10/15/2009
Title:
INLINE INTEGRATED CIRCUIT SYSTEM
17
Patent #:
Issue Dt:
03/30/2010
Application #:
12101961
Filing Dt:
04/11/2008
Publication #:
Pub Dt:
10/15/2009
Title:
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH CENTRAL BOND WIRES
18
Patent #:
Issue Dt:
07/31/2012
Application #:
12113888
Filing Dt:
05/01/2008
Publication #:
Pub Dt:
08/28/2008
Title:
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE INTERCONNECT INTERFACE
19
Patent #:
Issue Dt:
06/28/2011
Application #:
12114744
Filing Dt:
05/02/2008
Publication #:
Pub Dt:
11/05/2009
Title:
INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
20
Patent #:
Issue Dt:
10/04/2011
Application #:
12121682
Filing Dt:
05/15/2008
Publication #:
Pub Dt:
11/19/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONFORMING CONDUCTIVE VIAS BETWEEN INSULATING LAYERS IN SAW STREETS
21
Patent #:
Issue Dt:
04/12/2011
Application #:
12121752
Filing Dt:
05/15/2008
Publication #:
Pub Dt:
05/21/2009
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH WIRE-IN-FILM ENCAPSULANT
22
Patent #:
Issue Dt:
12/28/2010
Application #:
12122631
Filing Dt:
05/16/2008
Publication #:
Pub Dt:
11/19/2009
Title:
PACKAGE SYSTEM INCORPORATING A FLIP-CHIP ASSEMBLY
23
Patent #:
NONE
Issue Dt:
Application #:
12122639
Filing Dt:
05/16/2008
Publication #:
Pub Dt:
11/19/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
24
Patent #:
Issue Dt:
03/17/2015
Application #:
12123995
Filing Dt:
05/20/2008
Publication #:
Pub Dt:
11/27/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH RELIEF
25
Patent #:
Issue Dt:
12/06/2011
Application #:
12124793
Filing Dt:
05/21/2008
Publication #:
Pub Dt:
11/26/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SHIELD AND TIE BAR
26
Patent #:
Issue Dt:
01/12/2010
Application #:
12125770
Filing Dt:
05/22/2008
Publication #:
Pub Dt:
09/11/2008
Title:
METHOD OF FABRICATING MODULE HAVING STACKED CHIP SCALE SEMICONDUCTOR PACKAGES
27
Patent #:
Issue Dt:
06/21/2011
Application #:
12126548
Filing Dt:
05/23/2008
Publication #:
Pub Dt:
11/26/2009
Title:
WIREBONDLESS WAFER LEVEL PACKAGE WITH PLATED BUMPS AND INTERCONNECTS
28
Patent #:
Issue Dt:
11/01/2011
Application #:
12126684
Filing Dt:
05/23/2008
Publication #:
Pub Dt:
05/21/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INSULATOR OVER CIRCUITRY
29
Patent #:
Issue Dt:
02/23/2010
Application #:
12127357
Filing Dt:
05/27/2008
Publication #:
Pub Dt:
12/03/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING DOUBLE-SIDED THROUGH VIAS IN SAW STREETS
30
Patent #:
Issue Dt:
06/22/2010
Application #:
12127417
Filing Dt:
05/27/2008
Publication #:
Pub Dt:
12/03/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH VIAS WITH REFLOWED CONDUCTIVE MATERIAL
31
Patent #:
Issue Dt:
01/19/2010
Application #:
12127472
Filing Dt:
05/27/2008
Publication #:
Pub Dt:
12/03/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING EMBEDDED PASSIVE CIRCUIT ELEMENTS INTERCONNECTED TO THROUGH HOLE VIAS
32
Patent #:
Issue Dt:
03/15/2011
Application #:
12128116
Filing Dt:
05/28/2008
Publication #:
Pub Dt:
12/03/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING HOLES IN SUBSTRATE TO INTERCONNECT TOP SHIELD AND GROUND SHIELD
33
Patent #:
Issue Dt:
03/23/2010
Application #:
12131038
Filing Dt:
05/30/2008
Publication #:
Pub Dt:
12/03/2009
Title:
PACKAGE-ON-PACKAGE SYSTEM WITH HEAT SPREADER
34
Patent #:
Issue Dt:
08/17/2010
Application #:
12132121
Filing Dt:
06/03/2008
Publication #:
Pub Dt:
12/11/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADED PACKAGE
35
Patent #:
Issue Dt:
08/10/2010
Application #:
12133133
Filing Dt:
06/04/2008
Publication #:
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE HAVING ELECTRICAL DEVICES MOUNTED TO IPD STRUCTURE AND METHOD OF SHIELDING ELECTROMAGNETIC INTERFERENCE
36
Patent #:
Issue Dt:
04/27/2010
Application #:
12133177
Filing Dt:
06/04/2008
Publication #:
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING RECESSED CONDUCTIVE VIAS IN SAW STREETS
37
Patent #:
Issue Dt:
01/24/2012
Application #:
12133216
Filing Dt:
06/04/2008
Publication #:
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF SHIELDING SEMICONDUCTOR DIE FROM INTER-DEVICE INTERFERENCE
38
Patent #:
Issue Dt:
04/03/2012
Application #:
12134179
Filing Dt:
06/05/2008
Publication #:
Pub Dt:
12/11/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFINGER
39
Patent #:
Issue Dt:
09/20/2011
Application #:
12135830
Filing Dt:
06/09/2008
Publication #:
Pub Dt:
12/10/2009
Title:
METHOD AND APPARATUS FOR THERMALLY ENHANCED SEMICONDUCTOR PACKAGE
40
Patent #:
Issue Dt:
11/01/2011
Application #:
12136002
Filing Dt:
06/09/2008
Publication #:
Pub Dt:
01/15/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLEXIBLE SUBSTRATE AND RECESSED PACKAGE
41
Patent #:
Issue Dt:
10/04/2011
Application #:
12136007
Filing Dt:
06/09/2008
Publication #:
Pub Dt:
01/15/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLEXIBLE SUBSTRATE AND MOUNDED PACKAGE
42
Patent #:
Issue Dt:
05/29/2012
Application #:
12136037
Filing Dt:
06/09/2008
Publication #:
Pub Dt:
12/10/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
43
Patent #:
Issue Dt:
09/01/2015
Application #:
12136682
Filing Dt:
06/10/2008
Publication #:
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING LAYER GROUNDED THROUGH METAL PILLARS FORMED IN PERIPHERAL REGION OF THE SEMICONDUCTOR
44
Patent #:
Issue Dt:
12/14/2010
Application #:
12136723
Filing Dt:
06/10/2008
Publication #:
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONNECTING A SHIELDING LAYER TO GROUND THROUGH CONDUCTIVE VIAS
45
Patent #:
Issue Dt:
07/12/2011
Application #:
12136768
Filing Dt:
06/10/2008
Publication #:
Pub Dt:
12/10/2009
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
46
Patent #:
Issue Dt:
01/04/2011
Application #:
12137242
Filing Dt:
06/11/2008
Publication #:
Pub Dt:
12/17/2009
Title:
METHOD AND APPARATUS FOR WAFER LEVEL INTEGRATION USING TAPERED VIAS
47
Patent #:
Issue Dt:
10/02/2012
Application #:
12137529
Filing Dt:
06/11/2008
Publication #:
Pub Dt:
12/17/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERNAL STACKING MODULE
48
Patent #:
Issue Dt:
11/17/2009
Application #:
12140092
Filing Dt:
06/16/2008
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING ALONG A PROFILE DISPOSED IN PERIPHERAL REGION AROUND THE DEVICE
49
Patent #:
Issue Dt:
10/18/2011
Application #:
12141059
Filing Dt:
06/17/2008
Publication #:
Pub Dt:
12/17/2009
Title:
BALL GRID ARRAY PACKAGE STACKING SYSTEM
50
Patent #:
Issue Dt:
06/28/2011
Application #:
12142743
Filing Dt:
06/19/2008
Publication #:
Pub Dt:
01/22/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH TRIPLE FILM SPACER HAVING EMBEDDED FILLERS AND METHOD OF MANUFACTURE THEREOF
51
Patent #:
Issue Dt:
03/20/2012
Application #:
12143047
Filing Dt:
06/20/2008
Publication #:
Pub Dt:
12/24/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE-IN-FILM ENCAPSULATION
52
Patent #:
Issue Dt:
02/07/2012
Application #:
12144931
Filing Dt:
06/24/2008
Publication #:
Pub Dt:
01/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRAL INNER LEAD AND PADDLE
53
Patent #:
Issue Dt:
11/09/2010
Application #:
12146101
Filing Dt:
06/25/2008
Publication #:
Pub Dt:
12/31/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM STACKABLE DEVICES
54
Patent #:
Issue Dt:
06/28/2011
Application #:
12146124
Filing Dt:
06/25/2008
Publication #:
Pub Dt:
12/31/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONFORMAL SHIELDING AND METHOD OF MANUFACTURE THEREOF
55
Patent #:
Issue Dt:
06/07/2011
Application #:
12146135
Filing Dt:
06/25/2008
Publication #:
Pub Dt:
12/31/2009
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
56
Patent #:
Issue Dt:
01/18/2011
Application #:
12146411
Filing Dt:
06/25/2008
Publication #:
Pub Dt:
12/31/2009
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTRA-STACK ENCAPSULATION
57
Patent #:
Issue Dt:
10/29/2013
Application #:
12166169
Filing Dt:
07/01/2008
Publication #:
Pub Dt:
01/07/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEAD-FRAME PADDLE SCHEME FOR SINGLE AXIS PARTIAL SAW ISOLATION
58
Patent #:
Issue Dt:
03/15/2011
Application #:
12167039
Filing Dt:
07/02/2008
Publication #:
Pub Dt:
01/07/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF SHUNT TEST MEASUREMENT FOR PASSIVE CIRCUITS
59
Patent #:
Issue Dt:
08/10/2010
Application #:
12167146
Filing Dt:
07/02/2008
Publication #:
Pub Dt:
01/07/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING ELECTROSTATIC DISCHARGE PROTECTION FOR INTEGRATED PASSIVE DEVICES
60
Patent #:
Issue Dt:
06/04/2013
Application #:
12168803
Filing Dt:
07/07/2008
Publication #:
Pub Dt:
01/07/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH BUMPED LEAD AND NONBUMPED LEAD
61
Patent #:
Issue Dt:
08/09/2011
Application #:
12169342
Filing Dt:
07/08/2008
Publication #:
Pub Dt:
01/15/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE-IN-FILM ISOLATION BARRIER
62
Patent #:
Issue Dt:
03/01/2011
Application #:
12171890
Filing Dt:
07/11/2008
Publication #:
Pub Dt:
01/14/2010
Title:
PACKAGE STACKING SYSTEM WITH MOLD CONTAMINATION PREVENTION
63
Patent #:
Issue Dt:
09/18/2012
Application #:
12172095
Filing Dt:
07/11/2008
Publication #:
Pub Dt:
01/14/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CHIP ON LEAD
64
Patent #:
Issue Dt:
02/09/2010
Application #:
12172817
Filing Dt:
07/14/2008
Publication #:
Pub Dt:
01/14/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED-DOWN RDL AND RECESSED THV IN PERIPHERAL REGION OF THE DEVICE
65
Patent #:
Issue Dt:
11/30/2010
Application #:
12173504
Filing Dt:
07/15/2008
Publication #:
Pub Dt:
01/21/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING A THERMAL DISSIPATION PATH THROUGH RDL AND CONDUCTIVE VIA
66
Patent #:
Issue Dt:
03/22/2016
Application #:
12182132
Filing Dt:
07/30/2008
Publication #:
Pub Dt:
02/04/2010
Title:
RDL PATTERNING WITH PACKAGE ON PACKAGE SYSTEM
67
Patent #:
Issue Dt:
11/13/2012
Application #:
12182283
Filing Dt:
07/30/2008
Publication #:
Pub Dt:
02/05/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING COMMON VOLTAGE BUS AND WIRE BONDABLE REDISTRIBUTION
68
Patent #:
Issue Dt:
01/21/2014
Application #:
12184219
Filing Dt:
07/31/2008
Publication #:
Pub Dt:
10/01/2009
Title:
MOCK BUMP SYSTEM FOR FLIP CHIP INTEGRATED CIRCUITS
69
Patent #:
Issue Dt:
04/26/2011
Application #:
12185058
Filing Dt:
08/01/2008
Publication #:
Pub Dt:
02/04/2010
Title:
A METHOD FOR FORMING AN ETCHED RECESS PACKAGE ON PACKAGE SYSTEM
70
Patent #:
Issue Dt:
11/06/2012
Application #:
12185061
Filing Dt:
08/01/2008
Publication #:
Pub Dt:
02/04/2010
Title:
FAN-IN INTERPOSER ON LEAD FRAME FOR AN INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
71
Patent #:
Issue Dt:
08/23/2011
Application #:
12185063
Filing Dt:
08/01/2008
Publication #:
Pub Dt:
02/04/2010
Title:
INTEGRATED CIRCUIT PACKAGE STACKING SYSTEM
72
Patent #:
Issue Dt:
07/12/2011
Application #:
12185067
Filing Dt:
08/01/2008
Publication #:
Pub Dt:
02/04/2010
Title:
MULTI-LAYER PACKAGE-ON-PACKAGE SYSTEM
73
Patent #:
Issue Dt:
03/13/2012
Application #:
12185616
Filing Dt:
08/04/2008
Publication #:
Pub Dt:
02/04/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONCAVE TERMINAL
74
Patent #:
Issue Dt:
07/06/2010
Application #:
12188210
Filing Dt:
08/08/2008
Publication #:
Pub Dt:
02/11/2010
Title:
TRIPLE TIER PACKAGE ON PACKAGE SYSTEM
75
Patent #:
Issue Dt:
09/18/2012
Application #:
12188995
Filing Dt:
08/08/2008
Publication #:
Pub Dt:
02/11/2010
Title:
EXPOSED INTERCONNECT FOR A PACKAGE ON PACKAGE SYSTEM
76
Patent #:
Issue Dt:
04/06/2010
Application #:
12191542
Filing Dt:
08/14/2008
Publication #:
Pub Dt:
12/04/2008
Title:
CHIP SCALE PACKAGE HAVING FLIP CHIP INTERCONNECT ON DIE PADDLE
77
Patent #:
Issue Dt:
04/06/2010
Application #:
12191542
Filing Dt:
08/14/2008
Publication #:
Pub Dt:
12/04/2008
Title:
CHIP SCALE PACKAGE HAVING FLIP CHIP INTERCONNECT ON DIE PADDLE
78
Patent #:
Issue Dt:
09/23/2014
Application #:
12192042
Filing Dt:
08/14/2008
Publication #:
Pub Dt:
02/18/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLD GATE
79
Patent #:
Issue Dt:
08/02/2011
Application #:
12192052
Filing Dt:
08/14/2008
Publication #:
Pub Dt:
02/18/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING A CAVITY
80
Patent #:
Issue Dt:
08/20/2013
Application #:
12193540
Filing Dt:
08/18/2008
Publication #:
Pub Dt:
02/18/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
81
Patent #:
Issue Dt:
01/24/2012
Application #:
12194506
Filing Dt:
08/19/2008
Publication #:
Pub Dt:
02/25/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
82
Patent #:
Issue Dt:
03/27/2012
Application #:
12194507
Filing Dt:
08/19/2008
Publication #:
Pub Dt:
02/25/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FLIP CHIP
83
Patent #:
Issue Dt:
09/02/2014
Application #:
12197209
Filing Dt:
08/22/2008
Publication #:
Pub Dt:
02/25/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM HAVING CAVITY
84
Patent #:
Issue Dt:
10/25/2011
Application #:
12198491
Filing Dt:
08/26/2008
Publication #:
Pub Dt:
03/04/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REDISTRIBUTION LAYER
85
Patent #:
Issue Dt:
01/18/2011
Application #:
12201896
Filing Dt:
08/29/2008
Publication #:
Pub Dt:
03/05/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING AN OFFSET STACKED CONFIGURATION
86
Patent #:
Issue Dt:
11/16/2010
Application #:
12203332
Filing Dt:
09/03/2008
Publication #:
Pub Dt:
05/21/2009
Title:
DROP-MOLD CONFORMABLE MATERIAL AS AN ENCAPSULATION FOR AN INTEGRATED CIRCUIT PACKAGE SYSTEM
87
Patent #:
Issue Dt:
11/09/2010
Application #:
12205695
Filing Dt:
09/05/2008
Publication #:
Pub Dt:
03/26/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF LASER-MARKING WAFERS WITH TAPE APPLIED TO ITS ACTIVE SURFACE
88
Patent #:
Issue Dt:
04/26/2016
Application #:
12205727
Filing Dt:
09/05/2008
Publication #:
Pub Dt:
03/11/2010
Title:
Semiconductor Device and Method of Forming Shielding Layer over Integrated Passive Device Using Conductive Channels
89
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09/11/2012
Application #:
12205755
Filing Dt:
09/05/2008
Publication #:
Pub Dt:
03/11/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING AN IPD OVER A HIGH-RESISTIVITY ENCAPSULANT SEPARATED FROM OTHER IPDS AND BASEBAND CIRCUIT
90
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10/18/2011
Application #:
12205841
Filing Dt:
09/05/2008
Publication #:
Pub Dt:
03/11/2010
Title:
LEADLESS SEMICONDUCTOR CHIP CARRIER SYSTEM
91
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Issue Dt:
01/18/2011
Application #:
12206383
Filing Dt:
09/08/2008
Publication #:
Pub Dt:
03/11/2010
Title:
BALL GRID ARRAY PACKAGE STACKING SYSTEM
92
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03/06/2012
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12207324
Filing Dt:
09/09/2008
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Pub Dt:
03/26/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE IN NON-ACTIVE AREA OF WAFER
93
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05/22/2012
Application #:
12207332
Filing Dt:
09/09/2008
Publication #:
Pub Dt:
03/11/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-OUT STRUCTURE WITH INTEGRATED PASSIVE DEVICE AND DISCRETE COMPONENT
94
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10/12/2010
Application #:
12207459
Filing Dt:
09/09/2008
Publication #:
Pub Dt:
03/11/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REDISTRIBUTION LAYER
95
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10/16/2012
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12207493
Filing Dt:
09/09/2008
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Pub Dt:
03/19/2009
Title:
MEMORY DEVICE SYSTEM WITH STACKED PACKAGES
96
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03/01/2011
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12207986
Filing Dt:
09/10/2008
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Pub Dt:
03/11/2010
Title:
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97
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Issue Dt:
01/31/2017
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12209838
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09/12/2008
Publication #:
Pub Dt:
03/18/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-IN PACKAGE-ON-PACKAGE STRUCTURE USING THROUGH-SILICON VIAS
98
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08/10/2010
Application #:
12212524
Filing Dt:
09/17/2008
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Pub Dt:
03/18/2010
Title:
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99
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02/15/2011
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12235000
Filing Dt:
09/22/2008
Publication #:
Pub Dt:
03/25/2010
Title:
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100
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03/27/2012
Application #:
12235111
Filing Dt:
09/22/2008
Publication #:
Pub Dt:
04/09/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING DIE HAVING RELIEVED ACTIVE REGION
Assignors
1
Exec Dt:
08/06/2015
2
Exec Dt:
08/06/2015
Assignee
1
39TH FLOOR, CITIBANK TOWER, CITIBANK PLAZA, 3 GARDEN ROAD
ATTENTION: AGENCY AND TRUST
CENTRAL, HONG KONG
Correspondence name and address
LAWRENCE KASS
28 LIBERTY STREET
C/O LAWRENCE KASS
NEW YORK, NY 10005

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