|
|
Patent #:
|
|
Issue Dt:
|
02/01/2011
|
Application #:
|
12055171
|
Filing Dt:
|
03/25/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
WAFER INTEGRATED WITH PERMANENT CARRIER AND METHOD THEREFOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12055612
|
Filing Dt:
|
03/26/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REDISTRIBUTION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2011
|
Application #:
|
12055634
|
Filing Dt:
|
03/26/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUPPORT STRUCTURE UNDER WIRE-IN-FILM ADHESIVE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
|
Application #:
|
12055642
|
Filing Dt:
|
03/26/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH RIGID LOCKING LEAD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
12055665
|
Filing Dt:
|
03/26/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
MOCK BUMP SYSTEM FOR FLIP CHIP INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2010
|
Application #:
|
12055962
|
Filing Dt:
|
03/26/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2016
|
Application #:
|
12056402
|
Filing Dt:
|
03/27/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
12056418
|
Filing Dt:
|
03/27/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2011
|
Application #:
|
12057199
|
Filing Dt:
|
03/27/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
THROUGH HOLE VIAS AT SAW STREETS INCLUDING PROTRUSIONS OR RECESSES FOR INTERCONNECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2010
|
Application #:
|
12057299
|
Filing Dt:
|
03/27/2008
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH AN ENCAPSULANT CAVITY AND METHOD OF FABRICATION THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
12057360
|
Filing Dt:
|
03/27/2008
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR PACKAGE STACKING AND METHOD OF MANUFACTURE THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
12059077
|
Filing Dt:
|
03/31/2008
|
Publication #:
|
|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
SEMICONDUCTOR MULTI-PACKAGE MODULE INCLUDING TAPE SUBSTRATE LAND GRID ARRAY PACKAGE STACKED OVER BALL GRID ARRAY PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2013
|
Application #:
|
12060115
|
Filing Dt:
|
03/31/2008
|
Publication #:
|
|
Pub Dt:
|
10/01/2009
| | | | |
Title:
|
METHOD AND APPARATUS FOR A PACKAGE HAVING MULTIPLE STACKED DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
12062293
|
Filing Dt:
|
04/03/2008
|
Publication #:
|
|
Pub Dt:
|
09/04/2008
| | | | |
Title:
|
A METHOD OF FORMING A BUMP-ON-LEAD FLIP CHIP INTERCONNECTION HAVING HIGHER ESCAPE ROUTING DENSITY
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12062403
|
Filing Dt:
|
04/03/2008
|
Publication #:
|
|
Pub Dt:
|
10/08/2009
| | | | |
Title:
|
Flip Chip Interconnection Structure Having Void-Free Fine Pitch and Method Thereof
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2011
|
Application #:
|
12101915
|
Filing Dt:
|
04/11/2008
|
Publication #:
|
|
Pub Dt:
|
10/15/2009
| | | | |
Title:
|
INLINE INTEGRATED CIRCUIT SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2010
|
Application #:
|
12101961
|
Filing Dt:
|
04/11/2008
|
Publication #:
|
|
Pub Dt:
|
10/15/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH CENTRAL BOND WIRES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2012
|
Application #:
|
12113888
|
Filing Dt:
|
05/01/2008
|
Publication #:
|
|
Pub Dt:
|
08/28/2008
| | | | |
Title:
|
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE INTERCONNECT INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2011
|
Application #:
|
12114744
|
Filing Dt:
|
05/02/2008
|
Publication #:
|
|
Pub Dt:
|
11/05/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2011
|
Application #:
|
12121682
|
Filing Dt:
|
05/15/2008
|
Publication #:
|
|
Pub Dt:
|
11/19/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF CONFORMING CONDUCTIVE VIAS BETWEEN INSULATING LAYERS IN SAW STREETS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2011
|
Application #:
|
12121752
|
Filing Dt:
|
05/15/2008
|
Publication #:
|
|
Pub Dt:
|
05/21/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH WIRE-IN-FILM ENCAPSULANT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2010
|
Application #:
|
12122631
|
Filing Dt:
|
05/16/2008
|
Publication #:
|
|
Pub Dt:
|
11/19/2009
| | | | |
Title:
|
PACKAGE SYSTEM INCORPORATING A FLIP-CHIP ASSEMBLY
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12122639
|
Filing Dt:
|
05/16/2008
|
Publication #:
|
|
Pub Dt:
|
11/19/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2015
|
Application #:
|
12123995
|
Filing Dt:
|
05/20/2008
|
Publication #:
|
|
Pub Dt:
|
11/27/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH RELIEF
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2011
|
Application #:
|
12124793
|
Filing Dt:
|
05/21/2008
|
Publication #:
|
|
Pub Dt:
|
11/26/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SHIELD AND TIE BAR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2010
|
Application #:
|
12125770
|
Filing Dt:
|
05/22/2008
|
Publication #:
|
|
Pub Dt:
|
09/11/2008
| | | | |
Title:
|
METHOD OF FABRICATING MODULE HAVING STACKED CHIP SCALE SEMICONDUCTOR PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2011
|
Application #:
|
12126548
|
Filing Dt:
|
05/23/2008
|
Publication #:
|
|
Pub Dt:
|
11/26/2009
| | | | |
Title:
|
WIREBONDLESS WAFER LEVEL PACKAGE WITH PLATED BUMPS AND INTERCONNECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
|
Application #:
|
12126684
|
Filing Dt:
|
05/23/2008
|
Publication #:
|
|
Pub Dt:
|
05/21/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INSULATOR OVER CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2010
|
Application #:
|
12127357
|
Filing Dt:
|
05/27/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING DOUBLE-SIDED THROUGH VIAS IN SAW STREETS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2010
|
Application #:
|
12127417
|
Filing Dt:
|
05/27/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH VIAS WITH REFLOWED CONDUCTIVE MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2010
|
Application #:
|
12127472
|
Filing Dt:
|
05/27/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING EMBEDDED PASSIVE CIRCUIT ELEMENTS INTERCONNECTED TO THROUGH HOLE VIAS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2011
|
Application #:
|
12128116
|
Filing Dt:
|
05/28/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING HOLES IN SUBSTRATE TO INTERCONNECT TOP SHIELD AND GROUND SHIELD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2010
|
Application #:
|
12131038
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
PACKAGE-ON-PACKAGE SYSTEM WITH HEAT SPREADER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2010
|
Application #:
|
12132121
|
Filing Dt:
|
06/03/2008
|
Publication #:
|
|
Pub Dt:
|
12/11/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADED PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2010
|
Application #:
|
12133133
|
Filing Dt:
|
06/04/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING ELECTRICAL DEVICES MOUNTED TO IPD STRUCTURE AND METHOD OF SHIELDING ELECTROMAGNETIC INTERFERENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2010
|
Application #:
|
12133177
|
Filing Dt:
|
06/04/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING RECESSED CONDUCTIVE VIAS IN SAW STREETS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2012
|
Application #:
|
12133216
|
Filing Dt:
|
06/04/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF SHIELDING SEMICONDUCTOR DIE FROM INTER-DEVICE INTERFERENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2012
|
Application #:
|
12134179
|
Filing Dt:
|
06/05/2008
|
Publication #:
|
|
Pub Dt:
|
12/11/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFINGER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2011
|
Application #:
|
12135830
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
METHOD AND APPARATUS FOR THERMALLY ENHANCED SEMICONDUCTOR PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
|
Application #:
|
12136002
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
01/15/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLEXIBLE SUBSTRATE AND RECESSED PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2011
|
Application #:
|
12136007
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
01/15/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLEXIBLE SUBSTRATE AND MOUNDED PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2012
|
Application #:
|
12136037
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/2015
|
Application #:
|
12136682
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING LAYER GROUNDED THROUGH METAL PILLARS FORMED IN PERIPHERAL REGION OF THE SEMICONDUCTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
12136723
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF CONNECTING A SHIELDING LAYER TO GROUND THROUGH CONDUCTIVE VIAS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2011
|
Application #:
|
12136768
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
MOUNTABLE INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
12137242
|
Filing Dt:
|
06/11/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
METHOD AND APPARATUS FOR WAFER LEVEL INTEGRATION USING TAPERED VIAS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2012
|
Application #:
|
12137529
|
Filing Dt:
|
06/11/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERNAL STACKING MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2009
|
Application #:
|
12140092
|
Filing Dt:
|
06/16/2008
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING ALONG A PROFILE DISPOSED IN PERIPHERAL REGION AROUND THE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2011
|
Application #:
|
12141059
|
Filing Dt:
|
06/17/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
BALL GRID ARRAY PACKAGE STACKING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2011
|
Application #:
|
12142743
|
Filing Dt:
|
06/19/2008
|
Publication #:
|
|
Pub Dt:
|
01/22/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH TRIPLE FILM SPACER HAVING EMBEDDED FILLERS AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2012
|
Application #:
|
12143047
|
Filing Dt:
|
06/20/2008
|
Publication #:
|
|
Pub Dt:
|
12/24/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE-IN-FILM ENCAPSULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12144931
|
Filing Dt:
|
06/24/2008
|
Publication #:
|
|
Pub Dt:
|
01/01/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRAL INNER LEAD AND PADDLE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
12146101
|
Filing Dt:
|
06/25/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM STACKABLE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2011
|
Application #:
|
12146124
|
Filing Dt:
|
06/25/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONFORMAL SHIELDING AND METHOD OF MANUFACTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2011
|
Application #:
|
12146135
|
Filing Dt:
|
06/25/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
|
Application #:
|
12146411
|
Filing Dt:
|
06/25/2008
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTRA-STACK ENCAPSULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2013
|
Application #:
|
12166169
|
Filing Dt:
|
07/01/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEAD-FRAME PADDLE SCHEME FOR SINGLE AXIS PARTIAL SAW ISOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2011
|
Application #:
|
12167039
|
Filing Dt:
|
07/02/2008
|
Publication #:
|
|
Pub Dt:
|
01/07/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF SHUNT TEST MEASUREMENT FOR PASSIVE CIRCUITS
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Patent #:
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Issue Dt:
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08/10/2010
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Application #:
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12167146
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Filing Dt:
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07/02/2008
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Publication #:
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Pub Dt:
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01/07/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING ELECTROSTATIC DISCHARGE PROTECTION FOR INTEGRATED PASSIVE DEVICES
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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12168803
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Filing Dt:
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07/07/2008
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Publication #:
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Pub Dt:
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01/07/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH BUMPED LEAD AND NONBUMPED LEAD
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Patent #:
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Issue Dt:
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08/09/2011
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Application #:
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12169342
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Filing Dt:
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07/08/2008
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Publication #:
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Pub Dt:
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01/15/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE-IN-FILM ISOLATION BARRIER
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Patent #:
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Issue Dt:
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03/01/2011
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Application #:
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12171890
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Filing Dt:
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07/11/2008
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Publication #:
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Pub Dt:
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01/14/2010
| | | | |
Title:
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PACKAGE STACKING SYSTEM WITH MOLD CONTAMINATION PREVENTION
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Patent #:
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Issue Dt:
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09/18/2012
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Application #:
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12172095
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Filing Dt:
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07/11/2008
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Publication #:
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Pub Dt:
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01/14/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CHIP ON LEAD
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Patent #:
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Issue Dt:
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02/09/2010
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Application #:
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12172817
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Filing Dt:
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07/14/2008
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Publication #:
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Pub Dt:
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01/14/2010
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED-DOWN RDL AND RECESSED THV IN PERIPHERAL REGION OF THE DEVICE
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Patent #:
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Issue Dt:
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11/30/2010
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Application #:
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12173504
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Filing Dt:
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07/15/2008
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Publication #:
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Pub Dt:
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01/21/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING A THERMAL DISSIPATION PATH THROUGH RDL AND CONDUCTIVE VIA
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Patent #:
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Issue Dt:
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03/22/2016
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Application #:
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12182132
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Filing Dt:
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07/30/2008
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Publication #:
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Pub Dt:
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02/04/2010
| | | | |
Title:
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RDL PATTERNING WITH PACKAGE ON PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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11/13/2012
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Application #:
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12182283
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Filing Dt:
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07/30/2008
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Publication #:
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Pub Dt:
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02/05/2009
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING COMMON VOLTAGE BUS AND WIRE BONDABLE REDISTRIBUTION
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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12184219
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Filing Dt:
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07/31/2008
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Publication #:
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Pub Dt:
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10/01/2009
| | | | |
Title:
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MOCK BUMP SYSTEM FOR FLIP CHIP INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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04/26/2011
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Application #:
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12185058
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Filing Dt:
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08/01/2008
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Publication #:
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Pub Dt:
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02/04/2010
| | | | |
Title:
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A METHOD FOR FORMING AN ETCHED RECESS PACKAGE ON PACKAGE SYSTEM
|
|
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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12185061
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Filing Dt:
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08/01/2008
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Publication #:
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Pub Dt:
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02/04/2010
| | | | |
Title:
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FAN-IN INTERPOSER ON LEAD FRAME FOR AN INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
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|
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Patent #:
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Issue Dt:
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08/23/2011
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Application #:
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12185063
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Filing Dt:
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08/01/2008
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Publication #:
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Pub Dt:
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02/04/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE STACKING SYSTEM
|
|
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Patent #:
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|
Issue Dt:
|
07/12/2011
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Application #:
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12185067
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Filing Dt:
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08/01/2008
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Publication #:
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Pub Dt:
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02/04/2010
| | | | |
Title:
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MULTI-LAYER PACKAGE-ON-PACKAGE SYSTEM
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|
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Patent #:
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Issue Dt:
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03/13/2012
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Application #:
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12185616
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Filing Dt:
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08/04/2008
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Publication #:
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Pub Dt:
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02/04/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONCAVE TERMINAL
|
|
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Patent #:
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|
Issue Dt:
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07/06/2010
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Application #:
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12188210
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Filing Dt:
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08/08/2008
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Publication #:
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Pub Dt:
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02/11/2010
| | | | |
Title:
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TRIPLE TIER PACKAGE ON PACKAGE SYSTEM
|
|
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Patent #:
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Issue Dt:
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09/18/2012
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Application #:
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12188995
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Filing Dt:
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08/08/2008
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Publication #:
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Pub Dt:
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02/11/2010
| | | | |
Title:
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EXPOSED INTERCONNECT FOR A PACKAGE ON PACKAGE SYSTEM
|
|
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Patent #:
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|
Issue Dt:
|
04/06/2010
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Application #:
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12191542
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Filing Dt:
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08/14/2008
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Publication #:
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Pub Dt:
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12/04/2008
| | | | |
Title:
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CHIP SCALE PACKAGE HAVING FLIP CHIP INTERCONNECT ON DIE PADDLE
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|
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Patent #:
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Issue Dt:
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04/06/2010
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Application #:
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12191542
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Filing Dt:
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08/14/2008
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Publication #:
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Pub Dt:
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12/04/2008
| | | | |
Title:
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CHIP SCALE PACKAGE HAVING FLIP CHIP INTERCONNECT ON DIE PADDLE
|
|
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Patent #:
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|
Issue Dt:
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09/23/2014
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Application #:
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12192042
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Filing Dt:
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08/14/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLD GATE
|
|
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Patent #:
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|
Issue Dt:
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08/02/2011
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Application #:
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12192052
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Filing Dt:
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08/14/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING A CAVITY
|
|
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Patent #:
|
|
Issue Dt:
|
08/20/2013
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Application #:
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12193540
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Filing Dt:
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08/18/2008
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Publication #:
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Pub Dt:
|
02/18/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
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Patent #:
|
|
Issue Dt:
|
01/24/2012
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Application #:
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12194506
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
|
02/25/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
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Application #:
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12194507
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
|
02/25/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FLIP CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
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Application #:
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12197209
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Filing Dt:
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08/22/2008
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Publication #:
|
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Pub Dt:
|
02/25/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM HAVING CAVITY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2011
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Application #:
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12198491
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Filing Dt:
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08/26/2008
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Publication #:
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|
Pub Dt:
|
03/04/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REDISTRIBUTION LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
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Application #:
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12201896
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Filing Dt:
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08/29/2008
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Publication #:
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Pub Dt:
|
03/05/2009
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING AN OFFSET STACKED CONFIGURATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2010
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Application #:
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12203332
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Filing Dt:
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09/03/2008
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Publication #:
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Pub Dt:
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05/21/2009
| | | | |
Title:
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DROP-MOLD CONFORMABLE MATERIAL AS AN ENCAPSULATION FOR AN INTEGRATED CIRCUIT PACKAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
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Application #:
|
12205695
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Filing Dt:
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09/05/2008
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Publication #:
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|
Pub Dt:
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03/26/2009
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF LASER-MARKING WAFERS WITH TAPE APPLIED TO ITS ACTIVE SURFACE
|
|
|
Patent #:
|
|
Issue Dt:
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04/26/2016
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Application #:
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12205727
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Filing Dt:
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09/05/2008
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Publication #:
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Pub Dt:
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03/11/2010
| | | | |
Title:
|
Semiconductor Device and Method of Forming Shielding Layer over Integrated Passive Device Using Conductive Channels
|
|
|
Patent #:
|
|
Issue Dt:
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09/11/2012
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Application #:
|
12205755
|
Filing Dt:
|
09/05/2008
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Publication #:
|
|
Pub Dt:
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03/11/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING AN IPD OVER A HIGH-RESISTIVITY ENCAPSULANT SEPARATED FROM OTHER IPDS AND BASEBAND CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2011
|
Application #:
|
12205841
|
Filing Dt:
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09/05/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
LEADLESS SEMICONDUCTOR CHIP CARRIER SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2011
|
Application #:
|
12206383
|
Filing Dt:
|
09/08/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
BALL GRID ARRAY PACKAGE STACKING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12207324
|
Filing Dt:
|
09/09/2008
|
Publication #:
|
|
Pub Dt:
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03/26/2009
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE IN NON-ACTIVE AREA OF WAFER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2012
|
Application #:
|
12207332
|
Filing Dt:
|
09/09/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-OUT STRUCTURE WITH INTEGRATED PASSIVE DEVICE AND DISCRETE COMPONENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2010
|
Application #:
|
12207459
|
Filing Dt:
|
09/09/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REDISTRIBUTION LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12207493
|
Filing Dt:
|
09/09/2008
|
Publication #:
|
|
Pub Dt:
|
03/19/2009
| | | | |
Title:
|
MEMORY DEVICE SYSTEM WITH STACKED PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2011
|
Application #:
|
12207986
|
Filing Dt:
|
09/10/2008
|
Publication #:
|
|
Pub Dt:
|
03/11/2010
| | | | |
Title:
|
METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON RECESSED AND RAISED BOND FINGERS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2017
|
Application #:
|
12209838
|
Filing Dt:
|
09/12/2008
|
Publication #:
|
|
Pub Dt:
|
03/18/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-IN PACKAGE-ON-PACKAGE STRUCTURE USING THROUGH-SILICON VIAS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2010
|
Application #:
|
12212524
|
Filing Dt:
|
09/17/2008
|
Publication #:
|
|
Pub Dt:
|
03/18/2010
| | | | |
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH-FREQUENCY CIRCUIT STRUCTURE AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12235000
|
Filing Dt:
|
09/22/2008
|
Publication #:
|
|
Pub Dt:
|
03/25/2010
| | | | |
Title:
|
METHOD OF FORMING A WAFER LEVEL PACKAGE WITH RDL [[BUMP]] INTERCONNECTION OVER ENCAPSULANT BETWEEN BUMP AND SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2012
|
Application #:
|
12235111
|
Filing Dt:
|
09/22/2008
|
Publication #:
|
|
Pub Dt:
|
04/09/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING DIE HAVING RELIEVED ACTIVE REGION
|
|