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Patent #:
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NONE
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Issue Dt:
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Application #:
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12412886
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Filing Dt:
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03/27/2009
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH POST TYPE INTERCONNECTOR AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/12/2011
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Application #:
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12413302
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Filing Dt:
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03/27/2009
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Publication #:
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Pub Dt:
|
09/30/2010
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING DUAL SIDED CONNECTION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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10/18/2011
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Application #:
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12423099
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Filing Dt:
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04/14/2009
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Publication #:
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Pub Dt:
|
10/14/2010
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT AND HEAT SPREADER WITH OPENINGS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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09/13/2011
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Application #:
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12423320
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Filing Dt:
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04/14/2009
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Publication #:
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Pub Dt:
|
08/06/2009
| | | | |
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Title:
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SHIELDED STACKED INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/06/2012
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Application #:
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12432137
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Filing Dt:
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04/29/2009
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Publication #:
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Pub Dt:
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08/20/2009
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Title:
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FLIP CHIP INTERCONNECTION PAD LAYOUT
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Patent #:
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Issue Dt:
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04/26/2011
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Application #:
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12433852
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Filing Dt:
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04/30/2009
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Publication #:
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Pub Dt:
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09/03/2009
| | | | |
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Title:
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MULTIPACKAGE MODULE HAVING STACKED PACKAGES WITH ASYMMETRICALLY ARRANGED DIE AND MOLDING
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Patent #:
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Issue Dt:
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09/13/2011
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Application #:
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12434367
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Filing Dt:
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05/01/2009
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Publication #:
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Pub Dt:
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11/04/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING LAYER AFTER ENCAPSULATION AND GROUNDED THROUGH INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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03/24/2015
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Application #:
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12467094
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Filing Dt:
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05/15/2009
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Publication #:
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Pub Dt:
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11/26/2009
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Title:
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SEMICONDUCTOR WAFER AND METHOD OF FORMING SACRIFICIAL BUMP PAD FOR WAFER PROBING DURING WAFER SORT TEST
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Patent #:
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Issue Dt:
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09/27/2011
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Application #:
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12467133
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Filing Dt:
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05/15/2009
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Publication #:
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Pub Dt:
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11/19/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SLOTTED DIE PADDLE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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07/22/2014
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Application #:
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12467146
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Filing Dt:
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05/15/2009
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Publication #:
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Pub Dt:
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11/18/2010
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND TRANSPOSER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/07/2012
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Application #:
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12467865
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Filing Dt:
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05/18/2009
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Publication #:
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Pub Dt:
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11/18/2010
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING OVERLAPPING SEMICONDUCTOR DIE WITH COPLANAR VERTICAL INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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06/07/2011
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Application #:
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12467908
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Filing Dt:
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05/18/2009
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Publication #:
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Pub Dt:
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11/18/2010
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A 3D INDUCTOR FROM PREFABRICATED PILLAR FRAME
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Patent #:
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Issue Dt:
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03/27/2012
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Application #:
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12468810
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Filing Dt:
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05/19/2009
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Publication #:
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Pub Dt:
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09/10/2009
| | | | |
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Title:
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A METHOD OF A PACKAGE ON PACKAGE PACKAGING
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Patent #:
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Issue Dt:
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09/27/2011
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Application #:
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12471180
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Filing Dt:
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05/22/2009
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Publication #:
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Pub Dt:
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10/08/2009
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF SELF-CONFINEMENT OF CONDUCTIVE BUMP MATERIAL DURING REFLOW WITHOUT SOLDER MASK
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Patent #:
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Issue Dt:
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02/21/2012
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Application #:
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12472083
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Filing Dt:
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05/26/2009
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Publication #:
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Pub Dt:
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09/10/2009
| | | | |
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Title:
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INTERCONNECTING A CHIP AND A SUBSTRATE BY BONDING PURE METAL BUMPS AND PURE METAL SPOTS
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Patent #:
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Issue Dt:
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05/31/2011
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Application #:
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12472170
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Filing Dt:
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05/26/2009
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Publication #:
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Pub Dt:
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12/02/2010
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF FORMING IPD STRUCTURE USING SMOOTH CONDUCTIVE LAYER AND BOTTOM-SIDE CONDUCTIVE LAYER
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Patent #:
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Issue Dt:
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03/08/2011
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Application #:
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12472236
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Filing Dt:
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05/26/2009
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Publication #:
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Pub Dt:
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09/17/2009
| | | | |
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Title:
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BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
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Patent #:
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Issue Dt:
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02/15/2011
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Application #:
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12473233
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Filing Dt:
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05/27/2009
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Publication #:
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Pub Dt:
|
12/24/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED CIRCUITRY AND POST, AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12473239
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Filing Dt:
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05/27/2009
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Publication #:
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Pub Dt:
|
09/17/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ETCHED RING AND DIE PADDLE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/20/2011
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Application #:
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12473253
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Filing Dt:
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05/27/2009
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Publication #:
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Pub Dt:
|
12/02/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER INTERCONNECTIONS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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09/14/2010
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Application #:
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12474131
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Filing Dt:
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05/28/2009
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Publication #:
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Pub Dt:
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10/22/2009
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Title:
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LEADFRAME PACKAGE FOR MEMS MICROPHONE ASSEMBLY
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Patent #:
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Issue Dt:
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08/16/2011
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Application #:
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12474757
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Filing Dt:
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05/29/2009
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Publication #:
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Pub Dt:
|
12/10/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISOLATED PADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/06/2011
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Application #:
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12476447
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Filing Dt:
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06/02/2009
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Publication #:
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Pub Dt:
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09/24/2009
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING UBM FIXED RELATIVE TO INTERCONNECT STRUCTURE FOR ALIGNMENT OF SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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11/29/2011
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Application #:
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12480317
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Filing Dt:
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06/08/2009
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Publication #:
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Pub Dt:
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12/09/2010
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING AN INTERCONNECT STRUCTURE WITH TSV USING ENCAPSULANT FOR STRUCTURAL SUPPORT
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Patent #:
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Issue Dt:
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10/18/2011
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Application #:
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12481404
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Filing Dt:
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06/09/2009
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Publication #:
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Pub Dt:
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12/17/2009
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Title:
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METHOD OF FORMING STRESS RELIEF LAYER BETWEEN DIE AND INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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06/28/2011
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Application #:
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12483087
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Filing Dt:
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06/11/2009
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Publication #:
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Pub Dt:
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12/16/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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05/31/2016
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Application #:
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12483548
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Filing Dt:
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06/12/2009
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Publication #:
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Pub Dt:
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12/16/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE STACKING SYSTEM WITH REDISTRIBUTION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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07/16/2013
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Application #:
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12484099
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Filing Dt:
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06/12/2009
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Publication #:
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Pub Dt:
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10/08/2009
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Title:
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INTEGRATED CIRCUIT SYSTEM HAVING DIFFERENT-SIZE SOLDER BUMPS AND DIFFERENT-SIZE BONDING PADS
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03/08/2011
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12484131
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Filing Dt:
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06/12/2009
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Publication #:
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Pub Dt:
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10/08/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERCONNECTION SUPPORT AND METHOD OF MANUFACTURE THEREOF
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08/09/2011
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12484143
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06/12/2009
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Publication #:
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Pub Dt:
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12/16/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE VIAS WITH TRENCH IN SAW STREET
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01/31/2012
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12484146
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06/12/2009
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Publication #:
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Pub Dt:
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12/16/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL INTERCONNECT STRUCTURE BETWEEN NON-LINEAR PORTIONS OF CONDUCTIVE LAYERS
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Patent #:
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Issue Dt:
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04/23/2013
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12484158
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06/12/2009
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Publication #:
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Pub Dt:
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12/16/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A STACK PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/19/2014
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Application #:
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12484245
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Filing Dt:
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06/14/2009
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Publication #:
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Pub Dt:
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12/16/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HIGH LEAD COUNT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/21/2012
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Application #:
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12486271
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Filing Dt:
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06/17/2009
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Publication #:
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Pub Dt:
|
12/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THROUGH VIA DIE HAVING PEDESTAL AND RECESS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/23/2011
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Application #:
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12486568
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Filing Dt:
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06/17/2009
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Publication #:
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Pub Dt:
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12/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/28/2012
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Application #:
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12488043
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Filing Dt:
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06/19/2009
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Publication #:
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Pub Dt:
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12/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADFRAME HAVING RADIAL-SEGMENTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/19/2011
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Application #:
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12488089
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Filing Dt:
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06/19/2009
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Publication #:
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Pub Dt:
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12/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INWARD AND OUTWARD INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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12488383
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Filing Dt:
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06/19/2009
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Publication #:
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Pub Dt:
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12/23/2010
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/31/2012
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Application #:
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12488555
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Filing Dt:
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06/20/2009
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Publication #:
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Pub Dt:
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12/23/2010
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A DUAL SUBSTRATE PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/06/2010
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Application #:
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12488557
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Filing Dt:
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06/20/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED DEVICE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/16/2013
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Application #:
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12489122
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Filing Dt:
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06/22/2009
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Publication #:
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Pub Dt:
|
12/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDERFILL AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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12489177
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Filing Dt:
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06/22/2009
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Publication #:
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Pub Dt:
|
12/23/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED HEAT SPREADER FRAME WITH EMBEDDED SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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06/05/2012
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Application #:
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12492360
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Filing Dt:
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06/26/2009
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Publication #:
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Pub Dt:
|
10/22/2009
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL INTERCONNECT STRUCTURE USING STUD BUMPS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12493049
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Filing Dt:
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06/26/2009
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Publication #:
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Pub Dt:
|
12/30/2010
| | | | |
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Title:
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Semiconductor Device and Method of Forming Inductor Over Insulating Material Filled Trench In Substrate
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Patent #:
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Issue Dt:
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11/30/2010
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Application #:
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12493108
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Filing Dt:
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06/26/2009
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Publication #:
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Pub Dt:
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10/22/2009
| | | | |
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Title:
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WAFER LEVEL INTEGRATION PACKAGE
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Patent #:
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Issue Dt:
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06/14/2011
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Application #:
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12496046
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Filing Dt:
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07/01/2009
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Publication #:
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Pub Dt:
|
10/29/2009
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Title:
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THROUGH-HOLE VIA ON SAW STREETS
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Patent #:
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Issue Dt:
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06/26/2012
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Application #:
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12498163
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Filing Dt:
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07/06/2009
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Publication #:
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Pub Dt:
|
11/05/2009
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE HEAT SPREADER
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
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12505273
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Filing Dt:
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07/17/2009
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|
Publication #:
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|
Pub Dt:
|
01/20/2011
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Title:
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Semiconductor Device and Method of Forming Conductive TSV in Peripheral Region of Die Prior to Wafer Singulaton
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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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12507130
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Filing Dt:
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07/22/2009
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|
Publication #:
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Pub Dt:
|
01/27/2011
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF EMBEDDING THERMALLY CONDUCTIVE LAYER IN INTERCONNECT STRUCTURE FOR HEAT DISSIPATION
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Patent #:
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Issue Dt:
|
03/31/2015
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Application #:
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12511012
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Filing Dt:
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07/28/2009
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|
Publication #:
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|
Pub Dt:
|
11/19/2009
| | | | |
|
Title:
|
SEMICONDUCTOR MULTI-PACKAGE MODULE INCLUDING TAPE SUBSTRATE LAND GRID ARRAY PACKAGE STACKED OVER BALL GRID ARRAY PACKAGE
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Patent #:
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Issue Dt:
|
09/13/2011
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Application #:
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12533160
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Filing Dt:
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07/31/2009
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Publication #:
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Pub Dt:
|
11/26/2009
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE HAVING THROUGH-HOLE VIAS ON SAW STREETS FORMED WITH PARTIAL SAW
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Patent #:
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Issue Dt:
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09/20/2011
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Application #:
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12533270
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Filing Dt:
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07/31/2009
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Publication #:
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Pub Dt:
|
11/26/2009
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE HAVING THROUGH-HOLE VIAS ON SAW STREETS FORMED WITH PARTIAL SAW
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Patent #:
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Issue Dt:
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09/13/2011
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Application #:
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12533344
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Filing Dt:
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07/31/2009
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Publication #:
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Pub Dt:
|
11/26/2009
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE HAVING THROUGH-HOLE VIAS ON SAW STREETS FORMED WITH PARTIAL SAW
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Patent #:
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Issue Dt:
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09/11/2012
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Application #:
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12533943
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Filing Dt:
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07/31/2009
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Publication #:
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Pub Dt:
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02/03/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING DIE WITH TSV IN CAVITY OF SUBSTRATE FOR ELECTRICAL INTERCONNECT OF FI-POP
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Patent #:
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Issue Dt:
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11/19/2013
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Application #:
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12534029
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Filing Dt:
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07/31/2009
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Publication #:
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Pub Dt:
|
02/03/2011
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THROUGH SILICON VIA BASE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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12537824
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Filing Dt:
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08/07/2009
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Publication #:
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Pub Dt:
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02/10/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CAVITY IN BUILD-UP INTERCONNECT STRUCTURE FOR SHORT SIGNAL PATH BETWEEN DIE
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12538098
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Filing Dt:
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08/07/2009
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A TIERED SUBSTRATE PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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10/18/2011
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Application #:
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12540174
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Filing Dt:
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08/12/2009
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Publication #:
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Pub Dt:
|
02/17/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF DUAL-MOLDING DIE FORMED ON OPPOSITE SIDES OF BUILD-UP INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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09/20/2011
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Application #:
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12540240
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Filing Dt:
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08/12/2009
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Publication #:
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Pub Dt:
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02/17/2011
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING DAM MATERIAL AROUND PERIPHERY OF DIE TO REDUCE WARPAGE
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Patent #:
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Issue Dt:
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08/23/2011
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Application #:
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12541334
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Filing Dt:
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08/14/2009
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Publication #:
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Pub Dt:
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02/17/2011
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING SEMICONDUCTOR DIE TO HEAT SPREADER ON TEMPORARY CARRIER AND FORMING POLYMER LAYER AND CONDUCTIVE LAYER OVER THE DIE
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Patent #:
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Issue Dt:
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01/05/2016
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Application #:
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12542097
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Filing Dt:
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08/17/2009
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Publication #:
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Pub Dt:
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02/17/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/24/2012
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Application #:
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12544555
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Filing Dt:
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08/20/2009
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DIE AND PACKAGE COMBINATION
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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12544578
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Filing Dt:
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08/20/2009
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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05/01/2012
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Application #:
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12545357
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Filing Dt:
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08/21/2009
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Publication #:
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Pub Dt:
|
02/24/2011
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF STACKING DIE ON LEADFRAME ELECTRICALLY CONNECTED BY CONDUCTIVE PILLARS
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Patent #:
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Issue Dt:
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04/26/2016
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Application #:
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12545390
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Filing Dt:
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08/21/2009
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Publication #:
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Pub Dt:
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02/24/2011
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Title:
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Semiconductor Device and Method of Forming Dual-Active Sided Semiconductor Die in Fan-Out Wafer Level Chip Scale Package
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Patent #:
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Issue Dt:
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07/26/2011
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Application #:
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12547439
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Filing Dt:
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08/25/2009
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
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Title:
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SEMICONDUCTOR PACKAGE SYSTEM WITH SUBSTRATE HAVING DIFFERENT BONDABLE HEIGHTS AT LEAD FINGER TIPS
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Patent #:
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Issue Dt:
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07/19/2016
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Application #:
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12551270
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Filing Dt:
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08/31/2009
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Publication #:
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Pub Dt:
|
03/03/2011
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Title:
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Semiconductor Device and Method of Forming Pre-Molded Semiconductor Die Having Bumps Embedded in Encapsulant
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Patent #:
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Issue Dt:
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01/22/2013
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Application #:
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12557382
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Filing Dt:
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09/10/2009
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Publication #:
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Pub Dt:
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03/10/2011
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING DIRECTIONAL RF COUPLER WITH IPD FOR ADDITIONAL RF SIGNAL PROCESSING
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Patent #:
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Issue Dt:
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04/12/2011
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Application #:
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12557481
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Filing Dt:
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09/10/2009
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Publication #:
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Pub Dt:
|
03/10/2011
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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11/25/2014
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Application #:
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12557763
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Filing Dt:
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09/11/2009
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Publication #:
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Pub Dt:
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03/17/2011
| | | | |
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Title:
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Semiconductor Device and Method of Forming Cavity in PCB Containing Encapsulant or Dummy Die Having CTE Similar to CTE of Large Array WLCSP
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Patent #:
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Issue Dt:
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04/24/2012
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Application #:
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12557811
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Filing Dt:
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09/11/2009
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Publication #:
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Pub Dt:
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03/17/2011
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE
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Patent #:
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Issue Dt:
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08/09/2011
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Application #:
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12559432
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Filing Dt:
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09/14/2009
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Publication #:
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Pub Dt:
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01/14/2010
| | | | |
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Title:
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MULTI-LAYER SEMICONDUCTOR PACKAGE WITH VERTICAL CONNECTORS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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10/11/2011
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Application #:
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12560312
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Filing Dt:
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09/15/2009
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Publication #:
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Pub Dt:
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03/17/2011
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/13/2011
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Application #:
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12562414
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Filing Dt:
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09/18/2009
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Publication #:
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Pub Dt:
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01/14/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPOSITE BUMP-ON-LEAD INTERCONNECTION
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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12562702
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Filing Dt:
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09/18/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THROUGH SEMICONDUCTOR VIAS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/05/2011
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Application #:
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12562722
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Filing Dt:
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09/18/2009
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Publication #:
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Pub Dt:
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03/24/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CIRCUITRY STACKING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/18/2012
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Application #:
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12562874
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Filing Dt:
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09/18/2009
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Publication #:
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Pub Dt:
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03/24/2011
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH QUAD FLAT NO-LEAD PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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NONE
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Application #:
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12563368
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Filing Dt:
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09/21/2009
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Publication #:
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Pub Dt:
|
09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTEGRAL-INTERPOSER-STRUCTURE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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06/10/2014
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Application #:
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12563475
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Filing Dt:
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09/21/2009
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Publication #:
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Pub Dt:
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03/24/2011
| | | | |
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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09/11/2012
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Application #:
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12563514
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Filing Dt:
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09/21/2009
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Publication #:
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Pub Dt:
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03/24/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATED VIA AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/06/2012
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Application #:
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12563928
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Filing Dt:
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09/21/2009
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Publication #:
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Pub Dt:
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01/14/2010
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Title:
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METHOD OF MANUFACTURE FOR SEMICONDUCTOR PACKAGE WITH FLOW CONTROLLER
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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12564852
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Filing Dt:
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09/22/2009
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Publication #:
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Pub Dt:
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03/24/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAP LAYER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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05/20/2014
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Application #:
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12565144
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Filing Dt:
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09/23/2009
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Publication #:
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Pub Dt:
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03/24/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADED PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/27/2012
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Application #:
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12565380
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09/23/2009
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Publication #:
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Pub Dt:
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03/24/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
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Patent #:
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Issue Dt:
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06/28/2011
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Application #:
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12565698
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09/23/2009
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Publication #:
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Pub Dt:
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01/07/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUPPORTED STACKED DIE
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Issue Dt:
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11/11/2014
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Application #:
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12567033
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09/25/2009
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Pub Dt:
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03/31/2011
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Title:
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Semiconductor Device and Method of Forming Adhesive Material to Secure Semiconductor Die to Carrier in WLCSP
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Patent #:
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Issue Dt:
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01/25/2011
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Application #:
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12571234
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Filing Dt:
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09/30/2009
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Publication #:
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Pub Dt:
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01/28/2010
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Title:
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STANDOFF HEIGHT IMPROVEMENT FOR BUMPING TECHNOLOGY USING SOLDER RESIST
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02/01/2011
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Application #:
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12572568
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10/02/2009
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Publication #:
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Pub Dt:
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01/28/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING ALONG A PROFILE DISPOSED IN PERIPHERAL REGION AROUND THE DEVICE
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Patent #:
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Issue Dt:
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08/05/2014
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Application #:
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12572590
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Filing Dt:
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10/02/2009
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Publication #:
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Pub Dt:
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06/17/2010
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Title:
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SEMICONDUCTOR DEVICE WITH A VERTICAL INTERCONNECT STRUCTURE FOR 3-D FO-WLCSP
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Patent #:
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Issue Dt:
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05/08/2012
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Application #:
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12573110
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Filing Dt:
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10/03/2009
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Publication #:
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Pub Dt:
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01/28/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFRAME SUBSTRATE
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Patent #:
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Issue Dt:
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05/31/2011
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Application #:
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12577343
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Filing Dt:
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10/12/2009
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Publication #:
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Pub Dt:
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02/11/2010
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Title:
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SEMICONDUCTOR ASSEMBLY WITH COMPONENT PADS ATTACHED ON DIE BACK SIDE
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Patent #:
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Issue Dt:
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11/29/2011
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Application #:
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12578797
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Filing Dt:
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10/14/2009
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Publication #:
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Pub Dt:
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02/18/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR PACKAGE STACKING AND MANUFACTURING METHOD THEREOF
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Patent #:
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Issue Dt:
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10/22/2013
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Application #:
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12579286
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10/14/2009
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Publication #:
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Pub Dt:
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02/18/2010
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Title:
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MINIATURIZED WIDE-BAND BALUNS FOR RF APPLICATIONS
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Patent #:
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Issue Dt:
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08/12/2014
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Application #:
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12579299
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Filing Dt:
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10/14/2009
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Publication #:
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Pub Dt:
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02/11/2010
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Title:
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MINIATURIZED WIDE-BAND BALUNS FOR RF APPLICATIONS
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Patent #:
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Issue Dt:
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07/24/2012
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12579307
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Filing Dt:
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10/14/2009
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Publication #:
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Pub Dt:
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02/11/2010
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Title:
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MINIATURIZED WIDE-BAND BALUNS FOR RF APPLICATIONS
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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12580933
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10/16/2009
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Publication #:
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Pub Dt:
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04/21/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/05/2013
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12582582
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10/20/2009
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Publication #:
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Pub Dt:
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04/21/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAVITY AND METHOD OF MANUFACTURE THEREOF
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10/04/2011
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12582587
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10/20/2009
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Publication #:
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Pub Dt:
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02/18/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE WITH OPEN SUBSTRATE
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09/10/2013
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12605292
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10/23/2009
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Pub Dt:
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04/28/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE DISPOSED IN A CAVITY OF AN INTERCONNECT STRUCTURE AND GROUNDED THROUGH THE DIE TSV
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09/02/2014
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12606351
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10/27/2009
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Publication #:
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Pub Dt:
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02/25/2010
| | | | |
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Title:
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MINIATURIZED WIDE-BAND BALUNS FOR RF APPLICATIONS
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