Total properties:
15
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Patent #:
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Issue Dt:
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03/25/2008
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Application #:
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10351094
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Filing Dt:
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01/23/2003
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Title:
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METHOD AND APPARATUS FOR PLACEMENT AND ROUTING CELLS ON INTEGRATED CIRCUIT CHIPS
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Patent #:
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Issue Dt:
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05/22/2007
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Application #:
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10377907
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Filing Dt:
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02/28/2003
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Publication #:
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Pub Dt:
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02/05/2004
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Title:
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HARDWARE-BASED HDL CODE COVERAGE AND DESIGN ANALYSIS
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Patent #:
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Issue Dt:
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09/25/2007
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Application #:
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10382342
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Filing Dt:
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03/04/2003
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Publication #:
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Pub Dt:
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08/07/2003
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Title:
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METHODS AND APPARATUSES FOR DESIGNING INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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01/09/2007
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Application #:
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10435061
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Filing Dt:
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05/09/2003
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Publication #:
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Pub Dt:
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11/11/2004
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Title:
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METHOD AND APPARATUS FOR CIRCUIT DESIGN AND RETIMING
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Patent #:
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Issue Dt:
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07/03/2007
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Application #:
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10456768
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Filing Dt:
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06/06/2003
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Title:
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HARDWARE/SOFTWARE CO-DEBUGGING IN A HARDWARE DESCRIPTION LANGUAGE
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Patent #:
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Issue Dt:
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04/03/2007
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Application #:
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10758977
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Filing Dt:
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01/14/2004
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Title:
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CIRCUITS WITH MODULAR REDUNDANCY AND METHODS AND APPARATUSES FOR THEIR AUTOMATED SYNTHESIS
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Patent #:
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Issue Dt:
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06/26/2007
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Application #:
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10792933
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Filing Dt:
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03/03/2004
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Title:
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METHOD AND APPARATUS FOR CIRCUIT PARTITIONING AND TRACE ASSIGNMENT IN CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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05/15/2007
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Application #:
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10810748
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Filing Dt:
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03/26/2004
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Publication #:
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Pub Dt:
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09/16/2004
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Title:
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POWER AND GROUND SHIELD MESH TO REMOVE BOTH CAPACITIVE AND INDUCTIVE SIGNAL COUPLING EFFECTS OF ROUTING IN INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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10850808
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Filing Dt:
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05/21/2004
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Publication #:
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Pub Dt:
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12/02/2004
| | | | |
Title:
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METHOD AND APPARATUS FOR AUTOMATED CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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07/31/2007
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Application #:
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10856280
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Filing Dt:
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05/27/2004
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Publication #:
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Pub Dt:
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12/02/2004
| | | | |
Title:
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METHOD AND APPARATUS FOR AUTOMATED CIRCUIT DESIGN
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Patent #:
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|
Issue Dt:
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10/02/2007
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Application #:
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10897459
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Filing Dt:
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07/23/2004
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Publication #:
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Pub Dt:
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02/09/2006
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Title:
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METHODS AND APPARATUSES FOR TRANSIENT ANALYSES OF CIRCUITS
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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10911317
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Filing Dt:
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08/03/2004
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Title:
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METHOD AND APPARATUS FOR AUTOMATED SYNTHESIS AND OPTIMIZATION OF DATAPATHS
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Patent #:
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Issue Dt:
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04/08/2008
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Application #:
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10915516
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Filing Dt:
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08/09/2004
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Publication #:
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Pub Dt:
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01/13/2005
| | | | |
Title:
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METHOD AND USER INTERFACE FOR DEBUGGING AN ELECTRONIC SYSTEM
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Patent #:
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|
Issue Dt:
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04/29/2008
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Application #:
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11034391
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Filing Dt:
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01/11/2005
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Title:
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METHODS AND APPARATUSES FOR THERMAL ANALYSIS BASED CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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11112092
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Filing Dt:
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04/22/2005
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Publication #:
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Pub Dt:
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08/24/2006
| | | | |
Title:
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METHOD AND SYSTEM FOR DEBUGGING USING REPLICATED LOGIC AND TRIGGER LOGIC
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