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Total properties:
20
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Patent #:
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Issue Dt:
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04/04/2000
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Application #:
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08400141
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Filing Dt:
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03/07/1995
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Title:
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TECHNIQUE FOR INITIATING PROCESSING OF A DATA STREAM OF ENCODED VIDEO INFORMATION
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Patent #:
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Issue Dt:
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11/24/1998
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Application #:
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08400211
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Filing Dt:
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03/07/1995
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Title:
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PADDING APPARATUS FOR PASSING AN ARBITRARY NUMBER OF BITS THROUGH A BUFFER IN A PIPELINE SYSTEM
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Patent #:
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Issue Dt:
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01/25/2000
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Application #:
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08474231
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Filing Dt:
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06/07/1995
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Title:
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METHOD FOR ACCESSING BANKS OF DRAM
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Patent #:
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Issue Dt:
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01/19/1999
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Application #:
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08474603
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Filing Dt:
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06/07/1995
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Title:
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BUFFER MANAGER
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Patent #:
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Issue Dt:
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06/08/1999
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Application #:
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08480721
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Filing Dt:
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06/07/1995
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Title:
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SIGNAL PROCESSING APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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08482296
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Filing Dt:
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06/07/1995
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Title:
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DATA PIPELINE SYSTEM AND DATA ENCODING METHOD
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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08483020
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Filing Dt:
|
06/07/1995
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Title:
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DATA PIPELINE SYSTEM AND DATA ENCODING METHOD
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Patent #:
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|
Issue Dt:
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03/02/1999
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Application #:
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08484578
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Filing Dt:
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06/07/1995
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Title:
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SYSTEM FOR MICROPOGRAMMING STATE MACHINE IN VIDEO PARSER DISABLING PORTION OF PROCESSING STAGES RESPONSIVE TO SEQUENCE_END TOKEN GENERATING BY TOKEN GENERATOR RESPONSIVE TO RECEIVED DATA
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Patent #:
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Issue Dt:
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07/17/2001
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Application #:
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08484730
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Filing Dt:
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06/07/1995
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Title:
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DATA PIPELINE SYSTEM AND DATA ENCODING METHOD
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Patent #:
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|
Issue Dt:
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04/21/1998
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Application #:
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08638273
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Filing Dt:
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04/26/1996
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Title:
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ERROR DETECTION AND CORRECTION SYSTEM FOR A STREAM OF ENCODED DATA
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|
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Patent #:
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Issue Dt:
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10/06/1998
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Application #:
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08801544
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Filing Dt:
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02/18/1997
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Title:
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GALOIS FIELD MULTIPLIER FOR REED-SOLOMON DECODER
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Patent #:
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Issue Dt:
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09/14/1999
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Application #:
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08802328
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Filing Dt:
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02/18/1997
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Title:
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TIMING SYNCHRONIZATION IN A RECEIVER EMPLOYING ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING
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Patent #:
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Issue Dt:
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09/19/2000
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Application #:
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08834158
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Filing Dt:
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04/14/1997
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Title:
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MEMORY MANAGER FOR MPEG DECODER
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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08956300
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Filing Dt:
|
10/22/1997
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Title:
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SINGLE CHIP VLSI IMPLEMENTATION OF A DIGITAL RECEIVER EMPLOYING ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING
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|
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Patent #:
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|
Issue Dt:
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11/28/2000
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Application #:
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08971198
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Filing Dt:
|
11/14/1997
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|
Title:
|
ERROR DETECTION AND CORRECTION SYSTEM FOR A STREAM OF ENCODED DATA
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|
|
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Patent #:
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|
Issue Dt:
|
10/02/2001
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Application #:
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09325691
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Filing Dt:
|
06/01/1999
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|
Title:
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METHOD FOR ACCESSING BANKS OF DRAM
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|
|
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Patent #:
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|
Issue Dt:
|
08/22/2006
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Application #:
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09689120
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Filing Dt:
|
10/12/2000
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Title:
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MULTISTANDARD VIDEO DECODER AND DECOMPRESSION SYSTEM FOR PROCESSING ENCODED BIT STREAMS INCLUDING START CODES AND METHODS RELATING THERETO
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|
|
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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09772698
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Filing Dt:
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01/30/2001
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Publication #:
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Pub Dt:
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12/11/2003
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Title:
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MULTISTANDARD VIDEO DECODER AND DECOMPRESSION SYSTEM FOR PROCESSING ENCODED BIT STREAMS INCLUDING A RECONFIGURABLE PROCESSING STAGE AND METHODS RELATING THERETO
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|
|
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Patent #:
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Issue Dt:
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06/12/2007
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Application #:
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09974530
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Filing Dt:
|
10/10/2001
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Publication #:
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Pub Dt:
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08/21/2003
| | | | |
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Title:
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MULTISTANDARD VIDEO DECODER AND DECOMPRESSION SYSTEM FOR PROCESSING ENCODED BIT STREAMS INCLUDING A VIDEO FORMATTER AND METHODS RELATING THERETO
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Patent #:
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Issue Dt:
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02/03/2004
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Application #:
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09995011
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Filing Dt:
|
11/27/2001
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|
Publication #:
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Pub Dt:
|
07/31/2003
| | | | |
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Title:
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SINGLE CHIP VLSI IMPLEMENTATION OF A DIGITAL RECEIVER EMPLOYING ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING
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