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Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:058298/0836   Pages: 15
Recorded: 12/02/2021
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 82
1
Patent #:
Issue Dt:
03/29/2005
Application #:
09776550
Filing Dt:
02/02/2001
Title:
METHOD AND APPARATUS FOR EVALUATING AND CALIBRATING A SIGNALING SYSTEM
2
Patent #:
Issue Dt:
07/19/2005
Application #:
09799516
Filing Dt:
03/07/2001
Title:
TECHNIQUE FOR DETERMINING PERFORMANCE CHARACTERISTICS OF ELECTRONIC DEVICES AND SYSTEMS
3
Patent #:
Issue Dt:
03/03/2009
Application #:
09837307
Filing Dt:
04/17/2001
Title:
MECHANISM FOR ENABLING FULL DATA BUS UTILIZATION WITHOUT INCREASING DATA GRANULARITY
4
Patent #:
Issue Dt:
12/02/2003
Application #:
09909675
Filing Dt:
07/19/2001
Title:
CONFIGURABLE ADDRESSING FOR MULTIPLE CHIPS IN A PACKAGE
5
Patent #:
Issue Dt:
08/29/2006
Application #:
09941079
Filing Dt:
08/28/2001
Title:
CLOCK DATA RECOVERY WITH SELECTABLE PHASE CONTROL
6
Patent #:
Issue Dt:
11/14/2006
Application #:
09976170
Filing Dt:
10/12/2001
Publication #:
Pub Dt:
11/06/2003
Title:
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
7
Patent #:
Issue Dt:
01/27/2009
Application #:
10053340
Filing Dt:
10/22/2001
Publication #:
Pub Dt:
03/18/2004
Title:
METHOD AND APPARATUS FOR SIGNALING BETWEEN DEVICES OF A MEMORY SYSTEM
8
Patent #:
Issue Dt:
11/06/2007
Application #:
10195129
Filing Dt:
07/12/2002
Publication #:
Pub Dt:
02/05/2004
Title:
SELECTABLE-TAP EQUALIZER
9
Patent #:
Issue Dt:
07/19/2005
Application #:
10278478
Filing Dt:
10/22/2002
Publication #:
Pub Dt:
07/10/2003
Title:
TIMING CALIBRATION APPARATUS AND METHOD FOR A MEMORY DEVICE SIGNALING SYSTEM
10
Patent #:
Issue Dt:
02/23/2010
Application #:
10278708
Filing Dt:
10/22/2002
Publication #:
Pub Dt:
06/26/2003
Title:
PHASE ADJUSTMENT APPARATUS AND METHOD FOR A MEMORY DEVICE SIGNALING SYSTEM
11
Patent #:
Issue Dt:
05/29/2007
Application #:
10732533
Filing Dt:
12/11/2003
Publication #:
Pub Dt:
09/02/2004
Title:
METHOD AND APPARATUS FOR COORDINATING MEMORY OPERATIONS AMONG DIVERSELY-LOCATED MEMORY COMPONENTS
12
Patent #:
Issue Dt:
02/28/2006
Application #:
10954489
Filing Dt:
10/01/2004
Title:
TECHNIQUE FOR DETERMINING PERFORMANCE CHARACTERISTICS OF ELECTRONIC DEVICES AND SYSTEMS
13
Patent #:
Issue Dt:
07/08/2008
Application #:
11039447
Filing Dt:
01/18/2005
Publication #:
Pub Dt:
06/16/2005
Title:
MEMORY DEVICE SIGNALING SYSTEM AND METHOD WITH INDEPENDENT TIMING CALIBRATION FOR PARALLEL SIGNAL PATHS
14
Patent #:
Issue Dt:
04/24/2007
Application #:
11094137
Filing Dt:
03/31/2005
Publication #:
Pub Dt:
08/04/2005
Title:
MEMORY DEVICE WITH CLOCK MULTIPLIER CIRCUIT
15
Patent #:
Issue Dt:
05/29/2007
Application #:
11219096
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
02/23/2006
Title:
MEMORY MODULE WITH TERMINATION COMPONENT
16
Patent #:
Issue Dt:
04/03/2007
Application #:
11219381
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
01/12/2006
Title:
MEMORY MODULE WITH TERMINATION COMPONENT
17
Patent #:
Issue Dt:
03/05/2013
Application #:
11280560
Filing Dt:
11/15/2005
Publication #:
Pub Dt:
04/13/2006
Title:
MEMORY MODULE WITH TERMINATION COMPONENT
18
Patent #:
Issue Dt:
04/24/2007
Application #:
11281184
Filing Dt:
11/15/2005
Publication #:
Pub Dt:
03/30/2006
Title:
METHOD, SYSTEM AND MEMORY CONTROLLER UTILIZING ADJUSTABLE WRITE DATA DELAY SETTINGS
19
Patent #:
Issue Dt:
02/13/2007
Application #:
11335029
Filing Dt:
01/18/2006
Publication #:
Pub Dt:
06/15/2006
Title:
METHOD, SYSTEM AND MEMORY CONTROLLER UTILIZING ADJUSTABLE READ DATA DELAY SETTINGS
20
Patent #:
Issue Dt:
06/02/2009
Application #:
11354964
Filing Dt:
02/16/2006
Publication #:
Pub Dt:
06/22/2006
Title:
TECHNIQUE FOR DETERMINING PERFORMANCE CHARACTERISTICS OF ELECTRONIC DEVICES AND SYSTEMS
21
Patent #:
Issue Dt:
04/15/2008
Application #:
11422474
Filing Dt:
06/06/2006
Publication #:
Pub Dt:
10/19/2006
Title:
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
22
Patent #:
Issue Dt:
02/10/2009
Application #:
11559111
Filing Dt:
11/13/2006
Publication #:
Pub Dt:
03/22/2007
Title:
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
23
Patent #:
NONE
Issue Dt:
Application #:
11686706
Filing Dt:
03/15/2007
Publication #:
Pub Dt:
07/19/2007
Title:
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
24
Patent #:
Issue Dt:
07/03/2012
Application #:
11754995
Filing Dt:
05/29/2007
Publication #:
Pub Dt:
11/01/2007
Title:
MEMORY CONTROLLER DEVICE HAVING TIMING OFFSET CAPABILITY
25
Patent #:
Issue Dt:
11/27/2012
Application #:
11767983
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
10/25/2007
Title:
CLOCKED MEMORY SYSTEM WITH TERMINATION COMPONENT
26
Patent #:
Issue Dt:
06/21/2011
Application #:
11855993
Filing Dt:
09/14/2007
Publication #:
Pub Dt:
05/28/2009
Title:
PHASE ADJUSTMENT APPARATUS AND METHOD FOR A MEMORY DEVICE SIGNALING SYSTEM
27
Patent #:
Issue Dt:
03/24/2009
Application #:
11871666
Filing Dt:
10/12/2007
Publication #:
Pub Dt:
02/28/2008
Title:
SELECTABLE-TAP EQUALIZER
28
Patent #:
Issue Dt:
06/11/2013
Application #:
12111816
Filing Dt:
04/29/2008
Publication #:
Pub Dt:
03/05/2009
Title:
MEMORY MODULE WITH TERMINATION COMPONENT
29
Patent #:
Issue Dt:
06/18/2013
Application #:
12269488
Filing Dt:
11/12/2008
Publication #:
Pub Dt:
03/12/2009
Title:
SELECTABLE-TAP EQUALIZER
30
Patent #:
Issue Dt:
09/20/2011
Application #:
12269513
Filing Dt:
11/12/2008
Publication #:
Pub Dt:
03/12/2009
Title:
SELECTABLE-TAP EQUALIZER
31
Patent #:
Issue Dt:
01/18/2011
Application #:
12269532
Filing Dt:
11/12/2008
Publication #:
Pub Dt:
03/05/2009
Title:
SELECTABLE-TAP EQUALIZER
32
Patent #:
Issue Dt:
01/22/2013
Application #:
12360780
Filing Dt:
01/27/2009
Publication #:
Pub Dt:
05/28/2009
Title:
METHOD AND APPARATUS FOR SIGNALING BETWEEN DEVICES OF A MEMORY SYSTEM
33
Patent #:
Issue Dt:
02/05/2013
Application #:
12393265
Filing Dt:
02/26/2009
Publication #:
Pub Dt:
06/18/2009
Title:
MECHANISM FOR ENABLING FULL DATA BUS UTILIZATION WITHOUT INCREASING DATA GRANULARITY
34
Patent #:
Issue Dt:
12/28/2010
Application #:
12417263
Filing Dt:
04/02/2009
Publication #:
Pub Dt:
10/08/2009
Title:
SELECTABLE-TAP EQUALIZER
35
Patent #:
Issue Dt:
11/08/2011
Application #:
12471044
Filing Dt:
05/22/2009
Publication #:
Pub Dt:
09/24/2009
Title:
TECHNIQUE FOR DETERMINING PERFORMANCE CHARACTERISTICS OF ELECTRONIC DEVICES AND SYSTEMS
36
Patent #:
Issue Dt:
11/29/2011
Application #:
12815382
Filing Dt:
06/14/2010
Publication #:
Pub Dt:
09/30/2010
Title:
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
37
Patent #:
Issue Dt:
09/24/2013
Application #:
13163618
Filing Dt:
06/17/2011
Publication #:
Pub Dt:
10/13/2011
Title:
PHASE ADJUSTMENT APPARATUS AND METHOD FOR A MEMORY DEVICE SIGNALING SYSTEM
38
Patent #:
Issue Dt:
07/16/2013
Application #:
13245234
Filing Dt:
09/26/2011
Publication #:
Pub Dt:
03/22/2012
Title:
TECHNIQUE FOR DETERMINING PERFORMANCE CHARACTERISTICS OF ELECTRONIC DEVICES AND SYSTEMS
39
Patent #:
Issue Dt:
08/19/2014
Application #:
13290926
Filing Dt:
11/07/2011
Publication #:
Pub Dt:
06/14/2012
Title:
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
40
Patent #:
Issue Dt:
06/25/2013
Application #:
13324783
Filing Dt:
12/13/2011
Publication #:
Pub Dt:
04/05/2012
Title:
SELECTABLE-TAP EQUALIZER
41
Patent #:
Issue Dt:
03/12/2013
Application #:
13461923
Filing Dt:
05/02/2012
Publication #:
Pub Dt:
08/23/2012
Title:
MEMORY CONTROLLER
42
Patent #:
Issue Dt:
09/17/2013
Application #:
13543779
Filing Dt:
07/06/2012
Publication #:
Pub Dt:
11/15/2012
Title:
MEMORY CONTROLLER WITH SELECTIVE DATA TRANSMISSION DELAY
43
Patent #:
Issue Dt:
10/07/2014
Application #:
13720585
Filing Dt:
12/19/2012
Publication #:
Pub Dt:
09/12/2013
Title:
MECHANISM FOR ENABLING FULL DATA BUS UTILIZATION WITHOUT INCREASING DATA GRANULARITY
44
Patent #:
Issue Dt:
02/18/2014
Application #:
13729510
Filing Dt:
12/28/2012
Publication #:
Pub Dt:
05/23/2013
Title:
Selectable-tap Equalizer
45
Patent #:
Issue Dt:
05/06/2014
Application #:
13899844
Filing Dt:
05/22/2013
Publication #:
Pub Dt:
09/26/2013
Title:
MEMORY MODULE
46
Patent #:
Issue Dt:
06/17/2014
Application #:
13915879
Filing Dt:
06/12/2013
Publication #:
Pub Dt:
10/17/2013
Title:
Method And Apparatus For Evaluating And Optimizing A Signaling System
47
Patent #:
Issue Dt:
08/19/2014
Application #:
13915896
Filing Dt:
06/12/2013
Publication #:
Pub Dt:
10/17/2013
Title:
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
48
Patent #:
Issue Dt:
02/07/2017
Application #:
13920368
Filing Dt:
06/18/2013
Publication #:
Pub Dt:
03/13/2014
Title:
Technique for Determining Performance Characteristics Of Electronic Devices And Systems
49
Patent #:
Issue Dt:
01/07/2014
Application #:
13923634
Filing Dt:
06/21/2013
Publication #:
Pub Dt:
10/24/2013
Title:
MEMORY COMPONENT WITH TERMINATED AND UNTERMINATED SIGNALING INPUTS
50
Patent #:
Issue Dt:
06/24/2014
Application #:
13923656
Filing Dt:
06/21/2013
Publication #:
Pub Dt:
11/14/2013
Title:
Memory Component that Samples Command/Address Signals in Response to Both Edges of a Clock Signal
51
Patent #:
Issue Dt:
09/01/2015
Application #:
13949982
Filing Dt:
07/24/2013
Publication #:
Pub Dt:
01/30/2014
Title:
Memory Component with Pattern Register Circuitry to Provide Data Patterns for Calibration
52
Patent #:
Issue Dt:
08/04/2015
Application #:
13967245
Filing Dt:
08/14/2013
Publication #:
Pub Dt:
12/26/2013
Title:
Memory Component with Pattern Register Circuitry to Provide Data Patterns for Calibration
53
Patent #:
Issue Dt:
06/09/2015
Application #:
14104188
Filing Dt:
12/12/2013
Publication #:
Pub Dt:
04/10/2014
Title:
MEMORY CONTROLLER THAT ENFORCES STROBE-TO-STROBE TIMING OFFSET
54
Patent #:
NONE
Issue Dt:
Application #:
14145960
Filing Dt:
01/01/2014
Publication #:
Pub Dt:
09/25/2014
Title:
Selectable-tap Equalizer
55
Patent #:
Issue Dt:
05/31/2016
Application #:
14318557
Filing Dt:
06/27/2014
Publication #:
Pub Dt:
03/19/2015
Title:
Method And Apparatus For Evaluating And Optimizing A Signaling System
56
Patent #:
Issue Dt:
02/09/2016
Application #:
14476334
Filing Dt:
09/03/2014
Publication #:
Pub Dt:
02/05/2015
Title:
MECHANISM FOR ENABLING FULL DATA BUS UTILIZATION WITHOUT INCREASING DATA GRANULARITY
57
Patent #:
Issue Dt:
04/12/2016
Application #:
14523922
Filing Dt:
10/26/2014
Publication #:
Pub Dt:
02/12/2015
Title:
MEMORY MODULE
58
Patent #:
Issue Dt:
08/11/2015
Application #:
14616629
Filing Dt:
02/06/2015
Publication #:
Pub Dt:
06/25/2015
Title:
Selectable-tap Equalizer
59
Patent #:
Issue Dt:
06/14/2016
Application #:
14745746
Filing Dt:
06/22/2015
Publication #:
Pub Dt:
10/08/2015
Title:
MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PATTERNS FOR CALIBRATION
60
Patent #:
Issue Dt:
08/16/2016
Application #:
14789832
Filing Dt:
07/01/2015
Publication #:
Pub Dt:
02/04/2016
Title:
Selectable-tap Equalizer
61
Patent #:
Issue Dt:
08/16/2016
Application #:
14965845
Filing Dt:
12/10/2015
Publication #:
Pub Dt:
04/07/2016
Title:
MECHANISM FOR ENABLING FULL DATA BUS UTILIZATION WITHOUT INCREASING DATA GRANULARITY
62
Patent #:
Issue Dt:
10/18/2016
Application #:
15070376
Filing Dt:
03/15/2016
Publication #:
Pub Dt:
07/07/2016
Title:
MEMORY CONTROLLER
63
Patent #:
Issue Dt:
12/01/2020
Application #:
15143299
Filing Dt:
04/29/2016
Publication #:
Pub Dt:
12/01/2016
Title:
Method And Apparatus For Evaluating And Optimizing A Signaling System
64
Patent #:
Issue Dt:
08/01/2017
Application #:
15155794
Filing Dt:
05/16/2016
Publication #:
Pub Dt:
09/08/2016
Title:
MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PATTERNS FOR CALIBRATION
65
Patent #:
Issue Dt:
12/04/2018
Application #:
15209429
Filing Dt:
07/13/2016
Publication #:
Pub Dt:
02/23/2017
Title:
MECHANISM FOR ENABLING FULL DATA BUS UTILIZATION WITHOUT INCREASING DATA GRANULARITY
66
Patent #:
Issue Dt:
05/23/2017
Application #:
15209454
Filing Dt:
07/13/2016
Publication #:
Pub Dt:
05/04/2017
Title:
Selectable-tap Equalizer
67
Patent #:
Issue Dt:
08/22/2017
Application #:
15271148
Filing Dt:
09/20/2016
Publication #:
Pub Dt:
02/23/2017
Title:
MEMORY CONTROLLER
68
Patent #:
Issue Dt:
05/22/2018
Application #:
15389398
Filing Dt:
12/22/2016
Publication #:
Pub Dt:
07/13/2017
Title:
Technique for Determining Performance Characteristics Of Electronic Devices And Systems
69
Patent #:
Issue Dt:
10/31/2017
Application #:
15490725
Filing Dt:
04/18/2017
Publication #:
Pub Dt:
11/09/2017
Title:
Selectable-tap Equalizer
70
Patent #:
Issue Dt:
01/29/2019
Application #:
15633677
Filing Dt:
06/26/2017
Publication #:
Pub Dt:
01/11/2018
Title:
MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PATTERNS FOR CALIBRATION
71
Patent #:
Issue Dt:
03/19/2019
Application #:
15666496
Filing Dt:
08/01/2017
Publication #:
Pub Dt:
01/11/2018
Title:
MEMORY CONTROLLER
72
Patent #:
Issue Dt:
10/16/2018
Application #:
15715032
Filing Dt:
09/25/2017
Publication #:
Pub Dt:
04/12/2018
Title:
Selectable-tap Equalizer
73
Patent #:
Issue Dt:
09/22/2020
Application #:
15957864
Filing Dt:
04/19/2018
Publication #:
Pub Dt:
11/22/2018
Title:
Technique for Determining Performance Characteristics Of Electronic Devices And Systems
74
Patent #:
Issue Dt:
07/16/2019
Application #:
16126121
Filing Dt:
09/10/2018
Publication #:
Pub Dt:
04/04/2019
Title:
SELECTABLE-TAP EQUALIZER
75
Patent #:
Issue Dt:
12/08/2020
Application #:
16177199
Filing Dt:
10/31/2018
Publication #:
Pub Dt:
05/30/2019
Title:
MECHANISM FOR ENABLING FULL DATA BUS UTILIZATION WITHOUT INCREASING DATA GRANULARITY
76
Patent #:
Issue Dt:
10/20/2020
Application #:
16215275
Filing Dt:
12/10/2018
Publication #:
Pub Dt:
07/11/2019
Title:
MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PATTERNS FOR CALIBRATION
77
Patent #:
Issue Dt:
07/07/2020
Application #:
16284375
Filing Dt:
02/25/2019
Publication #:
Pub Dt:
10/24/2019
Title:
MEMORY CONTROLLER
78
Patent #:
Issue Dt:
05/12/2020
Application #:
16432283
Filing Dt:
06/05/2019
Publication #:
Pub Dt:
11/07/2019
Title:
Selectable-tap Equalizer
79
Patent #:
Issue Dt:
10/20/2020
Application #:
16841385
Filing Dt:
04/06/2020
Publication #:
Pub Dt:
09/24/2020
Title:
Selectable-tap Equalizer
80
Patent #:
NONE
Issue Dt:
Application #:
16896056
Filing Dt:
06/08/2020
Publication #:
Pub Dt:
01/28/2021
Title:
MEMORY CONTROLLER
81
Patent #:
Issue Dt:
01/25/2022
Application #:
17018248
Filing Dt:
09/11/2020
Publication #:
Pub Dt:
04/01/2021
Title:
MEMORY COMPONENT WITH PATTERN REGISTER CIRCUITRY TO PROVIDE DATA PATTERNS FOR CALIBRATION
82
Patent #:
Issue Dt:
03/29/2022
Application #:
17024843
Filing Dt:
09/18/2020
Publication #:
Pub Dt:
03/04/2021
Title:
Selectable-tap Equalizer
Assignor
1
Exec Dt:
08/16/2021
Assignee
1
446 ROUTE 403
GARRISON, NEW YORK 10524
Correspondence name and address
IAN D. MACKINNON
312 SOUTH THIRD STREET
MINNEAPOLIS, MN 55415

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