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Patent #:
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Issue Dt:
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11/05/2013
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Application #:
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12879004
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Filing Dt:
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09/09/2010
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Publication #:
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Pub Dt:
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03/10/2011
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Title:
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APPARATUS, SYSTEM, AND METHOD FOR ALLOCATING STORAGE
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Patent #:
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Issue Dt:
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03/05/2013
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Application #:
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12882357
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Filing Dt:
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09/15/2010
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Publication #:
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Pub Dt:
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01/26/2012
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Title:
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SYSTEM AND METHOD OF DISTRIBUTIVE ECC PROCESSING
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Patent #:
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Issue Dt:
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05/14/2013
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Application #:
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12885285
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Filing Dt:
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09/17/2010
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Publication #:
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Pub Dt:
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02/24/2011
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Title:
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APPARATUS, SYSTEM, AND METHOD FOR IMPLEMENTING A CACHE POLICY
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Patent #:
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Issue Dt:
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10/18/2011
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Application #:
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12886262
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Filing Dt:
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09/20/2010
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Publication #:
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Pub Dt:
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01/13/2011
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Title:
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GAIN CONTROL FOR READ OPERATIONS IN FLASH MEMORY
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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12887328
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Filing Dt:
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09/21/2010
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Publication #:
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Pub Dt:
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10/27/2011
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Title:
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P-TYPE CONTROL GATE IN NON-VOLATILE STORAGE AND METHODS FOR FORMING SAME
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Patent #:
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Issue Dt:
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08/18/2015
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Application #:
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12888020
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Filing Dt:
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09/22/2010
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Publication #:
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Pub Dt:
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01/13/2011
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Title:
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FLOATING BODY MEMORY CELL SYSTEM AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
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04/03/2012
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Application #:
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12890436
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Filing Dt:
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09/24/2010
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Publication #:
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Pub Dt:
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03/17/2011
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Title:
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DELIBERATE DESTRUCTION OF INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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11/11/2014
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Application #:
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12892633
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Filing Dt:
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09/28/2010
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Publication #:
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Pub Dt:
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03/29/2012
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Title:
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COUNTER DOPING COMPENSATION METHODS TO IMPROVE DIODE PERFORMANCE
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Patent #:
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Issue Dt:
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02/12/2013
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Application #:
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12893611
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Filing Dt:
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09/29/2010
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Publication #:
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Pub Dt:
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03/29/2012
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Title:
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TECHNIQUES FOR THE FAST SETTLING OF WORD LINES IN NAND FLASH MEMORY
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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12894889
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Filing Dt:
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09/30/2010
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Publication #:
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Pub Dt:
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04/05/2012
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Title:
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MULTI-STEP CHANNEL BOOSTING TO REDUCE CHANNEL TO FLOATING GATE COUPLING IN MEMORY
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Patent #:
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Issue Dt:
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05/14/2013
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Application #:
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12894922
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Filing Dt:
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09/30/2010
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Publication #:
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Pub Dt:
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04/05/2012
| | | | |
Title:
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SENSING FOR NAND MEMORY BASED ON WORD LINE POSITION
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Patent #:
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Issue Dt:
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05/28/2013
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Application #:
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12895383
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Filing Dt:
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09/30/2010
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Publication #:
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Pub Dt:
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04/05/2012
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Title:
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SYNCHRONIZED MAINTENANCE OPERATIONS IN A MULTI-BANK STORAGE SYSTEM
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Patent #:
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Issue Dt:
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01/31/2012
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Application #:
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12895457
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Filing Dt:
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09/30/2010
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Title:
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LEVEL SHIFTER WITH SHOOT-THROUGH CURRENT ISOLATION
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Patent #:
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Issue Dt:
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10/02/2012
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Application #:
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12895523
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Filing Dt:
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09/30/2010
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Publication #:
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Pub Dt:
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01/27/2011
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Title:
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DECODER CIRCUITRY PROVIDING FORWARD AND REVERSE MODES OF MEMORY ARRAY OPERATION AND METHOD FOR BIASING SAME
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Patent #:
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Issue Dt:
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10/25/2011
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Application #:
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12897089
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Filing Dt:
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10/04/2010
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Publication #:
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Pub Dt:
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01/27/2011
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Title:
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NON-VOLATILE MEMORY AND METHOD WITH IMPROVED SENSING HAVING BIT-LINE LOCKOUT CONTROL
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Patent #:
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Issue Dt:
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11/20/2012
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Application #:
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12897257
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Filing Dt:
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10/04/2010
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Publication #:
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Pub Dt:
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04/05/2012
| | | | |
Title:
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METHOD OF PATTERNING NAND STRINGS USING PERPENDICULAR SRAF
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Patent #:
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Issue Dt:
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03/29/2011
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Application #:
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12897696
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Filing Dt:
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10/04/2010
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Publication #:
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Pub Dt:
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01/27/2011
| | | | |
Title:
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METHOD FOR FORMING DOPED POLYSILICON VIA CONNECTING POLYSILICON LAYERS
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Patent #:
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Issue Dt:
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10/25/2011
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Application #:
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12899291
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Filing Dt:
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10/06/2010
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Publication #:
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Pub Dt:
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01/27/2011
| | | | |
Title:
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NONVOLATILE MEMORY WITH CORRELATED MULTIPLE PASS PROGRAMMING
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Patent #:
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Issue Dt:
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12/20/2011
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Application #:
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12899403
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Filing Dt:
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10/06/2010
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Publication #:
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Pub Dt:
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01/27/2011
| | | | |
Title:
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ADAPTIVE ERASE AND SOFT PROGRAMMING FOR MEMORY
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Patent #:
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Issue Dt:
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06/26/2012
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Application #:
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12899634
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Filing Dt:
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10/07/2010
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Publication #:
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Pub Dt:
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01/27/2011
| | | | |
Title:
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VERTICALLY STACKED FIELD PROGRAMMABLE NONVOLATILE MEMORY AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
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10/25/2011
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Application #:
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12900336
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Filing Dt:
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10/07/2010
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Publication #:
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Pub Dt:
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02/03/2011
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Title:
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APPARATUS, SYSTEM, AND METHOD FOR COORDINATING STORAGE REQUESTS IN A MULTI-PROCESSOR/MULTI-THREAD ENVIRONMENT
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Patent #:
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Issue Dt:
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06/28/2011
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Application #:
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12900397
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Filing Dt:
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10/07/2010
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Publication #:
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Pub Dt:
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02/03/2011
| | | | |
Title:
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PARTIAL BLOCK DATA PROGRAMMING AND READING OPERATIONS IN A NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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10/28/2014
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Application #:
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12900443
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Filing Dt:
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10/07/2010
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Publication #:
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Pub Dt:
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01/27/2011
| | | | |
Title:
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NON-VOLATILE MEMORY AND METHOD WITH SHARED PROCESSING FOR AN AGGREGATE OF READ/WRITE CIRCUITS
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|
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Patent #:
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|
Issue Dt:
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03/06/2012
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Application #:
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12901267
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Filing Dt:
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10/08/2010
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Publication #:
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Pub Dt:
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01/27/2011
| | | | |
Title:
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NON-VOLATILE MEMORY SYSTEM WITH SELF TEST CAPABILITY
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Patent #:
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Issue Dt:
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09/20/2011
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Application #:
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12901787
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Filing Dt:
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10/11/2010
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Publication #:
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Pub Dt:
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02/03/2011
| | | | |
Title:
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METHOD OF ASSEMBLING SEMICONDUCTOR DEVICES WITH LEDS
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Patent #:
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Issue Dt:
|
08/09/2011
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Application #:
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12901861
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Filing Dt:
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10/11/2010
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Publication #:
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Pub Dt:
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02/03/2011
| | | | |
Title:
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METHOD OF REDUCING MEMORY CARD EDGE ROUGHNESS BY EDGE COATING
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Patent #:
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Issue Dt:
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01/17/2012
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Application #:
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12903067
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Filing Dt:
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10/12/2010
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Publication #:
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Pub Dt:
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02/03/2011
| | | | |
Title:
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DATA REFRESH FOR NON-VOLATILE STORAGE
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Patent #:
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Issue Dt:
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09/23/2014
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Application #:
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12904802
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Filing Dt:
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10/14/2010
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Publication #:
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Pub Dt:
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04/19/2012
| | | | |
Title:
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MULTI-LEVEL MEMORY ARRAYS WITH MEMORY CELLS THAT EMPLOY BIPOLAR STORAGE ELEMENTS AND METHODS OF FORMING THE SAME
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Patent #:
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Issue Dt:
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03/05/2013
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Application #:
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12905047
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Filing Dt:
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10/14/2010
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Publication #:
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Pub Dt:
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04/19/2012
| | | | |
Title:
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MEMORY CELLS HAVING STORAGE ELEMENTS THAT SHARE MATERIAL LAYERS WITH STEERING ELEMENTS AND METHODS OF FORMING THE SAME
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Patent #:
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Issue Dt:
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05/29/2012
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Application #:
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12905445
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Filing Dt:
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10/15/2010
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Publication #:
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Pub Dt:
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04/19/2012
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Title:
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THREE DIMENSIONAL HORIZONTAL DIODE NON-VOLATILE MEMORY ARRAY AND METHOD OF MAKING THEREOF
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Patent #:
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Issue Dt:
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11/05/2013
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Application #:
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12906523
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Filing Dt:
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10/18/2010
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Publication #:
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Pub Dt:
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02/03/2011
| | | | |
Title:
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SEMICONDUCTOR DEVICE HAVING UNDER-FILLED DIE IN A DIE STACK
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Patent #:
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Issue Dt:
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09/06/2011
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Application #:
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12910361
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Filing Dt:
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10/22/2010
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Publication #:
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Pub Dt:
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02/10/2011
| | | | |
Title:
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SYSTEM FOR VERIFYING NON-VOLATILE STORAGE USING DIFFERENT VOLTAGES
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|
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Patent #:
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|
Issue Dt:
|
03/25/2014
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Application #:
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12911887
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Filing Dt:
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10/26/2010
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Publication #:
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Pub Dt:
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04/28/2011
| | | | |
Title:
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APPARATUS AND METHODS OF FORMING MEMORY LINES AND STRUCTURES USING DOUBLE SIDEWALL PATTERNING FOR FOUR TIMES HALF PITCH RELIEF PATTERNING
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|
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Patent #:
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|
Issue Dt:
|
08/19/2014
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Application #:
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12911900
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Filing Dt:
|
10/26/2010
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Publication #:
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Pub Dt:
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04/28/2011
| | | | |
Title:
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METHODS AND APPARATUS FOR LAYOUT OF THREE DIMENSIONAL MATRIX ARRAY MEMORY FOR REDUCED COST PATTERNING
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|
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Patent #:
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|
Issue Dt:
|
06/03/2014
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Application #:
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12911944
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Filing Dt:
|
10/26/2010
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Publication #:
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|
Pub Dt:
|
04/28/2011
| | | | |
Title:
|
METHODS OF FORMING PILLARS FOR MEMORY CELLS USING SEQUENTIAL SIDEWALL PATTERNING
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|
|
Patent #:
|
|
Issue Dt:
|
04/09/2013
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Application #:
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12913120
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Filing Dt:
|
10/27/2010
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Publication #:
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|
Pub Dt:
|
05/03/2012
| | | | |
Title:
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HYBRID ERROR CORRECTION CODING TO ADDRESS UNCORRECTABLE ERRORS
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|
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Patent #:
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|
Issue Dt:
|
05/08/2012
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Application #:
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12915290
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Filing Dt:
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10/29/2010
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Publication #:
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Pub Dt:
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02/24/2011
| | | | |
Title:
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MEMORY CELL THAT EMPLOYS A SELECTIVELY GROWN REVERSIBLE RESISTANCE-SWITCHING ELEMENT AND METHODS OF FORMING THE SAME
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Patent #:
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|
Issue Dt:
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06/26/2012
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Application #:
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12917293
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Filing Dt:
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11/01/2010
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Publication #:
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Pub Dt:
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02/24/2011
| | | | |
Title:
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METHOD AND APPARATUS FOR USING A ONE-TIME OR FEW-TIME PROGRAMMABLE MEMORY WITH A HOST DEVICE DESIGNED FOR ERASABLE-REWRITEABLE MEMORY
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|
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Patent #:
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|
Issue Dt:
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05/14/2013
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Application #:
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12927001
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Filing Dt:
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11/04/2010
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Publication #:
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|
Pub Dt:
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08/04/2011
| | | | |
Title:
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SYSTEM, METHOD AND DEVICE FOR PLAYING BACK RECORDED AUDIO, VIDEO OR OTHER CONTENT FROM NON-VOLATILE MEMORY CARDS, COMPACT DISKS, OR OTHER MEDIA
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|
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Patent #:
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|
Issue Dt:
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10/09/2012
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Application #:
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12938028
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Filing Dt:
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11/02/2010
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Publication #:
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Pub Dt:
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02/23/2012
| | | | |
Title:
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SINGLE DEVICE DRIVER CIRCUIT TO CONTROL THREE-DIMENSIONAL MEMORY ELEMENT ARRAY
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|
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Patent #:
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Issue Dt:
|
11/15/2011
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Application #:
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12940251
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Filing Dt:
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11/05/2010
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Publication #:
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Pub Dt:
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03/03/2011
| | | | |
Title:
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LARGE ARRAY OF UPWARD POINTING P-I-N DIODES HAVING LARGE AND UNIFORM CURRENT
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Patent #:
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|
Issue Dt:
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12/16/2014
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Application #:
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12941294
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Filing Dt:
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11/08/2010
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Publication #:
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Pub Dt:
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03/24/2011
| | | | |
Title:
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METHOD FOR COPYING DATA IN REPROGRAMMABLE NON-VOLATILE MEMORY
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Patent #:
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|
Issue Dt:
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05/07/2013
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Application #:
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12942575
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Filing Dt:
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11/09/2010
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Publication #:
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Pub Dt:
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09/22/2011
| | | | |
Title:
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NON-VOLATILE STORAGE WITH METAL OXIDE SWITCHING ELEMENT AND METHODS FOR FABRICATING THE SAME
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Patent #:
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|
Issue Dt:
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06/03/2014
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Application #:
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12943213
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Filing Dt:
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11/10/2010
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Publication #:
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Pub Dt:
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03/10/2011
| | | | |
Title:
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CONTROLLING ACCESS TO DIGITAL CONTENT
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Patent #:
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Issue Dt:
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09/24/2013
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Application #:
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12943271
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Filing Dt:
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11/10/2010
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Publication #:
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Pub Dt:
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03/17/2011
| | | | |
Title:
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CONTROLLING ACCESS TO DIGITAL CONTENT
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Patent #:
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Issue Dt:
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02/12/2013
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Application #:
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12944431
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Filing Dt:
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11/11/2010
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Publication #:
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Pub Dt:
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03/17/2011
| | | | |
Title:
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SYSTEM AND METHOD OF READING DATA USING A RELIABILITY MEASURE
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|
Patent #:
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|
Issue Dt:
|
11/01/2011
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Application #:
|
12945000
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Filing Dt:
|
11/12/2010
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Publication #:
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|
Pub Dt:
|
03/03/2011
| | | | |
Title:
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FLASH MEMORY DATA CORRECTION AND SCRUB TECHNIQUES
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|
|
Patent #:
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|
Issue Dt:
|
01/08/2013
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Application #:
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12947553
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Filing Dt:
|
11/16/2010
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Publication #:
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|
Pub Dt:
|
05/17/2012
| | | | |
Title:
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TRANSISTOR DRIVEN 3D MEMORY
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|
|
Patent #:
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|
Issue Dt:
|
08/27/2013
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Application #:
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12947693
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Filing Dt:
|
11/16/2010
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Publication #:
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|
Pub Dt:
|
05/17/2012
| | | | |
Title:
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WORD LINE KICKING WHEN SENSING NON-VOLATILE STORAGE
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|
|
Patent #:
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|
Issue Dt:
|
06/11/2013
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Application #:
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12948375
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Filing Dt:
|
11/17/2010
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Publication #:
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|
Pub Dt:
|
05/17/2012
| | | | |
Title:
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MEMORY SYSTEM WITH REVERSIBLE RESISTIVITY-SWITCHING USING PULSES OF ALTERNATRIE POLARITY
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|
|
Patent #:
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|
Issue Dt:
|
01/15/2013
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Application #:
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12948388
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Filing Dt:
|
11/17/2010
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Publication #:
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|
Pub Dt:
|
05/17/2012
| | | | |
Title:
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MEMORY SYSTEM WITH REVERSIBLE RESISTIVITY-SWITCHING USING PULSES OF ALTERNATE POLARITY
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|
|
Patent #:
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|
Issue Dt:
|
09/18/2012
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Application #:
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12949056
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Filing Dt:
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11/18/2010
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Publication #:
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|
Pub Dt:
|
03/17/2011
| | | | |
Title:
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DIODE ARRAY AND METHOD OF MAKING THEREOF
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|
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Patent #:
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Issue Dt:
|
09/30/2014
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Application #:
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12949146
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Filing Dt:
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11/18/2010
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Publication #:
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Pub Dt:
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08/25/2011
| | | | |
Title:
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STEP SOFT PROGRAM FOR REVERSIBLE RESISTIVITY-SWITCHING ELEMENTS
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Patent #:
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Issue Dt:
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02/26/2013
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Application #:
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12949590
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Filing Dt:
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11/18/2010
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Publication #:
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Pub Dt:
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11/17/2011
| | | | |
Title:
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ALTERNATING BIPOLAR FORMING VOLTAGE FOR RESISTIVITY-SWITCHING ELEMENTS
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Patent #:
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Issue Dt:
|
09/10/2013
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Application #:
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12955174
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Filing Dt:
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11/29/2010
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Publication #:
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Pub Dt:
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06/23/2011
| | | | |
Title:
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SYSTEM AND METHOD OF ERROR CORRECTION OF CONTROL DATA AT A MEMORY DEVICE
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Patent #:
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Issue Dt:
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01/08/2013
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Application #:
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12955377
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Filing Dt:
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11/29/2010
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Publication #:
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Pub Dt:
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03/31/2011
| | | | |
Title:
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METHODS AND APPARATUS FOR USING A CONFIGURATION ARRAY SIMILAR TO AN ASSOCIATED DATA ARRAY
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Patent #:
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Issue Dt:
|
01/17/2012
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Application #:
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12963540
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Filing Dt:
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12/08/2010
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Publication #:
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Pub Dt:
|
03/31/2011
| | | | |
Title:
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REVERSE SET WITH CURRENT LIMIT FOR NON-VOLATILE STORAGE
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Patent #:
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Issue Dt:
|
02/28/2012
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Application #:
|
12964286
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Filing Dt:
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12/09/2010
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Publication #:
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Pub Dt:
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06/09/2011
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Title:
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ADAPTIVE DYNAMIC READING OF FLASH MEMORIES
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Patent #:
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Issue Dt:
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02/24/2015
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Application #:
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12965503
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Filing Dt:
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12/10/2010
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Publication #:
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Pub Dt:
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06/14/2012
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Title:
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METHOD AND SYSTEM FOR HIJACKING WRITES TO A NON-VOLATILE MEMORY
|
|
|
Patent #:
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Issue Dt:
|
11/01/2011
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Application #:
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12965761
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Filing Dt:
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12/10/2010
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Publication #:
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Pub Dt:
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03/31/2011
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Title:
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NON-VOLATILE MEMORY WITH IMPROVED SENSING BY REDUCING SOURCE LINE CURRENT
|
|
|
Patent #:
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Issue Dt:
|
10/15/2013
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Application #:
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12966735
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Filing Dt:
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12/13/2010
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Publication #:
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Pub Dt:
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06/14/2012
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Title:
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PUNCH-THROUGH DIODE
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Patent #:
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Issue Dt:
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12/25/2012
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Application #:
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12973493
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Filing Dt:
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12/20/2010
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Publication #:
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Pub Dt:
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06/21/2012
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Title:
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CHARGE PUMP SYSTEM THAT DYNAMICALLY SELECTS NUMBER OF ACTIVE STAGES
|
|
|
Patent #:
|
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Issue Dt:
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10/23/2012
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Application #:
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12973641
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Filing Dt:
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12/20/2010
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Publication #:
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Pub Dt:
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06/21/2012
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Title:
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CHARGE PUMP SYSTEMS WITH REDUCTION IN INEFFICIENCIES DUE TO CHARGE SHARING BETWEEN CAPACITANCES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2013
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Application #:
|
12974235
|
Filing Dt:
|
12/21/2010
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Publication #:
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Pub Dt:
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06/21/2012
| | | | |
Title:
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STACKED METAL FIN CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
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Application #:
|
12974817
|
Filing Dt:
|
12/21/2010
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Publication #:
|
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Pub Dt:
|
06/21/2012
| | | | |
Title:
|
Alternate Page By Page Programming Scheme
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2013
|
Application #:
|
12976893
|
Filing Dt:
|
12/22/2010
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Publication #:
|
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Pub Dt:
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06/28/2012
| | | | |
Title:
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ALTERNATE BIT LINE BIAS DURING PROGRAMMING TO REDUCE CHANNEL TO FLOATING GATE COUPLING IN MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2012
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Application #:
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12978322
|
Filing Dt:
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12/23/2010
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Title:
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NON-VOLATILE MEMORY AND METHODS WITH READING SOFT BITS IN NON UNIFORM SCHEMES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
12978348
|
Filing Dt:
|
12/23/2010
|
Publication #:
|
|
Pub Dt:
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06/28/2012
| | | | |
Title:
|
Non-Volatile Memory And Methods With Asymmetric Soft Read Points Around Hard Read Points
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2013
|
Application #:
|
12979686
|
Filing Dt:
|
12/28/2010
|
Publication #:
|
|
Pub Dt:
|
02/02/2012
| | | | |
Title:
|
Systems and Methods for Implementing a Programming Sequence to Enhance Die Interleave
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2014
|
Application #:
|
12982833
|
Filing Dt:
|
12/30/2010
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
Controller and Method for Performing Background Operations
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12983752
|
Filing Dt:
|
01/03/2011
|
Publication #:
|
|
Pub Dt:
|
04/28/2011
| | | | |
Title:
|
CONNECTOR BLOCK FEATURE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
12983754
|
Filing Dt:
|
01/03/2011
|
Publication #:
|
|
Pub Dt:
|
10/13/2011
| | | | |
Title:
|
EFFICIENT FLASH MEMORY-BASED OBJECT STORE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
12983758
|
Filing Dt:
|
01/03/2011
|
Publication #:
|
|
Pub Dt:
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10/13/2011
| | | | |
Title:
|
FLEXIBLE WAY OF SPECIFYING STORAGE ATTRIBUTES IN A FLASH MEMORY-BASED OBJECT STORE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
|
Application #:
|
12983762
|
Filing Dt:
|
01/03/2011
|
Publication #:
|
|
Pub Dt:
|
10/13/2011
| | | | |
Title:
|
MINIMIZING WRITE OPERATIONS TO A FLASH MEMORY-BASED OBJECT STORE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
|
Application #:
|
12984505
|
Filing Dt:
|
01/04/2011
|
Publication #:
|
|
Pub Dt:
|
04/28/2011
| | | | |
Title:
|
METHODS OF CELL POPULATION DISTRIBUTION ASSISTED READ MARGINING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/2015
|
Application #:
|
12986117
|
Filing Dt:
|
01/06/2011
|
Publication #:
|
|
Pub Dt:
|
01/12/2012
| | | | |
Title:
|
APPARATUS, SYSTEM, AND METHOD FOR A STORAGE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2013
|
Application #:
|
12986927
|
Filing Dt:
|
01/07/2011
|
Publication #:
|
|
Pub Dt:
|
04/28/2011
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE INCLUDING FLIP CHIP CONTROLLER AT BOTTOM OF DIE STACK
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
13007812
|
Filing Dt:
|
01/17/2011
|
Publication #:
|
|
Pub Dt:
|
05/19/2011
| | | | |
Title:
|
HETEROJUNCTION DEVICE COMPRISING A SEMICONDUCTOR AND A RESISTIVITY-SWITCHING OXIDE OR NITRIDE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2013
|
Application #:
|
13008813
|
Filing Dt:
|
01/18/2011
|
Publication #:
|
|
Pub Dt:
|
05/12/2011
| | | | |
Title:
|
ENHANCED DATA STORAGE DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
13010563
|
Filing Dt:
|
01/20/2011
|
Publication #:
|
|
Pub Dt:
|
05/12/2011
| | | | |
Title:
|
METHOD OF REDUCING COUPLING BETWEEN FLOATING GATES IN NONVOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2012
|
Application #:
|
13015458
|
Filing Dt:
|
01/27/2011
|
Publication #:
|
|
Pub Dt:
|
07/28/2011
| | | | |
Title:
|
APPARATUS, SYSTEM, AND METHOD FOR DETERMINING A READ VOLTAGE THRESHOLD FOR SOLID-STATE STORAGE MEDIA
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13016732
|
Filing Dt:
|
01/28/2011
|
Publication #:
|
|
Pub Dt:
|
01/12/2012
| | | | |
Title:
|
Detection of Word-Line Leakage in Memory Arrays: Current Based Approach
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2014
|
Application #:
|
13020007
|
Filing Dt:
|
02/02/2011
|
Publication #:
|
|
Pub Dt:
|
08/02/2012
| | | | |
Title:
|
DIODES WITH NATIVE OXIDE REGIONS FOR USE IN MEMORY ARRAYS AND METHODS OF FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
13022404
|
Filing Dt:
|
02/07/2011
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
MEMORY CARD TEST INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2013
|
Application #:
|
13023147
|
Filing Dt:
|
02/08/2011
|
Publication #:
|
|
Pub Dt:
|
08/09/2012
| | | | |
Title:
|
DATA RECOVERY USING ADDITIONAL ERROR CORRECTION CODING DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
13024663
|
Filing Dt:
|
02/10/2011
|
Publication #:
|
|
Pub Dt:
|
06/23/2011
| | | | |
Title:
|
METHOD FOR ANGULAR DOPING OF SOURCE AND DRAIN REGIONS FOR ODD AND EVEN NAND BLOCKS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2013
|
Application #:
|
13024676
|
Filing Dt:
|
02/10/2011
|
Publication #:
|
|
Pub Dt:
|
06/02/2011
| | | | |
Title:
|
METHOD FOR DECODING DATA IN NON-VOLATILE STORAGE USING RELIABILITY METRICS BASED ON MULTIPLE READS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2012
|
Application #:
|
13025123
|
Filing Dt:
|
02/10/2011
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
APPARATUS FOR REDUCING THE IMPACT OF PROGRAM DISTURB
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2012
|
Application #:
|
13025126
|
Filing Dt:
|
02/10/2011
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
APPARATUS FOR REDUCING THE IMPACT OF PROGRAM DISTURB
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2015
|
Application #:
|
13026381
|
Filing Dt:
|
02/14/2011
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
PILLAR DEVICES AND METHODS OF MAKING THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2012
|
Application #:
|
13027055
|
Filing Dt:
|
02/14/2011
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
FLASH EEPROM SYSTEM WITH SIMULTANEOUS MULTIPLE DATA SECTOR PROGRAMMING AND STORAGE OF PHYSICAL BLOCK CHARACTERISTICS IN OTHER DESIGNATED BLOCKS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2014
|
Application #:
|
13028149
|
Filing Dt:
|
02/15/2011
|
Publication #:
|
|
Pub Dt:
|
08/16/2012
| | | | |
Title:
|
Systems and Methods for Managing Data Input/Output Operations
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2012
|
Application #:
|
13028674
|
Filing Dt:
|
02/16/2011
|
Publication #:
|
|
Pub Dt:
|
06/16/2011
| | | | |
Title:
|
READ OPERATION FOR NON-VOLATILE STORAGE WITH COMPENSATION FOR COUPLING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2013
|
Application #:
|
13028847
|
Filing Dt:
|
02/16/2011
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
HIGH VOLTAGE GENERATION AND CONTROL IN SOURCE-SIDE INJECTION PROGRAMMING OF NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13029361
|
Filing Dt:
|
02/17/2011
|
Publication #:
|
|
Pub Dt:
|
08/25/2011
| | | | |
Title:
|
Structure And Fabrication Method For Resistance-Change Memory Cell In 3-D Memory
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
13029787
|
Filing Dt:
|
02/17/2011
|
Publication #:
|
|
Pub Dt:
|
06/16/2011
| | | | |
Title:
|
NONVOLATILE MEMORY AND METHOD FOR COMPENSATING DURING PROGRAMMING FOR PERTURBING CHARGES OF NEIGHBORING CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
13029848
|
Filing Dt:
|
02/17/2011
|
Publication #:
|
|
Pub Dt:
|
06/09/2011
| | | | |
Title:
|
NONVOLATILE MEMORY AND METHOD WITH REDUCED PROGRAM VERIFY BY IGNORING FASTEST AND/OR SLOWEST PROGRAMMING BITS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/2011
|
Application #:
|
13031041
|
Filing Dt:
|
02/18/2011
|
Publication #:
|
|
Pub Dt:
|
06/16/2011
| | | | |
Title:
|
TRACKING CELLS FOR A MEMORY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13031531
|
Filing Dt:
|
02/21/2011
|
Publication #:
|
|
Pub Dt:
|
04/26/2012
| | | | |
Title:
|
SYSTEM AND METHOD OF INTERLEAVING DATA ACCORDING TO AN ADJUSTABLE PARAMETER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2013
|
Application #:
|
13035539
|
Filing Dt:
|
02/25/2011
|
Publication #:
|
|
Pub Dt:
|
06/16/2011
| | | | |
Title:
|
SEGMENTED BITSCAN FOR VERIFICATION OF PROGRAMMING
|
|