skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:047797/0854   Pages: 47
Recorded: 10/16/2018
Attorney Dkt #:CORRECTIVE ASSIGNMENT
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE FOLLOWING NUMBERS 6272046,7277824,7282374,7286384,7299106,7337032,7460920,7519447 PREVIOUSLY RECORDED ON REEL 039676 FRAME 0237. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST.
Total properties: 408
Page 2 of 5
Pages: 1 2 3 4 5
1
Patent #:
7652930
Issue Dt:
01/26/2010
Application #:
10537857
Filing Dt:
06/07/2005
Publication #:
US20060056240
Pub Dt:
03/16/2006
Title:
METHOD, CIRCUIT AND SYSTEM FOR ERASING ONE OR MORE NON-VOLATILE MEMORY CELLS
2
Patent #:
6778437
Issue Dt:
08/17/2004
Application #:
10635974
Filing Dt:
08/07/2003
Title:
MEMORY CIRCUIT FOR PROVIDING WORD LINE REDUNDANCY IN A MEMORY SECTOR
3
Patent #:
7178004
Issue Dt:
02/13/2007
Application #:
10653388
Filing Dt:
09/03/2003
Publication #:
US20040153621
Pub Dt:
08/05/2004
Title:
MEMORY ARRAY PROGRAMMING CIRCUIT AND A METHOD FOR USING THE CIRCUIT
4
Patent #:
6888757
Issue Dt:
05/03/2005
Application #:
10656251
Filing Dt:
09/08/2003
Publication #:
US20040047198
Pub Dt:
03/11/2004
Title:
METHOD FOR ERASING A MEMORY CELL
5
Patent #:
6954393
Issue Dt:
10/11/2005
Application #:
10662535
Filing Dt:
09/16/2003
Publication #:
US20050057953
Pub Dt:
03/17/2005
Title:
READING ARRAY CELL WITH MATCHED REFERENCE CELL
6
Patent #:
6922099
Issue Dt:
07/26/2005
Application #:
10689054
Filing Dt:
10/21/2003
Publication #:
US20050083112
Pub Dt:
04/21/2005
Title:
CLASS AB VOLTAGE REGULATOR
7
Patent #:
6963505
Issue Dt:
11/08/2005
Application #:
10695448
Filing Dt:
10/29/2003
Publication #:
US20040136220
Pub Dt:
07/15/2004
Title:
METHOD CIRCUIT AND SYSTEM FOR DETERMINING A REFERENCE VOLTAGE
8
Patent #:
7136304
Issue Dt:
11/14/2006
Application #:
10695449
Filing Dt:
10/29/2003
Publication #:
US20050105337
Pub Dt:
05/19/2005
Title:
METHOD, SYSTEM AND CIRCUIT FOR PROGRAMMING A NON-VOLATILE MEMORY ARRAY
9
Patent #:
6992932
Issue Dt:
01/31/2006
Application #:
10695457
Filing Dt:
10/29/2003
Publication #:
US20040136236
Pub Dt:
07/15/2004
Title:
METHOD CIRCUIT AND SYSTEM FOR READ ERROR DETECTION IN A NON-VOLATILE MEMORY ARRAY
10
Patent #:
7174435
Issue Dt:
02/06/2007
Application #:
10715366
Filing Dt:
11/19/2003
Publication #:
US20040139289
Pub Dt:
07/15/2004
Title:
MEMORY CONTROL CIRCUIT, MEMORY DEVICE, AND MICROCOMPUTER
11
Patent #:
6961267
Issue Dt:
11/01/2005
Application #:
10738301
Filing Dt:
12/16/2003
Title:
METHOD AND DEVICE FOR PROGRAMMING CELLS IN A MEMORY ARRAY IN A NARROW DISTRIBUTION
12
Patent #:
6864739
Issue Dt:
03/08/2005
Application #:
10740616
Filing Dt:
12/22/2003
Publication #:
US20040130385
Pub Dt:
07/08/2004
Title:
CHARGE PUMP STAGE WITH BODY EFFECT MINIMIZATION
13
Patent #:
7079420
Issue Dt:
07/18/2006
Application #:
10747217
Filing Dt:
12/30/2003
Publication #:
US20050058005
Pub Dt:
03/17/2005
Title:
METHOD FOR OPERATING A MEMORY DEVICE
14
Patent #:
7115469
Issue Dt:
10/03/2006
Application #:
10754948
Filing Dt:
01/08/2004
Title:
INTEGRATED ONO PROCESSING FOR SEMICONDUCTOR DEVICES USING IN-SITU STEAM GENERATION (ISSG) PROCESS
15
Patent #:
7176728
Issue Dt:
02/13/2007
Application #:
10774806
Filing Dt:
02/10/2004
Publication #:
US20050174152
Pub Dt:
08/11/2005
Title:
HIGH VOLTAGE LOW POWER DRIVER
16
Patent #:
7142464
Issue Dt:
11/28/2006
Application #:
10810683
Filing Dt:
03/29/2004
Publication #:
US20040218426
Pub Dt:
11/04/2004
Title:
APPARATUS AND METHODS FOR MULTI-LEVEL SENSING IN A MEMORY ARRAY
17
Patent #:
7755938
Issue Dt:
07/13/2010
Application #:
10826375
Filing Dt:
04/19/2004
Publication #:
US20050232024
Pub Dt:
10/20/2005
Title:
METHOD FOR READING A MEMORY ARRAY WITH NEIGHBOR EFFECT CANCELLATION
18
Patent #:
8896048
Issue Dt:
11/25/2014
Application #:
10861581
Filing Dt:
06/04/2004
Title:
Apparatus and method for source side implantation after spacer formation to reduce short channel effects in metal oxide semiconductor field effect transistors
19
Patent #:
7190212
Issue Dt:
03/13/2007
Application #:
10862401
Filing Dt:
06/08/2004
Publication #:
US20050270089
Pub Dt:
12/08/2005
Title:
POWER-UP AND BGREF CIRCUITRY
20
Patent #:
7187595
Issue Dt:
03/06/2007
Application #:
10862404
Filing Dt:
06/08/2004
Publication #:
US20060039219
Pub Dt:
02/23/2006
Title:
REPLENISHMENT FOR INTERNAL VOLTAGE
21
Patent #:
7256438
Issue Dt:
08/14/2007
Application #:
10862405
Filing Dt:
06/08/2004
Publication #:
US20050269619
Pub Dt:
12/08/2005
Title:
MOS CAPACITOR WITH REDUCED PARASITIC CAPACITANCE
22
Patent #:
7116577
Issue Dt:
10/03/2006
Application #:
10863529
Filing Dt:
06/09/2004
Publication #:
US20050111257
Pub Dt:
05/26/2005
Title:
TWO BIT NON-VOLATILE ELECTRICALLY ERASABLE AND PROGRAMMABLE SEMICONDUCTOR MEMORY CELL UTILIZING ASYMMETRICAL CHARGE TRAPPING
23
Patent #:
7366025
Issue Dt:
04/29/2008
Application #:
10864500
Filing Dt:
06/10/2004
Publication #:
US20050276118
Pub Dt:
12/15/2005
Title:
REDUCED POWER PROGRAMMING OF NON-VOLATILE CELLS
24
Patent #:
7095655
Issue Dt:
08/22/2006
Application #:
10916413
Filing Dt:
08/12/2004
Publication #:
US20060034122
Pub Dt:
02/16/2006
Title:
DYNAMIC MATCHING OF SIGNAL PATH AND REFERENCE PATH FOR SENSING
25
Patent #:
7407882
Issue Dt:
08/05/2008
Application #:
10928665
Filing Dt:
08/27/2004
Title:
SEMICONDUCTOR COMPONENT HAVING A CONTACT STRUCTURE AND METHOD OF MANUFACTURE
26
Patent #:
7295461
Issue Dt:
11/13/2007
Application #:
10958044
Filing Dt:
10/04/2004
Title:
MEMORY DEVICE WITH A SELF-ASSEMBLED POLYMER FILM AND METHOD OF MAKING THE SAME
27
Patent #:
7943979
Issue Dt:
05/17/2011
Application #:
10961398
Filing Dt:
10/12/2004
Publication #:
US20080073702
Pub Dt:
03/27/2008
Title:
NROM FABRICATION METHOD
28
Patent #:
7235867
Issue Dt:
06/26/2007
Application #:
10976876
Filing Dt:
11/01/2004
Title:
SEMICONDUCTOR DEVICE WITH ELECTRICALLY BIASED DIE EDGE SEAL
29
Patent #:
8339102
Issue Dt:
12/25/2012
Application #:
10986799
Filing Dt:
11/15/2004
Publication #:
US20050174709
Pub Dt:
08/11/2005
Title:
A SYSTEM AND METHOD FOR REGULATING LOADING ON AN INTEGRATED CIRCUIT POWER SUPPLY
30
Patent #:
7232765
Issue Dt:
06/19/2007
Application #:
10988239
Filing Dt:
11/12/2004
Title:
UTILIZATION OF A TA-CONTAINING CAP OVER COPPER TO FACILITATE CONCURRENT FORMATION OF COPPER VIAS AND MEMORY ELEMENT STRUCTURES
31
Patent #:
7052961
Issue Dt:
05/30/2006
Application #:
11003574
Filing Dt:
12/03/2004
Title:
METHOD FOR FORMING WORDLINES HAVING IRREGULAR SPACING IN A MEMORY ARRAY
32
Patent #:
7257025
Issue Dt:
08/14/2007
Application #:
11007332
Filing Dt:
12/09/2004
Publication #:
US20060126382
Pub Dt:
06/15/2006
Title:
METHOD FOR READING NON-VOLATILE MEMORY CELLS
33
Patent #:
7102156
Issue Dt:
09/05/2006
Application #:
11021681
Filing Dt:
12/23/2004
Title:
MEMORY ELEMENTS USING ORGANIC ACTIVE LAYER
34
Patent #:
6954382
Issue Dt:
10/11/2005
Application #:
11024750
Filing Dt:
12/30/2004
Publication #:
US20050117444
Pub Dt:
06/02/2005
Title:
MULTIPLE USE MEMORY CHIP
35
Patent #:
7190620
Issue Dt:
03/13/2007
Application #:
11029380
Filing Dt:
01/06/2005
Publication #:
US20050117395
Pub Dt:
06/02/2005
Title:
METHOD FOR OPERATING A MEMORY DEVICE
36
Patent #:
7084062
Issue Dt:
08/01/2006
Application #:
11033653
Filing Dt:
01/12/2005
Title:
USE OF TA-CAPPED METAL LINE TO IMPROVE FORMATION OF MEMORY ELEMENT FILMS
37
Patent #:
7081776
Issue Dt:
07/25/2006
Application #:
11057143
Filing Dt:
02/15/2005
Publication #:
US20050134326
Pub Dt:
06/23/2005
Title:
VOLTAGE DETECTION CIRCUIT, SEMICONDUCTOR DEVICE, METHOD FOR CONTROLLING VOLTAGE DETECTION CIRCUIT
38
Patent #:
7306988
Issue Dt:
12/11/2007
Application #:
11063138
Filing Dt:
02/22/2005
Title:
MEMORY CELL AND METHOD OF MAKING THE MEMORY CELL
39
Patent #:
7106651
Issue Dt:
09/12/2006
Application #:
11066484
Filing Dt:
02/28/2005
Publication #:
US20050141328
Pub Dt:
06/30/2005
Title:
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF READING DATA FROM SEMICONDUCTOR MEMORY DEVICE
40
Patent #:
6975543
Issue Dt:
12/13/2005
Application #:
11085133
Filing Dt:
03/22/2005
Publication #:
US20050162921
Pub Dt:
07/28/2005
Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WHICH STORES TWO BITS PER MEMORY CELL
41
Patent #:
7180785
Issue Dt:
02/20/2007
Application #:
11085496
Filing Dt:
03/22/2005
Publication #:
US20050162911
Pub Dt:
07/28/2005
Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WITH A PLURALITY OF SECTORS
42
Patent #:
7196008
Issue Dt:
03/27/2007
Application #:
11087793
Filing Dt:
03/23/2005
Title:
ALUMINUM OXIDE AS LINER OR COVER LAYER TO SPACERS IN MEMORY DEVICE
43
Patent #:
7233192
Issue Dt:
06/19/2007
Application #:
11099660
Filing Dt:
04/06/2005
Publication #:
US20060226890
Pub Dt:
10/12/2006
Title:
ON/OFF CHARGE PUMP
44
Patent #:
7339826
Issue Dt:
03/04/2008
Application #:
11103367
Filing Dt:
04/11/2005
Publication #:
US20060227608
Pub Dt:
10/12/2006
Title:
THRESHOLD VOLTAGE SHIFT IN NROM CELLS
45
Patent #:
7776682
Issue Dt:
08/17/2010
Application #:
11110165
Filing Dt:
04/20/2005
Title:
ORDERED POROSITY TO DIRECT MEMORY ELEMENT FORMATION
46
Patent #:
7679129
Issue Dt:
03/16/2010
Application #:
11128389
Filing Dt:
05/13/2005
Title:
SYSTEM AND METHOD FOR IMPROVING OXIDE-NITRIDE-OXIDE (ONO) COUPLING IN A SEMICONDUCTOR DEVICE
47
Patent #:
7184313
Issue Dt:
02/27/2007
Application #:
11155252
Filing Dt:
06/17/2005
Publication #:
US20060285408
Pub Dt:
12/21/2006
Title:
METHOD CIRCUIT AND SYSTEM FOR COMPENSATING FOR TEMPERATURE INDUCED MARGIN LOSS IN NON-VOLATILE MEMORY CELLS
48
Patent #:
7202128
Issue Dt:
04/10/2007
Application #:
11165330
Filing Dt:
06/24/2005
Title:
METHOD OF FORMING A MEMORY DEVICE HAVING IMPROVED ERASE SPEED
49
Patent #:
8024495
Issue Dt:
09/20/2011
Application #:
11169747
Filing Dt:
06/30/2005
Publication #:
US20060215678
Pub Dt:
09/28/2006
Title:
COMMUNICATION DATA CONTROLLER
50
Patent #:
7082066
Issue Dt:
07/25/2006
Application #:
11170183
Filing Dt:
06/30/2005
Publication #:
US20050254322
Pub Dt:
11/17/2005
Title:
FLASH MEMORY HAVING SPARE SECTOR WITH SHORTENED ACCESS TIME
51
Patent #:
7262422
Issue Dt:
08/28/2007
Application #:
11173257
Filing Dt:
07/01/2005
Publication #:
US20070026345
Pub Dt:
02/01/2007
Title:
USE OF SUPERCRITICAL FLUID TO DRY WAFER AND CLEAN LENS IN IMMERSION LITHOGRAPHY
52
Patent #:
7317633
Issue Dt:
01/08/2008
Application #:
11175801
Filing Dt:
07/05/2005
Publication #:
US20060007612
Pub Dt:
01/12/2006
Title:
PROTECTION OF NROM DEVICES FROM CHARGE DAMAGE
53
Patent #:
8759894
Issue Dt:
06/24/2014
Application #:
11189765
Filing Dt:
07/27/2005
Title:
System and method for reducing cross-coupling noise between charge storage elements in a semiconductor device
54
Patent #:
7315765
Issue Dt:
01/01/2008
Application #:
11192691
Filing Dt:
07/29/2005
Title:
AUTOMATED CONTROL THREAD DETERMINATION BASED UPON POST-PROCESS CONSIDERATION
55
Patent #:
7123532
Issue Dt:
10/17/2006
Application #:
11194394
Filing Dt:
08/01/2005
Publication #:
US20060018153
Pub Dt:
01/26/2006
Title:
OPERATING ARRAY CELLS WITH MATCHED REFERENCE CELLS
56
Patent #:
7242618
Issue Dt:
07/10/2007
Application #:
11205411
Filing Dt:
08/17/2005
Publication #:
US20060126383
Pub Dt:
06/15/2006
Title:
METHOD FOR READING NON-VOLATILE MEMORY CELLS
57
Patent #:
7668017
Issue Dt:
02/23/2010
Application #:
11205716
Filing Dt:
08/17/2005
Publication #:
US20070041249
Pub Dt:
02/22/2007
Title:
METHOD OF ERASING NON-VOLATILE MEMORY CELLS
58
Patent #:
8116142
Issue Dt:
02/14/2012
Application #:
11220872
Filing Dt:
09/06/2005
Publication #:
US20070058444
Pub Dt:
03/15/2007
Title:
METHOD AND CIRCUIT FOR ERASING A NON-VOLATILE MEMORY CELL
59
Patent #:
7295475
Issue Dt:
11/13/2007
Application #:
11229664
Filing Dt:
09/20/2005
Publication #:
US20070064493
Pub Dt:
03/22/2007
Title:
FLASH MEMORY PROGRAMMING USING AN INDICATION BIT TO INTERPRET STATE
60
Patent #:
7928005
Issue Dt:
04/19/2011
Application #:
11235214
Filing Dt:
09/27/2005
Publication #:
US20070072437
Pub Dt:
03/29/2007
Title:
METHOD FOR FORMING NARROW STRUCTURES IN A SEMICONDUCTOR DEVICE
61
Patent #:
7202654
Issue Dt:
04/10/2007
Application #:
11236359
Filing Dt:
09/27/2005
Publication #:
US20070069711
Pub Dt:
03/29/2007
Title:
DIODE STACK HIGH VOLTAGE REGULATOR
62
Patent #:
7221138
Issue Dt:
05/22/2007
Application #:
11236360
Filing Dt:
09/27/2005
Publication #:
US20070069714
Pub Dt:
03/29/2007
Title:
METHOD AND APPARATUS FOR MEASURING CHARGE PUMP OUTPUT CURRENT
63
Patent #:
7704878
Issue Dt:
04/27/2010
Application #:
11240468
Filing Dt:
10/03/2005
Publication #:
US20070077754
Pub Dt:
04/05/2007
Title:
CONTACT SPACER FORMATION USING ATOMIC LAYER DEPOSITION
64
Patent #:
7738304
Issue Dt:
06/15/2010
Application #:
11246193
Filing Dt:
10/11/2005
Publication #:
US20060152975
Pub Dt:
07/13/2006
Title:
MULTIPLE USE MEMORY CHIP
65
Patent #:
7288782
Issue Dt:
10/30/2007
Application #:
11251291
Filing Dt:
10/14/2005
Title:
USE OF TA-CAPPED METAL LINE TO IMPROVE FORMATION OF MEMORY ELEMENT FILMS
66
Patent #:
8443131
Issue Dt:
05/14/2013
Application #:
11259874
Filing Dt:
10/26/2005
Publication #:
US20060101301
Pub Dt:
05/11/2006
Title:
NON-VOLATILE MEMORY DEVICE
67
Patent #:
7251161
Issue Dt:
07/31/2007
Application #:
11290001
Filing Dt:
11/30/2005
Publication #:
US20060215477
Pub Dt:
09/28/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING SAID SEMICONDUCTOR DEVICE
68
Patent #:
7468296
Issue Dt:
12/23/2008
Application #:
11290787
Filing Dt:
11/30/2005
Title:
THIN FILM GERMANIUM DIODE WITH LOW REVERSE BREAKDOWN
69
Patent #:
7352627
Issue Dt:
04/01/2008
Application #:
11324718
Filing Dt:
01/03/2006
Publication #:
US20070153575
Pub Dt:
07/05/2007
Title:
METHOD, SYSTEM, AND CIRCUIT FOR OPERATING A NON-VOLATILE MEMORY ARRAY
70
Patent #:
7420848
Issue Dt:
09/02/2008
Application #:
11328015
Filing Dt:
01/09/2006
Publication #:
US20060126396
Pub Dt:
06/15/2006
Title:
METHOD, SYSTEM, AND CIRCUIT FOR OPERATING A NON-VOLATILE MEMORY ARRAY
71
Patent #:
7369440
Issue Dt:
05/06/2008
Application #:
11335318
Filing Dt:
01/19/2006
Publication #:
US20060158938
Pub Dt:
07/20/2006
Title:
METHOD, CIRCUIT AND SYSTEMS FOR ERASING ONE OR MORE NON-VOLATILE MEMORY CELLS
72
Patent #:
7468926
Issue Dt:
12/23/2008
Application #:
11335321
Filing Dt:
01/19/2006
Publication #:
US20060158940
Pub Dt:
07/20/2006
Title:
PARTIAL ERASE VERIFY
73
Patent #:
7623936
Issue Dt:
11/24/2009
Application #:
11356267
Filing Dt:
02/16/2006
Title:
DETERMINING SCHEDULING PRIORITY USING QUEUE TIME OPTIMIZATION
74
Patent #:
8253452
Issue Dt:
08/28/2012
Application #:
11357081
Filing Dt:
02/21/2006
Publication #:
US20070194835
Pub Dt:
08/23/2007
Title:
CIRCUIT AND METHOD FOR POWERING UP AN INTEGRATED CIRCUIT AND AN INTEGRATED CIRCUIT UTILIZING SAME
75
Patent #:
8053812
Issue Dt:
11/08/2011
Application #:
11373932
Filing Dt:
03/13/2006
Publication #:
US20060208281
Pub Dt:
09/21/2006
Title:
CONTACT IN PLANAR NROM TECHNOLOGY
76
Patent #:
7404026
Issue Dt:
07/22/2008
Application #:
11400902
Filing Dt:
04/10/2006
Publication #:
US20070239918
Pub Dt:
10/11/2007
Title:
MULTI MEDIA CARD WITH HIGH STORAGE CAPACITY
77
Patent #:
7732281
Issue Dt:
06/08/2010
Application #:
11410695
Filing Dt:
04/24/2006
Title:
METHODS FOR FABRICATING DUAL BIT FLASH MEMORY DEVICES
78
Patent #:
7622389
Issue Dt:
11/24/2009
Application #:
11411353
Filing Dt:
04/25/2006
Title:
SELECTIVE CONTACT FORMATION USING MASKING AND RESIST PATTERNING TECHNIQUES
79
Patent #:
7512009
Issue Dt:
03/31/2009
Application #:
11413962
Filing Dt:
04/27/2006
Publication #:
US20060268621
Pub Dt:
11/30/2006
Title:
METHOD FOR PROGRAMMING A REFERENCE CELL
80
Patent #:
7638850
Issue Dt:
12/29/2009
Application #:
11440624
Filing Dt:
05/24/2006
Publication #:
US20060211188
Pub Dt:
09/21/2006
Title:
NON-VOLATILE MEMORY STRUCTURE AND METHOD OF FABRICATION
81
Patent #:
7760554
Issue Dt:
07/20/2010
Application #:
11462006
Filing Dt:
08/02/2006
Publication #:
US20070195607
Pub Dt:
08/23/2007
Title:
NROM NON-VOLATILE MEMORY AND MODE OF OPERATION
82
Patent #:
7692961
Issue Dt:
04/06/2010
Application #:
11462011
Filing Dt:
08/02/2006
Publication #:
US20070196982
Pub Dt:
08/23/2007
Title:
METHOD, CIRCUIT AND DEVICE FOR DISTURB-CONTROL OF PROGRAMMING NONVOLATILE MEMORY CELLS BY HOT-HOLE INJECTION (HHI) AND BY CHANNEL HOT-ELECTRON (CHE) INJECTION
83
Patent #:
7532529
Issue Dt:
05/12/2009
Application #:
11464253
Filing Dt:
08/14/2006
Publication #:
US20060285402
Pub Dt:
12/21/2006
Title:
APPARATUS AND METHODS FOR MULTI-LEVEL SENSING IN A MEMORY ARRAY
84
Patent #:
7804126
Issue Dt:
09/28/2010
Application #:
11489237
Filing Dt:
07/18/2006
Publication #:
US20070048940
Pub Dt:
03/01/2007
Title:
DENSE NON-VOLATILE MEMORY ARRAY AND METHOD OF FABRICATION
85
Patent #:
7786512
Issue Dt:
08/31/2010
Application #:
11489747
Filing Dt:
07/18/2006
Publication #:
US20070051982
Pub Dt:
03/08/2007
Title:
DENSE NON-VOLATILE MEMORY ARRAY AND METHOD OF FABRICATION
86
Patent #:
7466594
Issue Dt:
12/16/2008
Application #:
11490539
Filing Dt:
07/19/2006
Publication #:
US20070171717
Pub Dt:
07/26/2007
Title:
DYNAMIC MATCHING OF SIGNAL PATH AND REFERENCE PATH FOR SENSING
87
Patent #:
7405969
Issue Dt:
07/29/2008
Application #:
11497078
Filing Dt:
08/01/2006
Publication #:
US20060262598
Pub Dt:
11/23/2006
Title:
NON-VOLATILE MEMORY CELL AND NON-VOLATILE MEMORY DEVICES
88
Patent #:
7319615
Issue Dt:
01/15/2008
Application #:
11497597
Filing Dt:
08/02/2006
Publication #:
US20080037330
Pub Dt:
02/14/2008
Title:
RAMP GATE ERASE FOR DUAL BIT FLASH MEMORY
89
Patent #:
9766738
Issue Dt:
09/19/2017
Application #:
11509513
Filing Dt:
08/23/2006
Title:
Position and usage based prioritization for capacitance sense interface
90
Patent #:
7701779
Issue Dt:
04/20/2010
Application #:
11518192
Filing Dt:
09/11/2006
Publication #:
US20070253248
Pub Dt:
11/01/2007
Title:
METHOD FOR PROGRAMMING A REFERENCE CELL
91
Patent #:
8093680
Issue Dt:
01/10/2012
Application #:
11521219
Filing Dt:
09/14/2006
Title:
METAL-INSULATOR-METAL-INSULATOR-METAL (MIMIM) MEMORY DEVICE
92
Patent #:
7785965
Issue Dt:
08/31/2010
Application #:
11530145
Filing Dt:
09/08/2006
Publication #:
US20080064165
Pub Dt:
03/13/2008
Title:
DUAL STORAGE NODE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME
93
Patent #:
7829464
Issue Dt:
11/09/2010
Application #:
11551390
Filing Dt:
10/20/2006
Publication #:
US20080096388
Pub Dt:
04/24/2008
Title:
PLANARIZATION METHOD USING HYBRID OXIDE AND POLYSILICON CMP
94
Patent #:
7457183
Issue Dt:
11/25/2008
Application #:
11580995
Filing Dt:
10/16/2006
Publication #:
US20070133276
Pub Dt:
06/14/2007
Title:
OPERATING ARRAY CELLS WITH MATCHED REFERENCE CELLS
95
Patent #:
7675782
Issue Dt:
03/09/2010
Application #:
11581449
Filing Dt:
10/17/2006
Publication #:
US20070115726
Pub Dt:
05/24/2007
Title:
METHOD, SYSTEM AND CIRCUIT FOR PROGRAMING A NON-VOLATILE MEMORY ARRAY
96
Patent #:
7605579
Issue Dt:
10/20/2009
Application #:
11602222
Filing Dt:
11/21/2006
Publication #:
US20080094127
Pub Dt:
04/24/2008
Title:
MEASURING AND CONTROLLING CURRENT CONSUMPTION AND OUTPUT CURRENT OF CHARGE PUMPS
97
Patent #:
7586788
Issue Dt:
09/08/2009
Application #:
11607090
Filing Dt:
12/01/2006
Publication #:
US20070133303
Pub Dt:
06/14/2007
Title:
NONVOLATILE SEMICONDUCTOR MEMORY HAVING VOLTAGE ADJUSTING CIRCUIT
98
Patent #:
8117445
Issue Dt:
02/14/2012
Application #:
11613620
Filing Dt:
12/20/2006
Publication #:
US20080155257
Pub Dt:
06/26/2008
Title:
NEAR FIELD COMMUNICATION, SECURITY AND NON-VOLATILE MEMORY INTEGRATED SUB-SYSTEM FOR EMBEDDED PORTABLE APPLICATIONS
99
Patent #:
8190908
Issue Dt:
05/29/2012
Application #:
11613627
Filing Dt:
12/20/2006
Publication #:
US20080155268
Pub Dt:
06/26/2008
Title:
SECURE DATA VERIFICATION VIA BIOMETRIC INPUT
100
Patent #:
8190919
Issue Dt:
05/29/2012
Application #:
11613691
Filing Dt:
12/20/2006
Publication #:
US20080109662
Pub Dt:
05/08/2008
Title:
MULTIPLE STAKEHOLDER SECURE MEMORY PARTITIONING AND ACCESS CONTROL
Assignor
1
CYPRESS SEMICONDUCTOR CORPORATION
Exec Dt:
12/29/2017
Assignee
1
MORGAN STANLEY SENIOR FUNDING
1585 BROADWAY STREET
NEW YORK, NEW YORK 10036
Correspondence name and address
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT
SAN JOSE, CA 95134

Search Results as of: 05/31/2024 03:00 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT