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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	052644/0868			Pages:	17
		Recorded:	05/13/2020
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 252
Page 1 of 3
Pages: 1 2 3

Patent #:	9455180	Issue Dt:	09/27/2016	Application #:	14943118	Filing Dt:	11/17/2015
Title:	CONTROLLED SPALLING OF FINE FEATURES

Patent #:	9711617	Issue Dt:	07/18/2017	Application #:	14963446	Filing Dt:	12/09/2015
Publication #:	US20170170297	Pub Dt:	06/15/2017
Title:	DUAL ISOLATION FIN AND METHOD OF MAKING

Patent #:	9570575	Issue Dt:	02/14/2017	Application #:	14974123	Filing Dt:	12/18/2015
Title:	CAPACITOR IN STRAIN RELAXED BUFFER

Patent #:	9735275	Issue Dt:	08/15/2017	Application #:	14974537	Filing Dt:	12/18/2015
Publication #:	US20170179274	Pub Dt:	06/22/2017
Title:	CHANNEL REPLACEMENT AND BIMODAL DOPING SCHEME FOR BULK FINFET THRESHOLD VOLTAGE MODULATION WITH REDUCED PERFORMANCE PENALTY

Patent #:	9754819	Issue Dt:	09/05/2017	Application #:	14977945	Filing Dt:	12/22/2015
Publication #:	US20170178948	Pub Dt:	06/22/2017
Title:	INTERLEVEL AIRGAP DIELECTRIC

Patent #:	9613873	Issue Dt:	04/04/2017	Application #:	14978362	Filing Dt:	12/22/2015
Title:	NANOWIRE SEMICONDUCTOR DEVICE

Patent #:	9666669	Issue Dt:	05/30/2017	Application #:	14978430	Filing Dt:	12/22/2015
Publication #:	US20170179229	Pub Dt:	06/22/2017
Title:	SUPERLATTICE LATERAL BIPOLAR JUNCTION TRANSISTOR

Patent #:	9536832	Issue Dt:	01/03/2017	Application #:	14983643	Filing Dt:	12/30/2015
Title:	JUNCTIONLESS BACK END OF THE LINE VIA CONTACT

Patent #:	9805935	Issue Dt:	10/31/2017	Application #:	14985943	Filing Dt:	12/31/2015
Publication #:	US20170194155	Pub Dt:	07/06/2017
Title:	BOTTOM SOURCE/DRAIN SILICIDATION FOR VERTICAL FIELD-EFFECT TRANSISTOR (FET)

Patent #:	9997406	Issue Dt:	06/12/2018	Application #:	15015389	Filing Dt:	02/04/2016
Publication #:	US20170229344	Pub Dt:	08/10/2017
Title:	COLUMNAR INTERCONNECTS AND METHOD OF MAKING THEM

Patent #:	9496225	Issue Dt:	11/15/2016	Application #:	15018387	Filing Dt:	02/08/2016
Title:	RECESSED METAL LINER CONTACT WITH COPPER FILL

Patent #:	9947586	Issue Dt:	04/17/2018	Application #:	15042908	Filing Dt:	02/12/2016
Publication #:	US20170236755	Pub Dt:	08/17/2017
Title:	TUNNELING FIN TYPE FIELD EFFECT TRANSISTOR WITH EPITAXIAL SOURCE AND DRAIN REGIONS

Patent #:	9793213	Issue Dt:	10/17/2017	Application #:	15044258	Filing Dt:	02/16/2016
Publication #:	US20170236784	Pub Dt:	08/17/2017
Title:	ION FLOW BARRIER STRUCTURE FOR INTERCONNECT METALLIZATION

Patent #:	10256161	Issue Dt:	04/09/2019	Application #:	15045778	Filing Dt:	02/17/2016
Publication #:	US20170236759	Pub Dt:	08/17/2017
Title:	DUAL WORK FUNCTION CMOS DEVICES

Patent #:	9666528	Issue Dt:	05/30/2017	Application #:	15050975	Filing Dt:	02/23/2016
Title:	BEOL VERTICAL FUSE FORMED OVER AIR GAP

Patent #:	10062693	Issue Dt:	08/28/2018	Application #:	15051790	Filing Dt:	02/24/2016
Publication #:	US20170243867	Pub Dt:	08/24/2017
Title:	PATTERNED GATE DIELECTRICS FOR III-V-BASED CMOS CIRCUITS

Patent #:	9576901	Issue Dt:	02/21/2017	Application #:	15053106	Filing Dt:	02/25/2016
Title:	CONTACT AREA STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

Patent #:	9966253	Issue Dt:	05/08/2018	Application #:	15054005	Filing Dt:	02/25/2016
Publication #:	US20170250248	Pub Dt:	08/31/2017
Title:	FORMING NANOTIPS

Patent #:	9881919	Issue Dt:	01/30/2018	Application #:	15059516	Filing Dt:	03/03/2016
Publication #:	US20170256542	Pub Dt:	09/07/2017
Title:	WELL AND PUNCH THROUGH STOPPER FORMATION USING CONFORMAL DOPING

Patent #:	9614077	Issue Dt:	04/04/2017	Application #:	15060124	Filing Dt:	03/03/2016
Title:	VERTICAL FINFET WITH STRAINED CHANNEL

Patent #:	9735005	Issue Dt:	08/15/2017	Application #:	15067996	Filing Dt:	03/11/2016
Title:	ROBUST HIGH PERFORMANCE LOW HYDROGEN SILICON CARBON NITRIDE (SiCNH) DIELECTRICS FOR NANO ELECTRONIC DEVICES

Patent #:	10002789	Issue Dt:	06/19/2018	Application #:	15079368	Filing Dt:	03/24/2016
Publication #:	US20170278747	Pub Dt:	09/28/2017
Title:	HIGH PERFORMANCE MIDDLE OF LINE INTERCONNECTS

Patent #:	9685409	Issue Dt:	06/20/2017	Application #:	15082150	Filing Dt:	03/28/2016
Title:	TOP METAL CONTACT FOR VERTICAL TRANSISTOR STRUCTURES

Patent #:	10249501	Issue Dt:	04/02/2019	Application #:	15082646	Filing Dt:	03/28/2016
Publication #:	US20170278969	Pub Dt:	09/28/2017
Title:	SINGLE PROCESS FOR LINER AND METAL FILL

Patent #:	9653347	Issue Dt:	05/16/2017	Application #:	15086908	Filing Dt:	03/31/2016
Title:	VERTICAL AIR GAP SUBTRACTIVE ETCH BACK END METAL

Patent #:	9673307	Issue Dt:	06/06/2017	Application #:	15097548	Filing Dt:	04/13/2016
Title:	LATERAL BIPOLAR JUNCTION TRANSISTOR WITH ABRUPT JUNCTION AND COMPOUND BURIED OXIDE

Patent #:	9685366	Issue Dt:	06/20/2017	Application #:	15134534	Filing Dt:	04/21/2016
Title:	FORMING CHAMFERLESS VIAS USING THERMALLY DECOMPOSABLE POREFILLER

Patent #:	9721845	Issue Dt:	08/01/2017	Application #:	15138651	Filing Dt:	04/26/2016
Title:	VERTICAL FIELD EFFECT TRANSISTORS WITH BOTTOM CONTACT METAL DIRECTLY BENEATH FINS

Patent #:	10026615	Issue Dt:	07/17/2018	Application #:	15153226	Filing Dt:	05/12/2016
Publication #:	US20170330753	Pub Dt:	11/16/2017
Title:	FIN PATTERNS WITH VARYING SPACING WITHOUT FIN CUT

Patent #:	10256328	Issue Dt:	04/09/2019	Application #:	15157917	Filing Dt:	05/18/2016
Publication #:	US20170338322	Pub Dt:	11/23/2017
Title:	DUMMY DIELECTRIC FINS FOR FINFETS WITH SILICON AND SILICON GERMANIUM CHANNELS

Patent #:	9666486	Issue Dt:	05/30/2017	Application #:	15158196	Filing Dt:	05/18/2016
Title:	CONTAINED PUNCH THROUGH STOPPER FOR CMOS STRUCTURES ON A STRAIN RELAXED BUFFER SUBSTRATE

Patent #:	9589845	Issue Dt:	03/07/2017	Application #:	15161868	Filing Dt:	05/23/2016
Title:	FIN CUT ENABLING SINGLE DIFFUSION BREAKS

Patent #:	9728542	Issue Dt:	08/08/2017	Application #:	15164420	Filing Dt:	05/25/2016
Title:	HIGH DENSITY PROGRAMMABLE E-FUSE CO-INTEGRATED WITH VERTICAL FETS

Patent #:	10002923	Issue Dt:	06/19/2018	Application #:	15174334	Filing Dt:	06/06/2016
Publication #:	US20170352727	Pub Dt:	12/07/2017
Title:	Techniques for Forming FINFET Transistors with Same Fin Pitch and Different Source/Drain Epitaxy Configurations

Patent #:	9837351	Issue Dt:	12/05/2017	Application #:	15175555	Filing Dt:	06/07/2016
Publication #:	US20170352621	Pub Dt:	12/07/2017
Title:	AVOIDING GATE METAL VIA SHORTING TO SOURCE OR DRAIN CONTACTS

Patent #:	9773700	Issue Dt:	09/26/2017	Application #:	15176286	Filing Dt:	06/08/2016
Title:	ALIGNING CONDUCTIVE VIAS WITH TRENCHES

Patent #:	9872392	Issue Dt:	01/16/2018	Application #:	15176548	Filing Dt:	06/08/2016
Publication #:	US20170359898	Pub Dt:	12/14/2017
Title:	POWER DECOUPLING ATTACHMENT

Patent #:	10211064	Issue Dt:	02/19/2019	Application #:	15176982	Filing Dt:	06/08/2016
Publication #:	US20170358587	Pub Dt:	12/14/2017
Title:	MULTI TIME PROGRAMMABLE MEMORIES USING LOCAL IMPLANTATION IN HIGH-K/ METAL GATE TECHNOLOGIES

Patent #:	10083871	Issue Dt:	09/25/2018	Application #:	15177358	Filing Dt:	06/09/2016
Publication #:	US20170358497	Pub Dt:	12/14/2017
Title:	FABRICATION OF A VERTICAL TRANSISTOR WITH SELF-ALIGNED BOTTOM SOURCE/DRAIN

Patent #:	9875959	Issue Dt:	01/23/2018	Application #:	15178245	Filing Dt:	06/09/2016
Publication #:	US20170358529	Pub Dt:	12/14/2017
Title:	FORMING A STACKED CAPACITOR

Patent #:	9570574	Issue Dt:	02/14/2017	Application #:	15180171	Filing Dt:	06/13/2016
Title:	RECESSED METAL LINER CONTACT WITH COPPER FILL

Patent #:	10032885	Issue Dt:	07/24/2018	Application #:	15180499	Filing Dt:	06/13/2016
Publication #:	US20170179254	Pub Dt:	06/22/2017
Title:	CHANNEL REPLACEMENT AND BIMODAL DOPING SCHEME FOR BULK FINFET THRESHOLD VOLTAGE MODULATION WITH REDUCED PERFORMANCE PENALTY

Patent #:	9806615	Issue Dt:	10/31/2017	Application #:	15185807	Filing Dt:	06/17/2016
Title:	On-Chip DC-DC Power Converters with Fully Integrated GaN Power Switches, Silicon CMOS Transistors and Magnetic Inductors

Patent #:	9768075	Issue Dt:	09/19/2017	Application #:	15187152	Filing Dt:	06/20/2016
Title:	METHOD AND STRUCTURE TO ENABLE DUAL CHANNEL FIN CRITICAL DIMENSION CONTROL

Patent #:	9842770	Issue Dt:	12/12/2017	Application #:	15189749	Filing Dt:	06/22/2016
Publication #:	US20170372954	Pub Dt:	12/28/2017
Title:	REFLOW ENHANCEMENT LAYER FOR METALLIZATION STRUCTURES

Patent #:	9859174	Issue Dt:	01/02/2018	Application #:	15191828	Filing Dt:	06/24/2016
Publication #:	US20170372973	Pub Dt:	12/28/2017
Title:	SIDEWALL IMAGE TRANSFER STRUCTURES

Patent #:	9799519	Issue Dt:	10/24/2017	Application #:	15192196	Filing Dt:	06/24/2016
Title:	SELECTIVE SPUTTERING WITH LIGHT MASS IONS TO SHARPEN SIDEWALL OF SUBTRACTIVELY PATTERNED CONDUCTIVE METAL LAYER

Patent #:	9916986	Issue Dt:	03/13/2018	Application #:	15193759	Filing Dt:	06/27/2016
Publication #:	US20170372909	Pub Dt:	12/28/2017
Title:	SINGLE OR MUTLI BLOCK MASK MANAGEMENT FOR SPACER HEIGHT AND DEFECT REDUCTION FOR BEOL

Patent #:	10157745	Issue Dt:	12/18/2018	Application #:	15196299	Filing Dt:	06/29/2016
Publication #:	US20180005833	Pub Dt:	01/04/2018
Title:	HIGH ASPECT RATIO GATES

Patent #:	9985107	Issue Dt:	05/29/2018	Application #:	15196591	Filing Dt:	06/29/2016
Publication #:	US20180006128	Pub Dt:	01/04/2018
Title:	METHOD AND STRUCTURE FOR FORMING MOSFET WITH REDUCED PARASITIC CAPACITANCE

Patent #:	10236214	Issue Dt:	03/19/2019	Application #:	15196774	Filing Dt:	06/29/2016
Publication #:	US20180005895	Pub Dt:	01/04/2018
Title:	VERTICAL TRANSISTOR WITH VARIABLE GATE LENGTH

Patent #:	10141232	Issue Dt:	11/27/2018	Application #:	15198128	Filing Dt:	06/30/2016
Publication #:	US20180005904	Pub Dt:	01/04/2018
Title:	VERTICAL CMOS DEVICES WITH COMMON GATE STACKS

Patent #:	9793160	Issue Dt:	10/17/2017	Application #:	15201490	Filing Dt:	07/03/2016
Title:	AGGRESSIVE TIP-TO-TIP SCALING USING SUBTRACTIVE INTEGRATON

Patent #:	9837305	Issue Dt:	12/05/2017	Application #:	15202475	Filing Dt:	07/05/2016
Title:	FORMING DEEP AIRGAPS WITHOUT FLOP OVER

Patent #:	9748173	Issue Dt:	08/29/2017	Application #:	15202656	Filing Dt:	07/06/2016
Title:	HYBRID INTERCONNECTS AND METHOD OF FORMING THE SAME

Patent #:	9761484	Issue Dt:	09/12/2017	Application #:	15218322	Filing Dt:	07/25/2016
Title:	INTERCONNECT STRUCTURE AND FABRICATION THEREOF

Patent #:	10032711	Issue Dt:	07/24/2018	Application #:	15218445	Filing Dt:	07/25/2016
Publication #:	US20180025974	Pub Dt:	01/25/2018
Title:	INTEGRATING METAL-INSULATOR-METAL CAPACITORS WITH AIR GAP PROCESS FLOW

Patent #:	10229917	Issue Dt:	03/12/2019	Application #:	15223092	Filing Dt:	07/29/2016
Publication #:	US20180033793	Pub Dt:	02/01/2018
Title:	THIN SRAM CELL HAVING VERTICAL TRANSISTORS

Patent #:	9875966	Issue Dt:	01/23/2018	Application #:	15225003	Filing Dt:	08/01/2016
Publication #:	US20180033690	Pub Dt:	02/01/2018
Title:	METHOD AND STRUCTURE OF FORMING LOW RESISTANCE INTERCONNECTS

Patent #:	9793398	Issue Dt:	10/17/2017	Application #:	15226834	Filing Dt:	08/02/2016
Title:	FABRICATION OF A STRAINED REGION ON A SUBSTRATE

Patent #:	9831151	Issue Dt:	11/28/2017	Application #:	15226971	Filing Dt:	08/03/2016
Title:	HEAT SINK FOR SEMICONDUCTOR MODULES

Patent #:	9947621	Issue Dt:	04/17/2018	Application #:	15229783	Filing Dt:	08/05/2016
Publication #:	US20180040507	Pub Dt:	02/08/2018
Title:	STRUCTURE AND METHOD TO REDUCE COPPER LOSS DURING METAL CAP FORMATION

Patent #:	9972540	Issue Dt:	05/15/2018	Application #:	15230443	Filing Dt:	08/07/2016
Publication #:	US20180040515	Pub Dt:	02/08/2018
Title:	SEMICONDUCTOR DEVICE HAVING MULTIPLE THICKNESS OXIDES

Patent #:	10038076	Issue Dt:	07/31/2018	Application #:	15230871	Filing Dt:	08/08/2016
Publication #:	US20180040719	Pub Dt:	02/08/2018
Title:	PARASITIC CAPACITANCE REDUCING CONTACT STRUCTURE IN A FINFET

Patent #:	9852938	Issue Dt:	12/26/2017	Application #:	15231087	Filing Dt:	08/08/2016
Title:	PASSIVATED GERMANIUM-ON-INSULATOR LATERAL BIPOLAR TRANSISTORS

Patent #:	9947548	Issue Dt:	04/17/2018	Application #:	15231979	Filing Dt:	08/09/2016
Publication #:	US20180047575	Pub Dt:	02/15/2018
Title:	SELF-ALIGNED SINGLE DUMMY FIN CUT WITH TIGHT PITCH

Patent #:	9761608	Issue Dt:	09/12/2017	Application #:	15236547	Filing Dt:	08/15/2016
Title:	LATERAL BIPOLAR JUNCTION TRANSISTOR WITH MULTIPLE BASE LENGTHS

Patent #:	9911656	Issue Dt:	03/06/2018	Application #:	15241858	Filing Dt:	08/19/2016
Publication #:	US20180053691	Pub Dt:	02/22/2018
Title:	WIMPY DEVICE BY SELECTIVE LASER ANNEALING

Patent #:	9768104	Issue Dt:	09/19/2017	Application #:	15242045	Filing Dt:	08/19/2016
Title:	METHOD AND STRUCTURE TO FABRICATE A NANOPOROUS MEMBRANE

Patent #:	9941118	Issue Dt:	04/10/2018	Application #:	15243052	Filing Dt:	08/22/2016
Publication #:	US20180053651	Pub Dt:	02/22/2018
Title:	DENSE VERTICAL NANOSHEET

Patent #:	9929091	Issue Dt:	03/27/2018	Application #:	15246797	Filing Dt:	08/25/2016
Publication #:	US20180061757	Pub Dt:	03/01/2018
Title:	VERTICAL FUSE STRUCTURES

Patent #:	9953864	Issue Dt:	04/24/2018	Application #:	15251403	Filing Dt:	08/30/2016
Publication #:	US20180061702	Pub Dt:	03/01/2018
Title:	INTERCONNECT STRUCTURE

Patent #:	10049974	Issue Dt:	08/14/2018	Application #:	15251450	Filing Dt:	08/30/2016
Publication #:	US20180061750	Pub Dt:	03/01/2018
Title:	METAL SILICATE SPACERS FOR FULLY ALIGNED VIAS

Patent #:	9685535	Issue Dt:	06/20/2017	Application #:	15260441	Filing Dt:	09/09/2016
Title:	CONDUCTIVE CONTACTS IN SEMICONDUCTOR ON INSULATOR SUBSTRATE

Patent #:	10002762	Issue Dt:	06/19/2018	Application #:	15261291	Filing Dt:	09/09/2016
Publication #:	US20180076033	Pub Dt:	03/15/2018
Title:	MULTI-ANGLED DEPOSITION AND MASKING FOR CUSTOM SPACER TRIM AND SELECTED SPACER REMOVAL

Patent #:	9748281	Issue Dt:	08/29/2017	Application #:	15266414	Filing Dt:	09/15/2016
Title:	INTEGRATED GATE DRIVER

Patent #:	10032793	Issue Dt:	07/24/2018	Application #:	15267646	Filing Dt:	09/16/2016
Publication #:	US20180083045	Pub Dt:	03/22/2018
Title:	ASYMMETRIC JUNCTION ENGINEERING FOR NARROW BAND GAP MOSFET

Patent #:	9859218	Issue Dt:	01/02/2018	Application #:	15268787	Filing Dt:	09/19/2016
Title:	SELECTIVE SURFACE MODIFICATION OF INTERCONNECT STRUCTURES

Patent #:	9627271	Issue Dt:	04/18/2017	Application #:	15271464	Filing Dt:	09/21/2016
Title:	III-V COMPOUND SEMICONDUCTOR CHANNEL MATERIAL FORMATION ON MANDREL AFTER MIDDLE-OF-THE-LINE DIELECTRIC FORMATION

Patent #:	9922941	Issue Dt:	03/20/2018	Application #:	15271939	Filing Dt:	09/21/2016
Publication #:	US20180082958	Pub Dt:	03/22/2018
Title:	THIN LOW DEFECT RELAXED SILICON GERMANIUM LAYERS ON BULK SILICON SUBSTRATES

Patent #:	9704754	Issue Dt:	07/11/2017	Application #:	15272811	Filing Dt:	09/22/2016
Title:	SELF-ALIGNED SPACER FOR CUT-LAST TRANSISTOR FABRICATION

Patent #:	9805989	Issue Dt:	10/31/2017	Application #:	15272977	Filing Dt:	09/22/2016
Title:	SACRIFICIAL CAP FOR FORMING SEMICONDUCTOR CONTACT

Patent #:	9704856	Issue Dt:	07/11/2017	Application #:	15274621	Filing Dt:	09/23/2016
Title:	ON-CHIP MIM CAPACITOR

Patent #:	9741822	Issue Dt:	08/22/2017	Application #:	15275565	Filing Dt:	09/26/2016
Title:	SIMPLIFIED GATE STACK PROCESS TO IMPROVE DUAL CHANNEL CMOS PERFORMANCE

Patent #:	9704965	Issue Dt:	07/11/2017	Application #:	15277291	Filing Dt:	09/27/2016
Title:	SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CARBON NANOTUBE GATE

Patent #:	9754798	Issue Dt:	09/05/2017	Application #:	15278747	Filing Dt:	09/28/2016
Title:	HYBRIDIZATION FIN REVEAL FOR UNIFORM FIN REVEAL DEPTH ACROSS DIFFERENT FIN PITCHES

Patent #:	9793206	Issue Dt:	10/17/2017	Application #:	15280518	Filing Dt:	09/29/2016
Title:	HETEROGENEOUS METALLIZATION USING SOLID DIFFUSION REMOVAL OF METAL INTERCONNECTS

Patent #:	9691659	Issue Dt:	06/27/2017	Application #:	15282012	Filing Dt:	09/30/2016
Title:	VIA AND CHAMFER CONTROL FOR ADVANCED INTERCONNECTS

Patent #:	9679967	Issue Dt:	06/13/2017	Application #:	15282152	Filing Dt:	09/30/2016
Title:	CONTACT RESISTANCE REDUCTION BY III-V GA DEFICIENT SURFACE

Patent #:	9824934	Issue Dt:	11/21/2017	Application #:	15282378	Filing Dt:	09/30/2016
Title:	SHALLOW TRENCH ISOLATION RECESS PROCESS FLOW FOR VERTICAL FIELD EFFECT TRANSISTOR FABRICATION

Patent #:	9741717	Issue Dt:	08/22/2017	Application #:	15289374	Filing Dt:	10/10/2016
Title:	FINFETS WITH CONTROLLABLE AND ADJUSTABLE CHANNEL DOPING

Patent #:	10446490	Issue Dt:	10/15/2019	Application #:	15292789	Filing Dt:	10/13/2016
Publication #:	US20170194256	Pub Dt:	07/06/2017
Title:	JUNCTIONLESS BACK END OF THE LINE VIA CONTACT

Patent #:	9735258	Issue Dt:	08/15/2017	Application #:	15293572	Filing Dt:	10/14/2016
Publication #:	US20170179251	Pub Dt:	06/22/2017
Title:	NANOWIRE SEMICONDUCTOR DEVICE

Patent #:	9947664	Issue Dt:	04/17/2018	Application #:	15294467	Filing Dt:	10/14/2016
Publication #:	US20180108659	Pub Dt:	04/19/2018
Title:	SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SEMICONDUCTOR DEVICE

Patent #:	10164103	Issue Dt:	12/25/2018	Application #:	15294986	Filing Dt:	10/17/2016
Publication #:	US20180108769	Pub Dt:	04/19/2018
Title:	FORMING STRAINED CHANNEL WITH GERMANIUM CONDENSATION

Patent #:	9741626	Issue Dt:	08/22/2017	Application #:	15298966	Filing Dt:	10/20/2016
Title:	VERTICAL TRANSISTOR WITH UNIFORM BOTTOM SPACER FORMED BY SELECTIVE OXIDATION

Patent #:	9881833	Issue Dt:	01/30/2018	Application #:	15334796	Filing Dt:	10/26/2016
Title:	BARRIER PLANARIZATION FOR INTERCONNECT METALLIZATION

Patent #:	9659818	Issue Dt:	05/23/2017	Application #:	15336859	Filing Dt:	10/28/2016
Title:	FORMING SELF-ALIGNED DUAL PATTERNING MANDREL AND NON-MANDREL INTERCONNECTS

Patent #:	9899372	Issue Dt:	02/20/2018	Application #:	15339164	Filing Dt:	10/31/2016
Title:	FORMING ON-CHIP METAL-INSULATOR-SEMICONDUCTOR CAPACITOR

100

Patent #:	9704991	Issue Dt:	07/11/2017	Application #:	15339402	Filing Dt:	10/31/2016
Title:	GATE HEIGHT AND SPACER UNIFORMITY

Assignor

INTERNATIONAL BUSINESS MACHINES CORPORATION

Exec Dt:

03/06/2020

Assignee

ELPIS TECHNOLOGIES INC.

1891 ROBERTSON ROAD

SUITE 100

OTTAWA, CANADA K2H 5B7

Correspondence name and address
	ELPIS TECHNOLOGIES INC.
	1891 ROBERSTON ROAD
	SUITE 100
	OTTAWA, K2H 5B7 CANADA

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