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Reel/Frame:064809/0877   Pages: 13
Recorded: 09/05/2023
Attorney Dkt #:392739-00007
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE. " TO STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0391. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Total properties: 80
1
Patent #:
9245834
Issue Dt:
01/26/2016
Application #:
13422981
Filing Dt:
03/16/2012
Publication #:
US20130241071
Pub Dt:
09/19/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPLIANT CONDUCTIVE INTERCONNECT STRUCTURE IN FLIPCHIP PACKAGE
2
Patent #:
NONE
Issue Dt:
Application #:
13424710
Filing Dt:
03/20/2012
Publication #:
US20130249076
Pub Dt:
09/26/2013
Title:
Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces
3
Patent #:
8901755
Issue Dt:
12/02/2014
Application #:
13425349
Filing Dt:
03/20/2012
Publication #:
US20130249104
Pub Dt:
09/26/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE LAYER OVER METAL SUBSTRATE FOR ELECTRICAL INTERCONNECT OF SEMICONDUCTOR DIE
4
Patent #:
8936969
Issue Dt:
01/20/2015
Application #:
13426416
Filing Dt:
03/21/2012
Publication #:
US20130249079
Pub Dt:
09/26/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF SINGULATING SEMICONDUCTOR WAFER ALONG MODIFIED REGION WITHIN NON-ACTIVE REGION FORMED BY IRRADIATING ENERGY THROUGH MOUNTING TAPE
5
Patent #:
8791008
Issue Dt:
07/29/2014
Application #:
13426552
Filing Dt:
03/21/2012
Publication #:
US20130249105
Pub Dt:
09/26/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MICRO-VIAS PARTIALLY THROUGH INSULATING MATERIAL OVER BUMP INTERCONNECT CONDUCTIVE LAYER FOR STRESS RELIEF
6
Patent #:
8900929
Issue Dt:
12/02/2014
Application #:
13426561
Filing Dt:
03/21/2012
Publication #:
US20130249080
Pub Dt:
09/26/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING OPENINGS AND TRENCHES IN INSULATING LAYER BY FIRST LDA AND SECOND LDA FOR RDL FORMATION
7
Patent #:
8921127
Issue Dt:
12/30/2014
Application #:
13426576
Filing Dt:
03/21/2012
Publication #:
US20130248859
Pub Dt:
09/26/2013
Title:
Semiconductor Device and Method of Simultaneous Testing of Multiple Interconnects for Electro-Migration
8
Patent #:
9082780
Issue Dt:
07/14/2015
Application #:
13428439
Filing Dt:
03/23/2012
Publication #:
US20130249106
Pub Dt:
09/26/2013
Title:
Semiconductor Device and Method of Forming a Robust Fan-Out Package including Vertical Interconnects and Mechanical Support Layer
9
Patent #:
8810024
Issue Dt:
08/19/2014
Application #:
13429119
Filing Dt:
03/23/2012
Publication #:
US20130249115
Pub Dt:
09/26/2013
Title:
SEMICONDUCTOR METHOD AND DEVICE OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
10
Patent #:
9390945
Issue Dt:
07/12/2016
Application #:
13466945
Filing Dt:
05/08/2012
Publication #:
US20130299995
Pub Dt:
11/14/2013
Title:
Semiconductor Device and Method of Depositing Underfill Material With Uniform Flow Rate
11
Patent #:
9406579
Issue Dt:
08/02/2016
Application #:
13471314
Filing Dt:
05/14/2012
Publication #:
US20130300004
Pub Dt:
11/14/2013
Title:
Semiconductor Device and Method of Controlling Warpage in Semiconductor Package
12
Patent #:
NONE
Issue Dt:
Application #:
13477982
Filing Dt:
05/22/2012
Publication #:
US20130249101
Pub Dt:
09/26/2013
Title:
Semiconductor Method and Device of Forming a Fan-Out PoP Device with PWB Vertical Interconnect Units
13
Patent #:
9401289
Issue Dt:
07/26/2016
Application #:
13488029
Filing Dt:
06/04/2012
Publication #:
US20130320519
Pub Dt:
12/05/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF BACKGRINDING AND SINGULATION OF SEMICONDUCTOR WAFER WHILE REDUCING KERF SHIFTING AND PROTECTING WAFER SURFACES
14
Patent #:
9230896
Issue Dt:
01/05/2016
Application #:
13489143
Filing Dt:
06/05/2012
Publication #:
US20130320523
Pub Dt:
12/05/2013
Title:
Semiconductor Device and Method of Reflow Soldering for Conductive Column Structure in Flip Chip Package
15
Patent #:
9385006
Issue Dt:
07/05/2016
Application #:
13529918
Filing Dt:
06/21/2012
Publication #:
US20130341784
Pub Dt:
12/26/2013
Title:
Semiconductor Device and Method of Forming an Embedded SOP Fan-Out Package
16
Patent #:
9385102
Issue Dt:
07/05/2016
Application #:
13630912
Filing Dt:
09/28/2012
Publication #:
US20140091454
Pub Dt:
04/03/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SUPPORTING LAYER OVER SEMICONDUCTOR DIE IN THIN FAN-OUT WAFER LEVEL CHIP SCALE PACKAGE
17
Patent #:
9331007
Issue Dt:
05/03/2016
Application #:
13653242
Filing Dt:
10/16/2012
Publication #:
US20140103509
Pub Dt:
04/17/2014
Title:
Semiconductor Device and Method of Forming Conductive Ink Layer as Interconnect Structure Between Semiconductor Packages
18
Patent #:
8791556
Issue Dt:
07/29/2014
Application #:
13791375
Filing Dt:
03/08/2013
Publication #:
US20130256861
Pub Dt:
10/03/2013
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE CIRCUITRY AND METHOD OF MANUFACTURE THEREOF
19
Patent #:
9305854
Issue Dt:
04/05/2016
Application #:
13795679
Filing Dt:
03/12/2013
Publication #:
US20140054802
Pub Dt:
02/27/2014
Title:
Semiconductor Device and Method of Forming RDL Using UV-Cured Conductive Ink Over Wafer Level Package
20
Patent #:
9559039
Issue Dt:
01/31/2017
Application #:
13800807
Filing Dt:
03/13/2013
Publication #:
US20140077389
Pub Dt:
03/20/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF USING SUBSTRATE HAVING BASE AND CONDUCTIVE POSTS TO FORM VERTICAL INTERCONNECT STRUCTURE IN EMBEDDED DIE PACKAGE
21
Patent #:
9385052
Issue Dt:
07/05/2016
Application #:
13832118
Filing Dt:
03/15/2013
Publication #:
US20140077361
Pub Dt:
03/20/2014
Title:
Semiconductor Device and Method of Forming Build-Up Interconnect Structures Over Carrier for Testing at Interim Stages
22
Patent #:
10192796
Issue Dt:
01/29/2019
Application #:
13832205
Filing Dt:
03/15/2013
Publication #:
US20140077362
Pub Dt:
03/20/2014
Title:
Semiconductor Device and Method of Forming Dual-Sided Interconnect Structures in FO-WLCSP
23
Patent #:
9978654
Issue Dt:
05/22/2018
Application #:
13832449
Filing Dt:
03/15/2013
Publication #:
US20140077363
Pub Dt:
03/20/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING DUAL-SIDED INTERCONNECT STRUCTURES IN FO-WLCSP
24
Patent #:
9443797
Issue Dt:
09/13/2016
Application #:
13832781
Filing Dt:
03/15/2013
Publication #:
US20140077364
Pub Dt:
03/20/2014
Title:
Semiconductor Device having Wire Studs as Vertical Interconnect in FO-WLP
25
Patent #:
9496195
Issue Dt:
11/15/2016
Application #:
13832809
Filing Dt:
03/15/2013
Publication #:
US20140091482
Pub Dt:
04/03/2014
Title:
Semiconductor Device and Method of Depositing Encapsulant Along Sides and Surface Edge of Semiconductor Die in Embedded WLCSP
26
Patent #:
9378983
Issue Dt:
06/28/2016
Application #:
13871157
Filing Dt:
04/26/2013
Publication #:
US20130241039
Pub Dt:
09/19/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING COVER TO SEMICONDUCTOR DIE AND INTERPOSER WITH ADHESIVE MATERIAL
27
Patent #:
9875973
Issue Dt:
01/23/2018
Application #:
13874150
Filing Dt:
04/30/2013
Publication #:
US20130241048
Pub Dt:
09/19/2013
Title:
Semiconductor Device and Method for Forming Semiconductor Package Having Build-Up Interconnect Structure Over Semiconductor Die with Different CTE Insulating Layers
28
Patent #:
9449932
Issue Dt:
09/20/2016
Application #:
13886556
Filing Dt:
05/03/2013
Publication #:
US20130241030
Pub Dt:
09/19/2013
Title:
Semiconductor Device and Method of Forming Base Substrate with Recesses for Capturing Bumped Semiconductor Die
29
Patent #:
8994184
Issue Dt:
03/31/2015
Application #:
13887180
Filing Dt:
05/03/2013
Publication #:
US20130241080
Pub Dt:
09/19/2013
Title:
Semiconductor Device and Method of Forming Interposer and Opposing Build-Up Interconnect Structure with Connecting Conductive TMV for Electrical Interconnect of FO-WLCSP
30
Patent #:
8962476
Issue Dt:
02/24/2015
Application #:
13893616
Filing Dt:
05/14/2013
Publication #:
US20130249111
Pub Dt:
09/26/2013
Title:
METHOD OF FORMING RDL WIDER THAN CONTACT PAD ALONG FIRST AXIS AND NARROWER THAN CONTACT PAD ALONG SECOND
31
Patent #:
8932908
Issue Dt:
01/13/2015
Application #:
13896635
Filing Dt:
05/17/2013
Publication #:
US20130249090
Pub Dt:
09/26/2013
Title:
Semiconductor Device and Method of Forming Partially-Etched Conductive Layer Recessed Within Substrate for Bonding to Semiconductor Die
32
Patent #:
8741766
Issue Dt:
06/03/2014
Application #:
13905845
Filing Dt:
05/30/2013
Publication #:
US20130264704
Pub Dt:
10/10/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL DURING REFLOW WITH SOLDER MASK PATCH
33
Patent #:
NONE
Issue Dt:
Application #:
13906060
Filing Dt:
05/30/2013
Publication #:
US20130256923
Pub Dt:
10/03/2013
Title:
Semiconductor Device and Method of Forming Reconstituted Wafer With Larger Carrier to Achieve More EWLB Packages Per Wafer with Encapsulant Deposited Under Temperature and Pressure
34
Patent #:
NONE
Issue Dt:
Application #:
13906489
Filing Dt:
05/31/2013
Publication #:
US20130256840
Pub Dt:
10/03/2013
Title:
Semiconductor Device and Method of Forming Protective Coating Material Over Semiconductor Wafer to Reduce Lamination Tape Residue
35
Patent #:
9257357
Issue Dt:
02/09/2016
Application #:
13906667
Filing Dt:
05/31/2013
Publication #:
US20130256866
Pub Dt:
10/03/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED HEAT SPREADER FRAME WITH EMBEDDED SEMICONDUCTOR DIE
36
Patent #:
8884339
Issue Dt:
11/11/2014
Application #:
13906844
Filing Dt:
05/31/2013
Publication #:
US20130264705
Pub Dt:
10/10/2013
Title:
SEMICONDUCTOR DEVICE WITH BUMP FORMED ON SUBSTRATE TO PREVENT ELK ILD DELAMINATION DURING REFLOW PROCESS
37
Patent #:
9171797
Issue Dt:
10/27/2015
Application #:
13910786
Filing Dt:
06/05/2013
Publication #:
US20130264716
Pub Dt:
10/10/2013
Title:
SYSTEM-IN-PACKAGE HAVING INTEGRATED PASSIVE DEVICES AND METHOD THEREFOR
38
Patent #:
9837303
Issue Dt:
12/05/2017
Application #:
13917982
Filing Dt:
06/14/2013
Publication #:
US20130277851
Pub Dt:
10/24/2013
Title:
Semiconductor Method and Device of Forming a Fan-Out Device with PWB Vertical Interconnect Units
39
Patent #:
9443762
Issue Dt:
09/13/2016
Application #:
13933406
Filing Dt:
07/02/2013
Publication #:
US20130285236
Pub Dt:
10/31/2013
Title:
Semiconductor Device and Method of Forming a Thin Wafer Without a Carrier
40
Patent #:
9385074
Issue Dt:
07/05/2016
Application #:
13935053
Filing Dt:
07/03/2013
Publication #:
US20130292829
Pub Dt:
11/07/2013
Title:
SEMICONDUCTOR PACKAGE WITH EMBEDDED DIE
41
Patent #:
8937371
Issue Dt:
01/20/2015
Application #:
13935312
Filing Dt:
07/03/2013
Publication #:
US20130292804
Pub Dt:
11/07/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE DISPOSED IN A CAVITY OF AN INTERCONNECT STRUCTURE AND GROUNDED THROUGH THE DIE TSV
42
Patent #:
8823182
Issue Dt:
09/02/2014
Application #:
13935963
Filing Dt:
07/05/2013
Publication #:
US20130292850
Pub Dt:
11/07/2013
Title:
Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant
43
Patent #:
9754858
Issue Dt:
09/05/2017
Application #:
13936099
Filing Dt:
07/05/2013
Publication #:
US20130292851
Pub Dt:
11/07/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING TSV SEMICONDUCTOR WAFER WITH EMBEDDED SEMICONDUCTOR DIE
44
Patent #:
9431331
Issue Dt:
08/30/2016
Application #:
13937849
Filing Dt:
07/09/2013
Publication #:
US20130299971
Pub Dt:
11/14/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PENETRABLE FILM ENCAPSULANT AROUND SEMICONDUCTOR DIE AND INTERCONNECT STRUCTURE
45
Patent #:
10916482
Issue Dt:
02/09/2021
Application #:
13937952
Filing Dt:
07/09/2013
Publication #:
US20130292673
Pub Dt:
11/07/2013
Title:
Semiconductor Device and Method of Forming Reconstituted Wafer with Larger Carrier to Achieve More EWLB Packages per Wafer with Encapsulant Deposited Under Temperature and Pressure
46
Patent #:
9257382
Issue Dt:
02/09/2016
Application #:
13939044
Filing Dt:
07/10/2013
Publication #:
US20130299998
Pub Dt:
11/14/2013
Title:
Semiconductor Device and Method of Forming Guard Ring Around Conductive TSV Through Semiconductor Wafer
47
Patent #:
9153494
Issue Dt:
10/06/2015
Application #:
13943735
Filing Dt:
07/16/2013
Publication #:
US20130299973
Pub Dt:
11/14/2013
Title:
Semiconductor Die and Method of Forming FO-WLCSP Vertical Interconnect Using TSV and TMV
48
Patent #:
9263332
Issue Dt:
02/16/2016
Application #:
13943737
Filing Dt:
07/16/2013
Publication #:
US20130299974
Pub Dt:
11/14/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
49
Patent #:
9331002
Issue Dt:
05/03/2016
Application #:
13944783
Filing Dt:
07/17/2013
Publication #:
US20130299975
Pub Dt:
11/14/2013
Title:
Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material
50
Patent #:
NONE
Issue Dt:
Application #:
13944825
Filing Dt:
07/17/2013
Publication #:
US20130299982
Pub Dt:
11/14/2013
Title:
Semiconductor Device and Method of Forming Interposer with Opening to Contain Semiconductor Die
51
Patent #:
9589876
Issue Dt:
03/07/2017
Application #:
14011491
Filing Dt:
08/27/2013
Publication #:
US20130341789
Pub Dt:
12/26/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A WAFER LEVEL PACKAGE WITH TOP AND BOTTOM SOLDER BUMP INTERCONNECTION
52
Patent #:
9048211
Issue Dt:
06/02/2015
Application #:
14017963
Filing Dt:
09/04/2013
Publication #:
US20140001627
Pub Dt:
01/02/2014
Title:
Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation
53
Patent #:
8975980
Issue Dt:
03/10/2015
Application #:
14018282
Filing Dt:
09/04/2013
Publication #:
US20140002207
Pub Dt:
01/02/2014
Title:
SEMICONDUCTOR DEVICE HAVING BALANCED BAND-PASS FILTER IMPLEMENTED WITH LC RESONATORS
54
Patent #:
8785251
Issue Dt:
07/22/2014
Application #:
14020996
Filing Dt:
09/09/2013
Publication #:
US20140004659
Pub Dt:
01/02/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
55
Patent #:
8890315
Issue Dt:
11/18/2014
Application #:
14021056
Filing Dt:
09/09/2013
Publication #:
US20140008791
Pub Dt:
01/09/2014
Title:
Semiconductor Device and Method of Forming Interconnect Structure Over Seed Layer on Contact Pad of Semiconductor Die Without Undercutting Seed Layer Beneath Interconnect Structure
56
Patent #:
9679881
Issue Dt:
06/13/2017
Application #:
14021206
Filing Dt:
09/09/2013
Publication #:
US20140008769
Pub Dt:
01/09/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CAVITY ADJACENT TO SENSITIVE REGION OF SEMICONDUCTOR DIE USING WAFER-LEVEL UNDERFILL MATERIAL
57
Patent #:
9397236
Issue Dt:
07/19/2016
Application #:
14021208
Filing Dt:
09/09/2013
Publication #:
US20140011315
Pub Dt:
01/09/2014
Title:
Optical Semiconductor Device Having Pre-Molded Leadframe with Window and Method Therefor
58
Patent #:
NONE
Issue Dt:
Application #:
14021740
Filing Dt:
09/09/2013
Publication #:
US20140008783
Pub Dt:
01/09/2014
Title:
Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape
59
Patent #:
9064858
Issue Dt:
06/23/2015
Application #:
14021914
Filing Dt:
09/09/2013
Publication #:
US20140008792
Pub Dt:
01/09/2014
Title:
Semiconductor Device and Method of Forming Bump-on-Lead Interconnection
60
Patent #:
9704780
Issue Dt:
07/11/2017
Application #:
14038575
Filing Dt:
09/26/2013
Publication #:
US20140159251
Pub Dt:
06/12/2014
Title:
Semiconductor Device and Method of Forming Low Profile Fan-Out Package with Vertical Interconnection Units
61
Patent #:
8994185
Issue Dt:
03/31/2015
Application #:
14043751
Filing Dt:
10/01/2013
Publication #:
US20140027929
Pub Dt:
01/30/2014
Title:
Semiconductor Device and Method of Forming Vertical Interconnect Structure with Conductive Micro Via Array for 3-D FO-WLCSP
62
Patent #:
10049964
Issue Dt:
08/14/2018
Application #:
14061244
Filing Dt:
10/23/2013
Publication #:
US20140048906
Pub Dt:
02/20/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-OUT POP DEVICE WITH PWB VERTICAL INTERCONNECT UNITS
63
Patent #:
9076803
Issue Dt:
07/07/2015
Application #:
14063274
Filing Dt:
10/25/2013
Publication #:
US20140048932
Pub Dt:
02/20/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF DUAL-MOLDING DIE FORMED ON OPPOSITE SIDES OF BUILD-UP INTERCONNECT STRUCTURE
64
Patent #:
9281259
Issue Dt:
03/08/2016
Application #:
14079273
Filing Dt:
11/13/2013
Publication #:
US20140061944
Pub Dt:
03/06/2014
Title:
Semiconductor Device and Method of Forming Thick Encapsulant for Stiffness with Recesses for Stress Relief in FO-WLCSP
65
Patent #:
9142428
Issue Dt:
09/22/2015
Application #:
14080609
Filing Dt:
11/14/2013
Publication #:
US20140077381
Pub Dt:
03/20/2014
Title:
Semiconductor Device and Method of Forming FO-WLCSP with Multiple Encapsulants
66
Patent #:
NONE
Issue Dt:
Application #:
14082155
Filing Dt:
11/17/2013
Publication #:
US20140070427
Pub Dt:
03/13/2014
Title:
Semiconductor Device and Method of Forming Conductive THV and RDL on Opposite Sides of Semiconductor Die for RDL-to-RDL Bonding
67
Patent #:
9252093
Issue Dt:
02/02/2016
Application #:
14084745
Filing Dt:
11/20/2013
Publication #:
US20140070410
Pub Dt:
03/13/2014
Title:
Semiconductor Device and Method of Forming Multi-Layered UBM with Intermediate Insulating Buffer Layer to Reduce Stress for Semiconductor Wafer
68
Patent #:
9142515
Issue Dt:
09/22/2015
Application #:
14087653
Filing Dt:
11/22/2013
Publication #:
US20140077344
Pub Dt:
03/20/2014
Title:
Semiconductor Device with Protective Layer Over Exposed Surfaces of Semiconductor Die
69
Patent #:
10163815
Issue Dt:
12/25/2018
Application #:
14090036
Filing Dt:
11/26/2013
Publication #:
US20140084424
Pub Dt:
03/27/2014
Title:
SEMICONDUCTOR DEVICE WITH DUMMY METAL PROTECTIVE STRUCTURE AROUND SEMICONDUCTOR DIE FOR LOCALIZED PLANARIZATION OF INSULATING LAYER
70
Patent #:
9368563
Issue Dt:
06/14/2016
Application #:
14092304
Filing Dt:
11/27/2013
Publication #:
US20140084415
Pub Dt:
03/27/2014
Title:
SEMICONDUCTOR DEVICE INCLUDING INTEGRATED PASSIVE DEVICE FORMED OVER SEMICONDUCTOR DIE WITH CONDUCTIVE BRIDGE AND FAN-OUT REDISTRIBUTION LAYER
71
Patent #:
9620413
Issue Dt:
04/11/2017
Application #:
14097534
Filing Dt:
12/05/2013
Publication #:
US20140091455
Pub Dt:
04/03/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF USING A STANDARDIZED CARRIER IN SEMICONDUCTOR PACKAGING
72
Patent #:
9842798
Issue Dt:
12/12/2017
Application #:
14135415
Filing Dt:
12/19/2013
Publication #:
US20140103527
Pub Dt:
04/17/2014
Title:
Semiconductor Device and Method of Forming a POP Device with Embedded Vertical Interconnect Units
73
Patent #:
9117812
Issue Dt:
08/25/2015
Application #:
14138382
Filing Dt:
12/23/2013
Publication #:
US20140103503
Pub Dt:
04/17/2014
Title:
Semiconductor Device and Method of Forming Non-Linear Interconnect Layer with Extended Length for Joint Reliability
74
Patent #:
9305897
Issue Dt:
04/05/2016
Application #:
14138646
Filing Dt:
12/23/2013
Publication #:
US20140110860
Pub Dt:
04/24/2014
Title:
Semiconductor Package and Method of Mounting Semiconductor Die to Opposite Sides of TSV Substrate
75
Patent #:
9054083
Issue Dt:
06/09/2015
Application #:
14143891
Filing Dt:
12/30/2013
Publication #:
US20140110861
Pub Dt:
04/24/2014
Title:
Semiconductor Device and Method of Making TSV Interconnect Structures Using Encapsulant for Structural Support
76
Patent #:
9679811
Issue Dt:
06/13/2017
Application #:
14144906
Filing Dt:
12/31/2013
Publication #:
US20140113446
Pub Dt:
04/24/2014
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL WITH SOLDER MASK PATCH
77
Patent #:
9059186
Issue Dt:
06/16/2015
Application #:
14154049
Filing Dt:
01/13/2014
Publication #:
US20140127858
Pub Dt:
05/08/2014
Title:
EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER
78
Patent #:
9219045
Issue Dt:
12/22/2015
Application #:
14160796
Filing Dt:
01/22/2014
Publication #:
US20140131869
Pub Dt:
05/15/2014
Title:
Semiconductor Device and Method of Self-Confinement of Conductive Bump Material During Reflow Without Solder Mask
79
Patent #:
NONE
Issue Dt:
Application #:
14170295
Filing Dt:
01/31/2014
Publication #:
US20140145340
Pub Dt:
05/29/2014
Title:
Flip Chip Interconnection Structure
80
Patent #:
NONE
Issue Dt:
Application #:
14181429
Filing Dt:
02/14/2014
Publication #:
US20140159236
Pub Dt:
06/12/2014
Title:
Semiconductor Device Having High-Density Interconnect Array with Core Pillars Formed With OSP Coating
Assignor
1
STATS CHIPPAC LTD.
Exec Dt:
03/29/2016
Assignee
1
STATS CHIPPAC PTE. LTD.
5 YISHUN STREET 23
SINGAPORE, SINGAPORE
Correspondence name and address
DARIA DELIZIO
1919 PENNSYLVANIA AVE., SUITE 800
WASHINGTON, DC 20006

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