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Patent Assignment Details
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Reel/Frame:064789/0885   Pages: 11
Recorded: 08/31/2023
Attorney Dkt #:392739-00007
Conveyance: CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38388 FRAME: 0036
Total properties: 71
1
Patent #:
8211753
Issue Dt:
07/03/2012
Application #:
10921376
Filing Dt:
08/18/2004
Publication #:
US20050046012
Pub Dt:
03/03/2005
Title:
LEADFRAME-BASED MOLD ARRAY PACKAGE HEAT SPREADER AND FABRICATION METHOD THEREFOR
2
Patent #:
8211749
Issue Dt:
07/03/2012
Application #:
11465706
Filing Dt:
08/18/2006
Publication #:
US20080042245
Pub Dt:
02/21/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WAFERSCALE SPACER
3
Patent #:
8252615
Issue Dt:
08/28/2012
Application #:
11615919
Filing Dt:
12/22/2006
Publication #:
US20080150119
Pub Dt:
06/26/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING MOLD FLASH PREVENTION TECHNOLOGY
4
Patent #:
8178982
Issue Dt:
05/15/2012
Application #:
11618806
Filing Dt:
12/30/2006
Publication #:
US20080157402
Pub Dt:
07/03/2008
Title:
DUAL MOLDED MULTI-CHIP PACKAGE SYSTEM
5
Patent #:
8198735
Issue Dt:
06/12/2012
Application #:
11670714
Filing Dt:
02/02/2007
Publication #:
US20080157325
Pub Dt:
07/03/2008
Title:
INTEGRATED CIRCUIT PACKAGE WITH MOLDED CAVITY
6
Patent #:
8207597
Issue Dt:
06/26/2012
Application #:
11670899
Filing Dt:
02/02/2007
Publication #:
US20080012100
Pub Dt:
01/17/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLASHLESS LEADS
7
Patent #:
8207600
Issue Dt:
06/26/2012
Application #:
11694921
Filing Dt:
03/30/2007
Publication #:
US20080237816
Pub Dt:
10/02/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ENCAPSULATING FEATURES
8
Patent #:
8178392
Issue Dt:
05/15/2012
Application #:
11750715
Filing Dt:
05/18/2007
Publication #:
US20080283998
Pub Dt:
11/20/2008
Title:
ELECTRONIC SYSTEM WITH EXPANSION FEATURE
9
Patent #:
8203214
Issue Dt:
06/19/2012
Application #:
11769691
Filing Dt:
06/27/2007
Publication #:
US20090001563
Pub Dt:
01/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM WITH ADHESIVELESS PACKAGE ATTACH
10
Patent #:
8188590
Issue Dt:
05/29/2012
Application #:
11843649
Filing Dt:
08/23/2007
Publication #:
US20070284726
Pub Dt:
12/13/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH POST-PASSIVATION INTERCONNECTION AND INTEGRATION
11
Patent #:
8188586
Issue Dt:
05/29/2012
Application #:
11934069
Filing Dt:
11/01/2007
Publication #:
US20090115043
Pub Dt:
05/07/2009
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTING INTERCONNECTS
12
Patent #:
8183675
Issue Dt:
05/22/2012
Application #:
11947303
Filing Dt:
11/29/2007
Publication #:
US20090140407
Pub Dt:
06/04/2009
Title:
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH ANTI-MOLD FLASH FEATURE
13
Patent #:
8241954
Issue Dt:
08/14/2012
Application #:
11949133
Filing Dt:
12/03/2007
Publication #:
US20090140441
Pub Dt:
06/04/2009
Title:
WAFER LEVEL DIE INTEGRATION AND METHOD
14
Patent #:
8242607
Issue Dt:
08/14/2012
Application #:
11950216
Filing Dt:
12/04/2007
Publication #:
US20080150158
Pub Dt:
06/26/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKED DIE AND METHOD OF MANUFACTURE THEREOF
15
Patent #:
8178956
Issue Dt:
05/15/2012
Application #:
11956132
Filing Dt:
12/13/2007
Publication #:
US20090152688
Pub Dt:
06/18/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR SHIELDING ELECTROMAGNETIC INTERFERENCE
16
Patent #:
8247893
Issue Dt:
08/21/2012
Application #:
11965653
Filing Dt:
12/27/2007
Publication #:
US20090166886
Pub Dt:
07/02/2009
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTRA-STACK ENCAPSULATION
17
Patent #:
8221583
Issue Dt:
07/17/2012
Application #:
12018065
Filing Dt:
01/22/2008
Publication #:
US20080173407
Pub Dt:
07/24/2008
Title:
SYSTEM FOR PEELING SEMICONDUCTOR CHIPS FROM TAPE
18
Patent #:
8212352
Issue Dt:
07/03/2012
Application #:
12050797
Filing Dt:
03/18/2008
Publication #:
US20080237817
Pub Dt:
10/02/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SINK SPACER STRUCTURES
19
Patent #:
8247894
Issue Dt:
08/21/2012
Application #:
12053751
Filing Dt:
03/24/2008
Publication #:
US20090236720
Pub Dt:
09/24/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STEP MOLD RECESS
20
Patent #:
8232658
Issue Dt:
07/31/2012
Application #:
12113888
Filing Dt:
05/01/2008
Publication #:
US20080203549
Pub Dt:
08/28/2008
Title:
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE INTERCONNECT INTERFACE
21
Patent #:
8189344
Issue Dt:
05/29/2012
Application #:
12136037
Filing Dt:
06/09/2008
Publication #:
US20090303690
Pub Dt:
12/10/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
22
Patent #:
8183087
Issue Dt:
05/22/2012
Application #:
12207332
Filing Dt:
09/09/2008
Publication #:
US20100059855
Pub Dt:
03/11/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A FAN-OUT STRUCTURE WITH INTEGRATED PASSIVE DEVICE AND DISCRETE COMPONENT
23
Patent #:
8258010
Issue Dt:
09/04/2012
Application #:
12406038
Filing Dt:
03/17/2009
Publication #:
US20100237471
Pub Dt:
09/23/2010
Title:
MAKING A SEMICONDUCTOR DEVICE HAVING CONDUCTIVE THROUGH ORGANIC VIAS
24
Patent #:
8217514
Issue Dt:
07/10/2012
Application #:
12412303
Filing Dt:
03/26/2009
Publication #:
US20090250810
Pub Dt:
10/08/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE CONTROL SYSTEM AND METHOD OF MANUFACTURE THEREOF
25
Patent #:
8252634
Issue Dt:
08/28/2012
Application #:
12488043
Filing Dt:
06/19/2009
Publication #:
US20100320590
Pub Dt:
12/23/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADFRAME HAVING RADIAL-SEGMENTS AND METHOD OF MANUFACTURE THEREOF
26
Patent #:
8236607
Issue Dt:
08/07/2012
Application #:
12488383
Filing Dt:
06/19/2009
Publication #:
US20100320586
Pub Dt:
12/23/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT AND METHOD OF MANUFACTURE THEREOF
27
Patent #:
8193034
Issue Dt:
06/05/2012
Application #:
12492360
Filing Dt:
06/26/2009
Publication #:
US20090261466
Pub Dt:
10/22/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL INTERCONNECT STRUCTURE USING STUD BUMPS
28
Patent #:
8237252
Issue Dt:
08/07/2012
Application #:
12507130
Filing Dt:
07/22/2009
Publication #:
US20110018114
Pub Dt:
01/27/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF EMBEDDING THERMALLY CONDUCTIVE LAYER IN INTERCONNECT STRUCTURE FOR HEAT DISSIPATION
29
Patent #:
8228154
Issue Dt:
07/24/2012
Application #:
12579307
Filing Dt:
10/14/2009
Publication #:
US20100033290
Pub Dt:
02/11/2010
Title:
MINIATURIZED WIDE-BAND BALUNS FOR RF APPLICATIONS
30
Patent #:
8173536
Issue Dt:
05/08/2012
Application #:
12610763
Filing Dt:
11/02/2009
Publication #:
US20110101518
Pub Dt:
05/05/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING COLUMN INTERCONNECT STRUCTURE TO REDUCE WAFER STRESS
31
Patent #:
8198186
Issue Dt:
06/12/2012
Application #:
12633531
Filing Dt:
12/08/2009
Publication #:
US20100164097
Pub Dt:
07/01/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONFINING CONDUCTIVE BUMP MATERIAL DURING REFLOW WITH SOLDER MASK PATCH
32
Patent #:
8212342
Issue Dt:
07/03/2012
Application #:
12635695
Filing Dt:
12/10/2009
Publication #:
US20110140251
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REMOVABLE BACKING ELEMENT HAVING PLATED TERMINAL LEADS AND METHOD OF MANUFACTURE THEREOF
33
Patent #:
8216930
Issue Dt:
07/10/2012
Application #:
12643180
Filing Dt:
12/21/2009
Publication #:
US20100099222
Pub Dt:
04/22/2010
Title:
SOLDER JOINT FLIP CHIP INTERCONNECTION HAVING RELIEF STRUCTURE
34
Patent #:
8241952
Issue Dt:
08/14/2012
Application #:
12713018
Filing Dt:
02/25/2010
Publication #:
US20110204509
Pub Dt:
08/25/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING IPD IN FAN-OUT LEVEL CHIP SCALE PACKAGE
35
Patent #:
8241956
Issue Dt:
08/14/2012
Application #:
12719476
Filing Dt:
03/08/2010
Publication #:
US20110215449
Pub Dt:
09/08/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING WAFER LEVEL MULTI-ROW ETCHED LEAD PACKAGE
36
Patent #:
8193035
Issue Dt:
06/05/2012
Application #:
12731354
Filing Dt:
03/25/2010
Publication #:
US20100178735
Pub Dt:
07/15/2010
Title:
FUSIBLE I/O INTERCONNECTION SYSTEMS AND METHODS FOR FLIP-CHIP PACKAGING INVOLVING SUBSTRATE-MOUNTED STUD BUMPS
37
Patent #:
8203201
Issue Dt:
06/19/2012
Application #:
12732465
Filing Dt:
03/26/2010
Publication #:
US20110233753
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF
38
Patent #:
8207015
Issue Dt:
06/26/2012
Application #:
12772142
Filing Dt:
04/30/2010
Publication #:
US20110266664
Pub Dt:
11/03/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF
39
Patent #:
8241964
Issue Dt:
08/14/2012
Application #:
12779781
Filing Dt:
05/13/2010
Publication #:
US20110278717
Pub Dt:
11/17/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF EMBEDDING BUMPS FORMED ON SEMICONDUCTOR DIE INTO PENETRABLE ADHESIVE LAYER TO REDUCE DIE SHIFTING DURING ENCAPSULATION
40
Patent #:
8258012
Issue Dt:
09/04/2012
Application #:
12780295
Filing Dt:
05/14/2010
Publication #:
US20110278703
Pub Dt:
11/17/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING DISCONTINUOUS ESD PROTECTION LAYERS BETWEEN SEMICONDUCTOR DIE
41
Patent #:
8217501
Issue Dt:
07/10/2012
Application #:
12789456
Filing Dt:
05/28/2010
Publication #:
US20100237488
Pub Dt:
09/23/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING HONEYCOMB MOLDING
42
Patent #:
8236617
Issue Dt:
08/07/2012
Application #:
12794612
Filing Dt:
06/04/2010
Publication #:
US20110298110
Pub Dt:
12/08/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THERMALLY CONDUCTIVE LAYER BETWEEN SEMICONDUCTOR DIE AND BUILD-UP INTERCONNECT STRUCTURE
43
Patent #:
8217502
Issue Dt:
07/10/2012
Application #:
12796668
Filing Dt:
06/08/2010
Publication #:
US20110298125
Pub Dt:
12/08/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPART CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF
44
Patent #:
8203220
Issue Dt:
06/19/2012
Application #:
12797922
Filing Dt:
06/10/2010
Publication #:
US20100244273
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE DEVICE UNITS AND METHOD FOR MANUFACTURING THEREOF
45
Patent #:
8183130
Issue Dt:
05/22/2012
Application #:
12816190
Filing Dt:
06/15/2010
Publication #:
US20110304011
Pub Dt:
12/15/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING LAYER AROUND BACK SURFACE AND SIDES OF SEMICONDUCTOR WAFER CONTAINING IPD STRUCTURE
46
Patent #:
8202797
Issue Dt:
06/19/2012
Application #:
12820491
Filing Dt:
06/22/2010
Publication #:
US20110309492
Pub Dt:
12/22/2011
Title:
INTEGRATED CIRCUIT SYSTEM WITH RECESSED THROUGH SILICON VIA PADS AND METHOD OF MANUFACTURE THEREOF
47
Patent #:
8178394
Issue Dt:
05/15/2012
Application #:
12827864
Filing Dt:
06/30/2010
Publication #:
US20100264528
Pub Dt:
10/21/2010
Title:
QUAD FLAT PACK IN QUAD FLAT PACK INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD FOR MANUFACTURING THEREOF
48
Patent #:
8193610
Issue Dt:
06/05/2012
Application #:
12853898
Filing Dt:
08/10/2010
Publication #:
US20120038047
Pub Dt:
02/16/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING B-STAGE CONDUCTIVE POLYMER OVER CONTACT PADS OF SEMICONDUCTOR DIE IN FO-WLCSP
49
Patent #:
8252666
Issue Dt:
08/28/2012
Application #:
12858615
Filing Dt:
08/18/2010
Publication #:
US20100311206
Pub Dt:
12/09/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH HOLE VIAS IN DIE EXTENSION REGION AROUND PERIPHERY OF DIE
50
Patent #:
8241965
Issue Dt:
08/14/2012
Application #:
12859049
Filing Dt:
08/18/2010
Publication #:
US20110079886
Pub Dt:
04/07/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD OF MANUFACTURE THEREOF
51
Patent #:
8147120
Issue Dt:
04/03/2012
Application #:
12867789
Filing Dt:
08/16/2010
Publication #:
US20100315897
Pub Dt:
12/16/2010
Title:
DISPOSABLE SHAKER
52
Patent #:
8193036
Issue Dt:
06/05/2012
Application #:
12882083
Filing Dt:
09/14/2010
Publication #:
US20120061858
Pub Dt:
03/15/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
53
Patent #:
8227903
Issue Dt:
07/24/2012
Application #:
12882856
Filing Dt:
09/15/2010
Publication #:
US20120061859
Pub Dt:
03/15/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULANT CONTAINMENT AND METHOD OF MANUFACTURE THEREOF
54
Patent #:
8247268
Issue Dt:
08/21/2012
Application #:
12896430
Filing Dt:
10/01/2010
Publication #:
US20110111591
Pub Dt:
05/12/2011
Title:
SEMICONDUCTOR WAFER HAVING THROUGH-HOLE VIAS ON SAW STREETS WITH BACKSIDE REDISTRIBUTION LAYER
55
Patent #:
8174098
Issue Dt:
05/08/2012
Application #:
12911042
Filing Dt:
10/25/2010
Publication #:
US20110037168
Pub Dt:
02/17/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING A THERMAL DISSIPATION PATH THROUGH RDL AND CONDUCTIVE VIA
56
Patent #:
8222717
Issue Dt:
07/17/2012
Application #:
12912467
Filing Dt:
10/26/2010
Title:
EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER
57
Patent #:
8193604
Issue Dt:
06/05/2012
Application #:
12950591
Filing Dt:
11/19/2010
Publication #:
US20110068468
Pub Dt:
03/24/2011
Title:
SEMICONDUCTOR PACKAGE WITH SEMICONDUCTOR CORE STRUCTURE AND METHOD OF FORMING THE SAME
58
Patent #:
8193037
Issue Dt:
06/05/2012
Application #:
12961490
Filing Dt:
12/06/2010
Publication #:
US20120139121
Pub Dt:
06/07/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD OF MANUFACTURE THEREOF
59
Patent #:
8258008
Issue Dt:
09/04/2012
Application #:
12970755
Filing Dt:
12/16/2010
Publication #:
US20110084401
Pub Dt:
04/14/2011
Title:
PACKAGE-ON-PACKAGE SYSTEM WITH VIA Z-INTERCONNECTIONS AND METHOD FOR MANUFACTURING THEREOF
60
Patent #:
8183089
Issue Dt:
05/22/2012
Application #:
12976753
Filing Dt:
12/22/2010
Publication #:
US20110092021
Pub Dt:
04/21/2011
Title:
METHOD FOR MANUFACTURING PACKAGE SYSTEM INCORPORATING FLIP-CHIP ASSEMBLY
61
Patent #:
8203145
Issue Dt:
06/19/2012
Application #:
13019643
Filing Dt:
02/02/2011
Publication #:
US20110121295
Pub Dt:
05/26/2011
Title:
STRUCTURE FOR BUMPED WAFER TEST
62
Patent #:
8216883
Issue Dt:
07/10/2012
Application #:
13023329
Filing Dt:
02/08/2011
Publication #:
US20110129965
Pub Dt:
06/02/2011
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE SYSTEM WITH DIE SUPPORT PAD
63
Patent #:
8183095
Issue Dt:
05/22/2012
Application #:
13029936
Filing Dt:
02/17/2011
Publication #:
US20110221057
Pub Dt:
09/15/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SACRIFICIAL PROTECTIVE LAYER TO PROTECT SEMICONDUCTOR DIE EDGE DURING SINGULATION
64
Patent #:
8174127
Issue Dt:
05/08/2012
Application #:
13039311
Filing Dt:
03/03/2011
Publication #:
US20110147899
Pub Dt:
06/23/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING
65
Patent #:
8256660
Issue Dt:
09/04/2012
Application #:
13053141
Filing Dt:
03/21/2011
Publication #:
US20110169149
Pub Dt:
07/14/2011
Title:
SEMICONDUCTOR PACKAGE SYSTEM WITH FINE PITCH LEAD FINGERS AND METHOD OF MANUFACTURING THEREOF
66
Patent #:
8232141
Issue Dt:
07/31/2012
Application #:
13080070
Filing Dt:
04/05/2011
Publication #:
US20110180935
Pub Dt:
07/28/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF
67
Patent #:
8188598
Issue Dt:
05/29/2012
Application #:
13088647
Filing Dt:
04/18/2011
Publication #:
US20110215468
Pub Dt:
09/08/2011
Title:
BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
68
Patent #:
8241955
Issue Dt:
08/14/2012
Application #:
13090192
Filing Dt:
04/19/2011
Publication #:
US20110256664
Pub Dt:
10/20/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MOUNTABLE INWARD AND OUTWARD INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
69
Patent #:
8211746
Issue Dt:
07/03/2012
Application #:
13117500
Filing Dt:
05/27/2011
Publication #:
US20110227206
Pub Dt:
09/22/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF MANUFACTURE THEREOF
70
Patent #:
8227910
Issue Dt:
07/24/2012
Application #:
13212986
Filing Dt:
08/18/2011
Publication #:
US20110298120
Pub Dt:
12/08/2011
Title:
APPARATUS FOR THERMALLY ENHANCED SEMICONDUCTOR PACKAGE
71
Patent #:
8227925
Issue Dt:
07/24/2012
Application #:
13397562
Filing Dt:
02/15/2012
Publication #:
US20120146243
Pub Dt:
06/14/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
Assignor
1
STATS CHIPPAC LTD.
Exec Dt:
03/29/2016
Assignee
1
STATS CHIPPAC PTE. LTE.
5 YISHUN STREET 23
SINGAPORE, SINGAPORE
Correspondence name and address
SEAN WOODEN
1919 PENNSYLVANIA AVE., SUITE 800
WASHINGTON, DC 20006

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