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Reel/Frame:017215/0953   Pages: 9
Recorded: 02/27/2006
Attorney Dkt #:46715-1296 AMKOR PATENT
Conveyance: SECURITY AGREEMENT
Total properties: 18
1
Patent #:
Issue Dt:
11/08/2005
Application #:
09746018
Filing Dt:
12/26/2000
Publication #:
Pub Dt:
09/06/2001
Title:
STRUCTURE OF HEAT SLUG-EQUIPPED PACKAGES AND THE PACKAGING METHOD OF THE SAME
2
Patent #:
Issue Dt:
01/24/2006
Application #:
09758325
Filing Dt:
01/10/2001
Publication #:
Pub Dt:
12/13/2001
Title:
PATTERN RECOGNITION METHOD
3
Patent #:
Issue Dt:
01/10/2006
Application #:
09758332
Filing Dt:
01/10/2001
Publication #:
Pub Dt:
12/20/2001
Title:
CLAMP FOR PATTERN RECOGNITION
4
Patent #:
Issue Dt:
11/22/2005
Application #:
09884193
Filing Dt:
06/19/2001
Title:
IMPRINTED INTEGRATED CIRCUIT SUBSTRATE AND METHOD FOR IMPRINTING AN INTEGRATED CIRCUIT SUBSTRATE
5
Patent #:
Issue Dt:
01/03/2006
Application #:
10076701
Filing Dt:
02/13/2002
Title:
STACKING STRUCTURE FOR SEMICONDUCTOR CHIPS AND A SEMICONDUCTOR PACKAGE USING IT
6
Patent #:
Issue Dt:
11/08/2005
Application #:
10150400
Filing Dt:
05/17/2002
Publication #:
Pub Dt:
11/14/2002
Title:
METHOD OF MAKING NEAR CHIP SIZE INTEGRATED CIRCUIT PACKAGE
7
Patent #:
NONE
Issue Dt:
Application #:
10156889
Filing Dt:
05/30/2002
Publication #:
Pub Dt:
10/10/2002
Title:
Method of making an integrated circuit package
8
Patent #:
Issue Dt:
12/05/2006
Application #:
10227051
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
02/26/2004
Title:
OPTIC SEMICONDUCTOR MODULE AND MANUFACTURING METHOD
9
Patent #:
Issue Dt:
11/15/2005
Application #:
10356997
Filing Dt:
02/03/2003
Title:
REINFORCED LEAD-FRAME ASSEMBLY FOR INTERCONNECTING CIRCUITS WITHIN A CIRCUIT MODULE
10
Patent #:
Issue Dt:
01/03/2006
Application #:
10600931
Filing Dt:
06/20/2003
Publication #:
Pub Dt:
01/15/2004
Title:
SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
11
Patent #:
Issue Dt:
11/22/2005
Application #:
10688138
Filing Dt:
10/17/2003
Title:
MOUNTING FOR A PACKAGE CONTAINING A CHIP
12
Patent #:
Issue Dt:
12/20/2005
Application #:
10702274
Filing Dt:
11/05/2003
Title:
STACKABLE SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
13
Patent #:
Issue Dt:
11/15/2005
Application #:
10737572
Filing Dt:
12/16/2003
Title:
SEMICONDUCTOR PACKAGE WITH EXPOSED DIE PAD AND BODY-LOCKING LEADFRAME
14
Patent #:
Issue Dt:
03/13/2007
Application #:
10785528
Filing Dt:
02/24/2004
Publication #:
Pub Dt:
08/26/2004
Title:
SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
15
Patent #:
Issue Dt:
06/13/2006
Application #:
10803333
Filing Dt:
03/17/2004
Publication #:
Pub Dt:
09/09/2004
Title:
STACKABLE SEMICONDUCTOR PACKAGE HAVING SEMICONDUCTOR CHIP WITHIN CENTRAL THROUGH HOLE OF SUBSTRATE
16
Patent #:
Issue Dt:
04/18/2006
Application #:
10884082
Filing Dt:
07/01/2004
Publication #:
Pub Dt:
01/06/2005
Title:
SUBSTRATE FOR SEMICONDUCTOR PACKAGE AND WIRE BONDING METHOD USING THEREOF
17
Patent #:
Issue Dt:
10/18/2005
Application #:
10928475
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
02/03/2005
Title:
IMAGE SENSOR PACKAGE FABRICATION METHOD
18
Patent #:
Issue Dt:
10/11/2005
Application #:
10944241
Filing Dt:
09/17/2004
Publication #:
Pub Dt:
03/24/2005
Title:
SEMICONDUCTOR PACKAGE
Assignor
1
Exec Dt:
02/10/2006
Assignee
1
901 MAIN STREET
22ND FLOOR
DALLAS, TEXAS 75202
Correspondence name and address
ANDREA WALKER
1445 ROSS AVENUE
SUITE 3700
DALLAS, TX 75202-2799

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