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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
11971992
Issue Dt:
04/30/2024
Application #:
17093578
Filing Dt:
11/09/2020
Publication #:
20210081578
Pub Dt:
03/18/2021
Inventors:
Fulong Zhang, Srirama Chandra, Sreepada Hegade, Joel Coplen, Wei Han, Yu Sun
Title:
FAILURE CHARACTERIZATION SYSTEMS AND METHODS FOR ERASING AND DEBUGGING PROGRAMMABLE LOGIC DEVICES
Assignment: 1
Reel/Frame:
061365/0560Recorded: 09/01/2022Pages: 11
Conveyance:
SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
LATTICE SEMICONDUCTOR CORPORATION
Exec Dt:
09/01/2022
Assignee:
WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
1700 LINCOLN STREET, 3RD FLOOR
MAC C7300-033
DENVER, COLORADO 80203
Correspondent:
BETTY G. SMITH, SENIOR PARALEGAL
MCGUIREWOODS LLP, 201 N. TRYON ST.
SUITE 3000
CHARLOTTE, NC 28202
Assignment: 2
Reel/Frame:
064290/0042Recorded: 07/17/2023Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
ZHANG, FULONG
Exec Dt:
07/13/2023
CHANDRA, SRIRAMA
Exec Dt:
06/16/2023
HEGADE, SREEPADA
Exec Dt:
07/11/2023
COPLEN, JOEL
Exec Dt:
06/26/2023
HAN, WEI
Exec Dt:
07/10/2023
SUN, YU
Exec Dt:
12/01/2018
Assignee:
LATTICE SEMICONDUCTOR CORPORATION
5555 NE MOORE CT.
HILLSBORO, OREGON 97124
Correspondent:
HAYNES AND BOONE, LLP
2323 VICTORY AVENUE
SUITE 700
DALLAS, TX 75219

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