Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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07/07/1998
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Application #:
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08533044
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Filing Dt:
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09/25/1995
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Inventors:
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SANDRA J. BAYLOR, YARSUN HSU
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Title:
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INVALIDATION BUS OPTIMIZATION FOR MULTIPROCESSORS USING DIRECTORY-BASED CACHE COHERENCE PROTOCOLS IN WHICH AN ADDRESS OF A LINE TO BE MODIFIED IS PLACED ON THE INVALIDATION BUS SIMULTANEOUSLY WITH SENDING A MODIFY REQUEST TO THE DIRECTORY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| OLD ORCHARD ROAD |
| ARMONK, NEW YORK 10504 |
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| ROBERT P. TASSINARI, JR. |
| IBM CORPORATION |
| INTELLECTUAL PROPERTY LAW |
| P.O. BOX 218 |
| YORKTOWN HEIGHTS, NY 10598 |
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