Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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02/19/2002
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Application #:
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09597887
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Filing Dt:
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06/19/2000
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Inventors:
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Satish D. Athavale, Gary B. Bronner, Ramachandra Divakaruni, Jack A. Mandelman et al
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Title:
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PROCESS FOR 4F2 STC CELL HAVING VERTICAL MOSFET AND BURIED-BITLINE CONDUCTOR STRUCTURE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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NEW ORCHARD ROAD |
ARMONK, NEW YORK 10504 |
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POLLOCK, VANDE SANDE & AMERNICK |
ERIC J. FRANKLIN |
1990 M STREET, N.W., SUITE 800 |
WASHINGTON, D.C. 20036-3425 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1730 NORTH FIRST STREET |
SAN JOSE, CALIFORNIA 95112 |
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POLLOCK, VANDE SANDE & AMERNICK |
ERIC J. FRANKLIN |
SUITE 800 |
1990 M STREET, N.W. |
WASHINGTON, D.C. 20036-3425 |
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