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Patent Assignment Abstract of Title

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Total Assignments: 1

Patent #:	6714044	Issue Dt:	03/30/2004	Application #:	10106673	Filing Dt:	03/25/2002
Inventors:	Gopi Rangan, Khai Nguyen, Chiakang Sung, Xiaobao Wang, In Whan Kim, Yan Chong, Philip Pan et al
Title:	HI-SPEED PARALLEL CONFIGURATION OF PROGRAMMABLE LOGIC

Assignment: 1

Reel/Frame:

012753/0387

Recorded: 03/25/2002

Pages: 13

Conveyance:

ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Assignors:

RANGAN, GOPI

Exec Dt:

02/19/2002

NGUYEN, KHAI

Exec Dt:

02/19/2002

SUNG, CHIAKANG

Exec Dt:

02/18/2002

WANG, XIAOBAO

Exec Dt:

02/19/2002

KIM, IN WHAN

Exec Dt:

03/06/2002

CHONG, YAN

Exec Dt:

03/14/2002

PAN, PHILIP

Exec Dt:

02/19/2002

HUANG, JOSEPH

Exec Dt:

02/21/2002

WANG, BONNIE

Exec Dt:

02/19/2002

Assignee:

ALTERA CORPORATION

101 INNOVATION DRIVE

SAN JOSE, CALIFORNIA 95134

Correspondent:

TOWNSEND AND TOWNSEND AND CREW LLP

MELVIN D. CHAN, ESQ.

TWO EMBARCADERO CENTER, 8TH FLOOR

SAN FRANCISCO, CA 94111-3834

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