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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
11/04/2008
Application #:
11856638
Filing Dt:
09/17/2007
Publication #:
Pub Dt:
05/01/2008
Inventor:
Chia-Liang Lin
Title:
METHOD AND APPARATUS TO REDUCE INTERNAL CIRCUIT ERRORS IN A MULTI-BIT DELTA-SIGMA MODUALTOR
Assignment: 1
Reel/Frame:
019845/0014Recorded: 09/18/2007Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
09/17/2007
Assignee:
NO.2 INNOVATION ROAD II, SCIENCE BASED INDUSTRIAL PARK
HSINCHU, TAIWAN
Correspondent:
KNOBBE, MARTENS, OLSON & BEAR, LLP
2040 MAIN STREET, 14TH FLOOR
IRVINE, CA 92614

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