Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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09/29/2015
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Application #:
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13093931
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Filing Dt:
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04/26/2011
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Publication #:
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Pub Dt:
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02/02/2012
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Inventors:
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Jian-Kao Chen, Chih Chiang Hsu
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Title:
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Display timing control circuit with adjustable clock divisor and method thereof
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 4F-1, NO. 26, TAI-YUAN STREET |
| CHUPEI |
| HSINCHU HSIEN, TAIWAN KY1-1003 |
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| LAWRENCE D. EISEN |
| 1901 RESEARCH BOULEVARD |
| SUITE 400 |
| ROCKVILLE, MD 20850 |
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Assignment:
2
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MERGER (SEE DOCUMENT FOR DETAILS).
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| NO. 1, DUSING 1ST RD., HSINCHU SCIENCE PARK |
| HSINCHU CITY, TAIWAN 30078 |
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| MCCLURE, QUALEY & RODACK LLP |
| 280 INTERSTATE NORTH CIRCLE |
| SUITE 550 |
| ATLANTA, GA 30339 |
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