Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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09880223
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Filing Dt:
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06/13/2001
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Publication #:
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Pub Dt:
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12/19/2002
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Inventors:
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Louis L. Hsu, Rajiv V. Joshi, Fariborz Assaderaghi
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Title:
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T-RAM CELL HAVING A BURIED VERTICAL THYRISTOR AND A PSEUDO-TFT TRANSFER GATE AND METHOD FOR FABRICATING THE SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NEW ORCHARD ROAD |
| ARMONK, NEW YORK 10504 |
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| DILWORTH & BARRESE, LLP |
| PAUL J. FARRELL, ESQ. |
| 333 EARLE OVINGTON BOULEVARD |
| UNIONDALE, NEW YORK 11553 |
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