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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
06/07/2005
Application #:
10811360
Filing Dt:
03/26/2004
Publication #:
Pub Dt:
09/16/2004
Inventor:
James D. Beasom
Title:
INTEGRATED CIRCUIT WITH A MOS STRUCTURE HAVING REDUCED PARASITIC BIPOLAR TRANSISTOR ACTION
Assignment: 1
Reel/Frame:
036840/0690Recorded: 10/21/2015Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
10/03/2001
Assignee:
2401 PALM BAY ROAD
PALM BAY, FLORIDA 32905
Correspondent:
RADEANA BURKE
1650 ROBERT J CONLAN BLVD
PALM BAY, FL 32905
Assignment: 2
Reel/Frame:
024320/0001Recorded: 04/30/2010Pages: 128
Conveyance:
SECURITY AGREEMENT
Assignors:
Exec Dt:
04/27/2010
Exec Dt:
04/27/2010
Exec Dt:
04/27/2010
Exec Dt:
04/27/2010
Exec Dt:
04/27/2010
Exec Dt:
04/27/2010
Exec Dt:
04/27/2010
Exec Dt:
04/27/2010
Exec Dt:
04/27/2010
Exec Dt:
04/27/2010
Assignee:
ONE PIERREPONT PLAZA, 7TH FLOOR
300 CADMAN PLAZA WEST
BROOKLYN, NEW YORK 11201
Correspondent:
JOSHUA H. RAWSON
DECHERT LLP
1095 AVENUE OF THE AMERICAS
NEW YORK, NY 10036

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