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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
NONE
Issue Dt:
Application #:
11021003
Filing Dt:
12/23/2004
Publication #:
20060001494
Pub Dt:
01/05/2006
Inventors:
Bruno Garlepp, Michael Sobelman
Title:
Cascaded locked-loop circuits deriving high-frequency, low noise clock signals from a jittery, low-frequency reference
Assignment: 1
Reel/Frame:
016305/0425Recorded: 02/28/2005Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
GARLEPP, BRUNO
Exec Dt:
09/13/2004
SOBELMAN, MICHAEL
Exec Dt:
09/13/2004
DONNELLY, KEVIN
Exec Dt:
09/13/2004
Assignee:
RAMBUS INC.
4440 EL CAMINO REAL
LOS ALTOS, CALIFORNIA 94022
Correspondent:
SILICON EDGE LAW GROUP LLP
ARTHUR J. BEHIEL, PATENT ATTORNEY
6601 KOLL CENTER PARKWAY
SUTIE 245
PLEASANTON, CA 94566
Assignment: 2
Reel/Frame:
017050/0230Recorded: 09/19/2005Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
GARLEPP, BRUNO
Exec Dt:
09/13/2004
SOBELMAN, MICHAEL
Exec Dt:
09/13/2004
DONNELLY, KEVIN
Exec Dt:
09/13/2004
Assignee:
RAMBUS INC.
4440 EL CAMINO REAL
LOS ALTOS, CALIFORNIA 94022
Correspondent:
SILICON EDGE LAW GROUP LLP
ARTHUR J. BEHIEL, PATENT ATTORNEY
6601 KOLL CENTER PARKWAY, SUITE 245
PLEASANTON, CALIFORNIA 94566

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