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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
NONE
Issue Dt:
Application #:
11314569
Filing Dt:
12/21/2005
Publication #:
Pub Dt:
07/06/2006
Inventors:
John Bratt, Brett William, Jeffrey Rearick
Title:
Systems and methods for designing integrated circuits
Assignment: 1
Reel/Frame:
017675/0001Recorded: 05/25/2006Pages: 86
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
12/01/2005
Assignee:
NO. 1 YISHUN AVENUE 7
SINGAPORE, SINGAPORE 768923
Correspondent:
AVAGO TECHNOLOGIES, LTD.
P.O. BOX 1920
DENVER, CO 80201-1920
Assignment: 2
Reel/Frame:
019975/0363Recorded: 10/17/2007Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
12/16/2005
Exec Dt:
12/16/2005
Exec Dt:
12/15/2005
Assignee:
P.O. BOX 7599
LOVELAND, COLORADO 80537
Correspondent:
ADRIENNE BARCLAY
4380 ZIEGLER ROAD
FORT COLLINS, CO 80525

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