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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
NONE
Issue Dt:
Application #:
11351121
Filing Dt:
02/09/2006
Publication #:
Pub Dt:
08/09/2007
Inventors:
Brian Flachs, H. Peter Hofstee, John S. Liberty, Brad W. Michael
Title:
PROCESSOR SYSTEM AND METHODOLOGY WITH BACKGROUND ERROR HANDLING FEATURE
Assignment: 1
Reel/Frame:
017280/0111Recorded: 03/09/2006Pages: 6
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
02/06/2006
Exec Dt:
12/19/2005
Exec Dt:
12/09/2005
Exec Dt:
12/09/2005
Assignee:
NEW ORCHARD ROAD
ARMONK, NEW YORK 10504
Correspondent:
DIANA R. GERHARDT
11400 BURNET ROAD
IBM-INTELLECTUAL PROPERTY LAW
AUSTIN, TX 78758-3493

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