Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11639784
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Filing Dt:
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12/15/2006
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Publication #:
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Pub Dt:
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06/19/2008
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Inventors:
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Jerry W. Yancey, Yea Zong Kuo
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Title:
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Method and system for configuring FPGAs from VHDL code with reduced delay from large multiplexers
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 10001 JACK FINNEY BLVD. |
| GREENVILLE, TEXAS 75402 |
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| BRIAN W. PETERMAN |
| 1101 S. CAPITAL OF TEXAS HIGHWAY |
| BUILDING C, SUITE 200 |
| AUSTIN, TX 78746 |
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Assignment:
2
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RE-RECORD TO CORRECT THE NAME OF THE ASSIGNEE, PREVIOUSLY RECORDED ON REEL 018721 FRAME 0771.
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| 10001 JACK FINNEY BLVD. |
| GREENVILLE, TEXAS 75402 |
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| BRIAN W. PETERMAN |
| 1101 S. CAP OF TX HEY |
| BLDG. C-SUITE 200 |
| AUSTIN, TEXAS 78746 |
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