Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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12268671
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Filing Dt:
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11/11/2008
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Publication #:
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Pub Dt:
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06/04/2009
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Inventor:
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Pierre Fazan
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Title:
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INTEGRATED CIRCUIT HAVING MEMORY CELL ARRAY INCLUDING BARRIERS, AND METHOD OF MANUFACTURING SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| PSE-BATIMENT B |
| LAUSANNE, SWITZERLAND CH-1015 |
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| NEIL STEINBERG |
| 2300 M STREET, N.W. |
| SUITE 800 |
| WASHINGTON, DC 20037 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 8000 S. FEDERAL WAY |
| MAIL STOP 525 |
| BOISE, IDAHO 83716 |
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| THOMAS E. ANDERSON |
| HUNTON & WILLIAMS LLP |
| INTELLECTUAL PROPERTY DEPARTMENT |
| 1900 K STREET, N.W., SUITE 1200 |
| WASHINGTON, D.C. 20006 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1940 DUKE STREET |
| SUITE 200 |
| ALEXANDRIA, VIRGINIA 22314 |
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| STEVE STEGER |
| 55 W. MONROE STREET |
| CHICAGO, IL 60603 |
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