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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
11/01/2011
Application #:
12502922
Filing Dt:
07/14/2009
Publication #:
Pub Dt:
11/05/2009
Inventors:
Jean-Marie Brunet, William S. Graupp
Title:
GATE MODELING FOR SEMICONDUCTOR FABRICATION PROCESS EFFECTS
Assignment: 1
Reel/Frame:
024042/0386Recorded: 03/08/2010Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
04/03/2007
Exec Dt:
04/17/2007
Assignee:
8005 SW BOECKMAN ROAD
WILSONVILLE, OREGON 97070-7777
Correspondent:
PATRICK M. BIBLE
121 SW SALMON STREET
SUITE 1600
PORTLAND, OR 97204

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