Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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NONE
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Issue Dt:
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Application #:
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12464253
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Filing Dt:
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05/12/2009
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Publication #:
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Pub Dt:
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11/18/2010
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Inventor:
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Joseph C. Fjelstad
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Title:
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Method and Apparatus for Vertical Stacking of Integrated Circuit Chips
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 20400 STEVENS CREEK BLVD., 5TH FLOOR |
| I. P. LEGAL |
| CUPERTINO, CALIFORNIA 95014 |
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| DORIS PRUETT |
| 20400 STEVENS CREEK BLVD., 5TH FLOOR |
| I. P. LEGAL |
| CUPERTINO, CA 95014 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| SAN #16, BANWOL-DONG |
| HWASUNG-CITY |
| GYEONGGI-DO, KOREA, REPUBLIC OF 445-701 |
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| MYERS BIGEL SIBLEY & SAJOVEC, P.A./KSC |
| 4140 PARKLAKE AVENUE |
| SUITE 600 |
| RALEIGH, NC 27612 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| SAN #16, BANWOL-DONG |
| HWASUNG-CITY |
| GYEONGGI-DO, KOREA, REPUBLIC OF 445-701 |
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| MYERS BIGEL SIBLEY & SAJOVEC, P.A./KSC |
| 4140 PARKLAKE AVENUE |
| SUITE 600 |
| RALEIGH, NC 27612 |
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