Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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13097568
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Filing Dt:
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04/29/2011
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Publication #:
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Pub Dt:
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08/25/2011
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Inventor:
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Poorna Kale
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Title:
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REDUCED SIGNAL INTERFACE MEMORY DEVICE, SYSTEM, AND METHOD
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 8000 S. FEDERAL WAY |
| BOISE, IDAHO 83707 |
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| BERKELEY LAW & TECHNOLOGY GROUP LLP |
| 17933 NW EVERGREEN PARKWAY |
| SUITE 250 |
| BEAVERTON, OR 97006 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1940 DUKE STREET |
| SUITE 200 |
| ALEXANDRIA, VIRGINIA 22314 |
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| STEVE STEGER |
| 55 W. MONROE STREET |
| CHICAGO, IL 60603 |
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