Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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17829811
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Filing Dt:
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06/01/2022
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Publication #:
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Pub Dt:
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12/07/2023
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Inventors:
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Alexander IVRII, Jason Raymond BAUMGARTNER, Robert Lowell KANZELMAN et al
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Title:
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EQUIVALENCE CHECKING OF SYNTHESIZED LOGIC DESIGNS USING GENERATED SYNTHESIS HISTORY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NEW ORCHARD ROAD |
| ARMONK, NEW YORK 10504 |
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| IBM CORPORATION - IP LAW DEPARTMENT - IL |
| 13231 CHAMPION FOREST DRIVE |
| SUITE 410 |
| HOUSTON, TX 77069 |
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