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05598244
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05598252
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Title:
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Patent #:
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Issue Dt:
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07/10/1979
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Application #:
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05775419
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Filing Dt:
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03/07/1977
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Title:
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MULTIPLEXING
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Patent #:
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Issue Dt:
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03/27/1984
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Application #:
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06136503
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Filing Dt:
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04/03/1980
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Title:
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MODEM CIRCUITRY
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Patent #:
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Issue Dt:
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08/03/1982
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Application #:
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06136754
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Filing Dt:
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04/03/1980
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Title:
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MODEM CIRCUITRY
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Patent #:
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Issue Dt:
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01/26/1982
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Application #:
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06136919
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Filing Dt:
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04/03/1980
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Title:
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MODEM CIRCUITRY
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Patent #:
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Issue Dt:
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08/10/1982
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Application #:
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06136921
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Filing Dt:
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04/03/1980
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Title:
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TIME RECOVERY CIRCUITRY IN A MODEM RECEIVER
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Patent #:
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Issue Dt:
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12/28/1982
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Application #:
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06188536
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Filing Dt:
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09/18/1980
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Title:
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DIGITAL FILTER WITH SCALED TAP COEFFICIENTS
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Patent #:
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Issue Dt:
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01/11/1983
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Application #:
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06188547
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Filing Dt:
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09/18/1980
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Title:
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PROGRAMMABLE DIGITAL DETECTOR FOR THE DEMODULATION OF ANGLE MODULATED ELECTRICAL SIGNALS
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Patent #:
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Issue Dt:
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01/18/1983
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Application #:
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06188548
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Filing Dt:
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09/18/1980
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Title:
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LINEAR PHASE DIGITAL FILTER
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Patent #:
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Issue Dt:
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11/09/1982
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Application #:
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06228880
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Filing Dt:
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01/22/1981
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Title:
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DIGITAL MODEM TRANSMITTER
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Patent #:
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Issue Dt:
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01/22/1985
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Application #:
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06311743
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Filing Dt:
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10/15/1981
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Title:
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MULTIPROCESSOR/MULTIMEMORY CONTROL SYSTEM
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Patent #:
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Issue Dt:
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07/24/1984
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Application #:
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06322955
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Filing Dt:
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11/19/1981
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Title:
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DO LOOP CIRCUIT
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Patent #:
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Issue Dt:
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08/27/1985
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Application #:
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06352207
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Filing Dt:
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02/25/1982
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Title:
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SIGNAL STRUCTURES WITH DATA ENCODING/DECODING FOR QCM MODULATIONS
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Patent #:
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Issue Dt:
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01/07/1986
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Application #:
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06358450
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Filing Dt:
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03/15/1982
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Title:
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FREQUENCY SYNTHESIZER AND DIGITAL PHASE LOCK LOOP
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Patent #:
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Issue Dt:
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12/31/1985
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Application #:
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06439740
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Filing Dt:
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11/08/1982
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Title:
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SYMBOL CODING APPARATUS
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|
Patent #:
|
|
Issue Dt:
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01/15/1985
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Application #:
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06455306
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Filing Dt:
|
01/03/1983
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Title:
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MODEM END OF MESSAGE DETECTOR
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|
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Patent #:
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Issue Dt:
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11/12/1985
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Application #:
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06479226
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Filing Dt:
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03/28/1983
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Title:
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HIGH SPEED DRIVE CIRCUIT
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Patent #:
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Issue Dt:
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06/24/1986
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Application #:
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06485069
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Filing Dt:
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04/14/1983
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Title:
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BLOCK CODED MODULATION SYSTEM
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Patent #:
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Issue Dt:
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09/09/1986
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Application #:
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06493901
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Filing Dt:
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05/12/1983
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Title:
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HIGH SPEED FULLY PRECHARGED PROGRAMMABLE LOGIC ARRAY
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|
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Patent #:
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Issue Dt:
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06/19/1984
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Application #:
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06503577
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Filing Dt:
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06/13/1983
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Title:
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DUAL PROCESSOR DIGITAL MODEM APPARATUS
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|
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Patent #:
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Issue Dt:
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06/24/1986
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Application #:
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06510102
|
Filing Dt:
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07/01/1983
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Title:
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TWO-PASS MULTIPLIER-ACCUMULATOR CIRCUIT
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|
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Patent #:
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Issue Dt:
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04/30/1985
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Application #:
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06519753
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Filing Dt:
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08/02/1983
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Title:
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MEANS AND METHOD FOR REDUCTION OF PHASE JITTER
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|
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Patent #:
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|
Issue Dt:
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10/13/1987
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Application #:
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06577044
|
Filing Dt:
|
02/06/1984
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Title:
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CODED MODULATION SYSTEM
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|
|
Patent #:
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|
Issue Dt:
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04/29/1986
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Application #:
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06577045
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Filing Dt:
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02/06/1984
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Title:
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SOURCE CODED MODULATION SYSTEM
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|
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Patent #:
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|
Issue Dt:
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12/16/1986
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Application #:
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06584235
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Filing Dt:
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02/27/1984
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Title:
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DATA TRANSMISSION WITH BLOCK CODING
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|
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Patent #:
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Issue Dt:
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07/05/1988
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Application #:
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06587386
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Filing Dt:
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03/08/1984
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Title:
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ADAPTIVE COMMUNICATION RATE MODEM
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Patent #:
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Issue Dt:
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07/22/1986
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Application #:
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06603174
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Filing Dt:
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04/23/1984
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Title:
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LOCAL AREA DATA COMMUNICATION NETWORK
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Patent #:
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Issue Dt:
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12/31/1985
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Application #:
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06617151
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Filing Dt:
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06/05/1984
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Title:
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DATA COMPRESSION
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Patent #:
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Issue Dt:
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12/24/1985
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Application #:
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06617241
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Filing Dt:
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06/05/1984
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Title:
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DATA COMPRESSION
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Patent #:
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Issue Dt:
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04/29/1986
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Application #:
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06617974
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Filing Dt:
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06/06/1984
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Title:
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MEANS AND METHOD FOR DATA TRANSMISSION ON WIRED CHANNELS
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|
|
Patent #:
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Issue Dt:
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09/12/1989
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Application #:
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06621127
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Filing Dt:
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06/15/1984
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Title:
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SIGNAL STRUCTURES FOR DOUBLE SIDE BAND-QUADRATURE CARRIER MODULATION
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|
|
Patent #:
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Issue Dt:
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12/23/1986
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Application #:
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06687205
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Filing Dt:
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12/28/1984
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Title:
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CODED MODULATION SYSTEM WITH FEEDBACK
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|
|
Patent #:
|
|
Issue Dt:
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12/15/1987
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Application #:
|
06727398
|
Filing Dt:
|
04/25/1985
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Title:
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MULTIDIMENSIONAL, CONVOLUTIONALLY CODED COMMUNICATION SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/1987
|
Application #:
|
06746538
|
Filing Dt:
|
06/19/1985
|
Title:
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CODED MODULATION SYSTEM WITH A SIMPLIFIED DECODER CAPABLE OF REDUCING THE EFFECTS OF CHANNEL DISTORTION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/1987
|
Application #:
|
06753182
|
Filing Dt:
|
07/09/1985
|
Title:
|
FRAME SYNCHRONIZATION IN TRELLIS-CODED COMMUNICATION SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1987
|
Application #:
|
06772223
|
Filing Dt:
|
09/03/1985
|
Title:
|
CMOS INPUT BUFFER ACCEPTING TTL LEVEL INPUTS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/1987
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Application #:
|
06776847
|
Filing Dt:
|
09/17/1985
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Title:
|
BACKUP POWER SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/1989
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Application #:
|
06800529
|
Filing Dt:
|
11/21/1985
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Title:
|
CODED MODULATION SYSTEM USING INTERLEAVING FOR DECISION-FEEDBACK EQUALIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/1988
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Application #:
|
06819709
|
Filing Dt:
|
01/17/1986
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Title:
|
MEANS AND METHOD FOR BLOCK ENCODING DETECTION AND DECODING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/1990
|
Application #:
|
06828397
|
Filing Dt:
|
02/11/1986
|
Title:
|
SIMPLIFIED DECODING OF LATTICES AND CODES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/1988
|
Application #:
|
06839706
|
Filing Dt:
|
03/12/1986
|
Title:
|
TRANSITION DETECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/1988
|
Application #:
|
06851253
|
Filing Dt:
|
04/14/1986
|
Title:
|
NETWORK COLLISION DETECTION AND AVOIDANCE APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/1988
|
Application #:
|
06872594
|
Filing Dt:
|
06/10/1986
|
Title:
|
BLOCK CODING INTO 24 COORDINATES AND DETECTION OF TRANSMITTED SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/05/1988
|
Application #:
|
06911664
|
Filing Dt:
|
09/25/1986
|
Title:
|
CODED MODULATION SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/1989
|
Application #:
|
07035505
|
Filing Dt:
|
04/07/1987
|
Title:
|
NETWORKING CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/1990
|
Application #:
|
07062497
|
Filing Dt:
|
06/12/1987
|
Title:
|
SIGNAL CONSTELLATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/1989
|
Application #:
|
07069250
|
Filing Dt:
|
07/02/1987
|
Title:
|
ECHO CANCELLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/1989
|
Application #:
|
07123941
|
Filing Dt:
|
11/23/1987
|
Title:
|
FULL DUPLEX MODEM SYSTEM FOR DIFFERING DATA BIT RATES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/1990
|
Application #:
|
07144756
|
Filing Dt:
|
01/19/1988
|
Title:
|
NETWORK DATA FLOW CONTROL TECHNIQUE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/1990
|
Application #:
|
07162820
|
Filing Dt:
|
03/01/1988
|
Title:
|
INTERCONNECTION NETWORK FOR MULTIPLE PROCESSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/1990
|
Application #:
|
07181203
|
Filing Dt:
|
04/13/1988
|
Title:
|
SIGNAL CONSTELLATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/1990
|
Application #:
|
07192952
|
Filing Dt:
|
05/12/1988
|
Title:
|
MULTIMODE MODEM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/1991
|
Application #:
|
07193391
|
Filing Dt:
|
05/12/1988
|
Title:
|
COMMUNICATION SYSTEM FOR SENDING AN IDENTICAL ROUTING TREE TO ALL C0NNECTED NODES TO ESTABLISH A SHORTEST ROUTE AND TRANSMITTING MASSAGES THEREAFTER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/1990
|
Application #:
|
07262108
|
Filing Dt:
|
10/19/1988
|
Title:
|
LINE QUALITY TESTING APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/1991
|
Application #:
|
07279370
|
Filing Dt:
|
12/02/1988
|
Title:
|
ADAPTIVE RATE CONTROL FOR ECHO CANCELLING MODEM
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/1991
|
Application #:
|
07288788
|
Filing Dt:
|
12/22/1988
|
Title:
|
DISTRIBUTED SWITCHING ARCHITECTURE FOR COMMUNICATION MODULE REDUNDANCY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/1991
|
Application #:
|
07333992
|
Filing Dt:
|
04/05/1989
|
Title:
|
FAST TRAINING ECHO CANCELLER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/1991
|
Application #:
|
07341647
|
Filing Dt:
|
04/21/1989
|
Title:
|
SYNCHRONIZING CONTINUOUS BIT STREAM ORIENTED TERMINALS IN A COMMUNICATIONS NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/1991
|
Application #:
|
07351199
|
Filing Dt:
|
05/12/1989
|
Title:
|
LINE PROBING MODEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/1992
|
Application #:
|
07402958
|
Filing Dt:
|
08/31/1989
|
Title:
|
DIGITAL SPEECH CODER HAVING IMPROVED LONG TERM LAG PARAMETER DETERMINATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/1990
|
Application #:
|
07420662
|
Filing Dt:
|
10/10/1989
|
Title:
|
NETWORKING CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/1992
|
Application #:
|
07421610
|
Filing Dt:
|
10/13/1989
|
Title:
|
TRELLIS SHAPING FOR MODULATION SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/1991
|
Application #:
|
07431712
|
Filing Dt:
|
11/02/1989
|
Title:
|
SAMPLE RATE CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/1992
|
Application #:
|
07452247
|
Filing Dt:
|
12/18/1989
|
Title:
|
DUAL TONE MULTI-FREQUENCY DETECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/1991
|
Application #:
|
07455119
|
Filing Dt:
|
12/22/1989
|
Title:
|
MODEM FOR DIGITAL COMMUNICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/1992
|
Application #:
|
07458769
|
Filing Dt:
|
12/29/1989
|
Title:
|
TRANSMITTING ENCODED DATA ON UNRELIABLE NETWORKS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/1993
|
Application #:
|
07464292
|
Filing Dt:
|
01/12/1990
|
Title:
|
CIRCUITRY FOR INTERFACING TELECOMMUNICATIONS EQUIPMENT TO A COMMUNICATION CHANNEL
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/1991
|
Application #:
|
07471700
|
Filing Dt:
|
01/29/1990
|
Title:
|
DIGITAL FILTERING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1993
|
Application #:
|
07478068
|
Filing Dt:
|
02/07/1990
|
Title:
|
PROCESSOR INTERFACE CIRCUITRY FOR EFFECTING DATA TRANSFERS BETWEEN PROCESSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/1991
|
Application #:
|
07490861
|
Filing Dt:
|
03/09/1990
|
Title:
|
FRACTIONAL FREQUENCY DIVIDER FOR PROVIDING A SYMMETRICAL OUTPUT SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/1993
|
Application #:
|
07505418
|
Filing Dt:
|
04/06/1990
|
Title:
|
TRELLIS PRECODING FOR FRACTIONAL BITS/BAUD
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/1991
|
Application #:
|
07515303
|
Filing Dt:
|
04/27/1990
|
Title:
|
COMPACT EXPANDABLE FOLDED FIRST-IN-FIRST-OUT QUEUE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1992
|
Application #:
|
07523626
|
Filing Dt:
|
05/15/1990
|
Title:
|
DCD WITH REPROGRAMMING INSTRUCTIONS CONTAINED IN REMOVABLE CARTRIDGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/1991
|
Application #:
|
07550217
|
Filing Dt:
|
07/10/1990
|
Title:
|
PARTIAL RESPONSE CHANNEL SIGNALING SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/1993
|
Application #:
|
07551712
|
Filing Dt:
|
07/11/1990
|
Title:
|
METHOD FOR PRIORITIZING, SELECTIVELY DISCARDING, AND MULTIPLEXING DIFFERING TRAFFIC TYPE FAST PACKETS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/1992
|
Application #:
|
07561623
|
Filing Dt:
|
08/02/1990
|
Title:
|
DYNAMIC ENCODING RATE CONTROL MINIMIZES TRAFFIC CONGESTION IN A PACKET NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/1994
|
Application #:
|
07570413
|
Filing Dt:
|
08/21/1990
|
Title:
|
LATTICE AND TRELLIS-CODED QUANTIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/1992
|
Application #:
|
07580408
|
Filing Dt:
|
09/10/1990
|
Title:
|
METHOD OF MAKING PRINTED CIRCUIT BOARD ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1993
|
Application #:
|
07638297
|
Filing Dt:
|
01/04/1991
|
Title:
|
NETWORK MANAGEMENT INTERFACE WITH INTERNAL DSD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/1993
|
Application #:
|
07669831
|
Filing Dt:
|
03/15/1991
|
Title:
|
SPEECH CODER AND METHOD HAVING SPECTRAL INTERPOLATION AND FAST CODEBOOK SEARCH
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/1992
|
Application #:
|
07677056
|
Filing Dt:
|
03/29/1991
|
Title:
|
VOLTAGE CONTROLLED OSCILLATOR WITH CONTROLLED LOAD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/1992
|
Application #:
|
07677057
|
Filing Dt:
|
03/29/1991
|
Title:
|
VOLTAGE CONTROLLED OSCILLATOR HAVING 50% DUTY CYCLE CLOCK
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Patent #:
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Issue Dt:
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05/25/1993
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Application #:
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07685571
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Filing Dt:
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04/15/1991
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Title:
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HIGH SPEED TWO WIRE MODEM
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Patent #:
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Issue Dt:
|
09/14/1993
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Application #:
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07693170
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Filing Dt:
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04/29/1991
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Title:
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VOCABULARY MEMORY ALLOCATION FOR ADAPTIVE DATA COMPRESSION OF FRAME-MULTIPLEXED TRAFFIC
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Patent #:
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Issue Dt:
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11/30/1993
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Application #:
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07698010
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Filing Dt:
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05/09/1991
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Title:
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DEVICE AND METHOD FOR ASYNCHRONOUS CYCLIC REDUNDANCY CHECKING FOR DIGITAL RECEIVERS
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Patent #:
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Issue Dt:
|
11/09/1993
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Application #:
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07705861
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Filing Dt:
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05/28/1991
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Title:
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CIRCUIT AND METHOD OF SWITCHING BETWEEN REDUNDANT CLOCKS FOR A PHASE LOCK LOOP
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Patent #:
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Issue Dt:
|
12/07/1993
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Application #:
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07726065
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Filing Dt:
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07/05/1991
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Title:
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DEVICE AND METHOD FOR IMPLEMENTING QUEUEING DISCIPLINES AT HIGH SPEEDS
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Patent #:
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Issue Dt:
|
11/16/1993
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Application #:
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07726069
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Filing Dt:
|
07/05/1991
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Title:
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DEVICE AND METHOD OF INTERLEAVING FOR A TRELLIS PRECODING SYSTEM
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Patent #:
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Issue Dt:
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03/22/1994
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Application #:
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07736859
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Filing Dt:
|
07/29/1991
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Title:
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DEVICE AND METHOD FOR ON-LINE ADAPTIVE SELECTION OF BAUD RATE AND CARRIER FREQUENCY
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Patent #:
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Issue Dt:
|
09/28/1993
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Application #:
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07737874
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Filing Dt:
|
07/30/1991
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Title:
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DEVICE AND METHOD FOR COMBINING PRECODING WITH SYMBOL-RATE SPECTRAL SHAPING
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Patent #:
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Issue Dt:
|
03/30/1993
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Application #:
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07756741
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Filing Dt:
|
09/09/1991
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Title:
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FIRST AND SECOND DIGITAL RATE CONVERTER SYNCHRONIZATION DEVICE AND METHOD
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Patent #:
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Issue Dt:
|
06/07/1994
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Application #:
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07791702
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Filing Dt:
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11/14/1991
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Title:
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DEVICE AND METHOD FOR LINEAR LISTENER ECHO CANCELLATION
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Patent #:
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Issue Dt:
|
10/12/1993
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Application #:
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07797881
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Filing Dt:
|
11/26/1991
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Title:
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PRIORITIZATION METHOD AND DEVICE FOR SPEECH FRAMES CODED BY A LINEAR PREDICTIVE CODER
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Patent #:
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Issue Dt:
|
10/27/1992
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Application #:
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07823586
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Filing Dt:
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01/16/1992
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Title:
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TRELLIS PRECODING FOR MODULATION SYSTEMS
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Patent #:
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Issue Dt:
|
12/07/1993
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Application #:
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07890043
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Filing Dt:
|
05/27/1992
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Title:
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DEVICE AND METHOD FOR AUTOMATICALLY ADJUSTING A PHASE-LOCKED LOOP
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Patent #:
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Issue Dt:
|
02/08/1994
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Application #:
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07930943
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Filing Dt:
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08/17/1992
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Title:
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PHASE LOCK LOOP CHARGE PUMP WITH SYMMETRICAL CHARGE AND DISCHARGE CURRENTS
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Patent #:
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Issue Dt:
|
12/14/1993
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Application #:
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07951964
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Filing Dt:
|
09/28/1992
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Title:
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CIRCUITRY FOR INTERFACING TELECOMMUNICATIONS EQUIPMENT TO A COMMUNICATION CHANNEL
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Patent #:
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Issue Dt:
|
11/16/1993
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Application #:
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07963009
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Filing Dt:
|
10/19/1992
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Title:
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ARBITRATION AMONG MULTIPLE USERS OF A SHARED RESOURCE
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Patent #:
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Issue Dt:
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05/18/1993
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Application #:
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07966626
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Filing Dt:
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10/26/1992
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Title:
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POWER ON RESET CIRCUIT HAVING HYSTERESIS INVERTERS
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