|
Total properties:
70
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/1990
|
Application #:
|
07020556
|
Filing Dt:
|
03/02/1987
|
|
Title:
|
PROGRAMMABLE INTEGRATED CIRCUIT LOGIC ARRAY DEVICE HAVING IMPROVED MICROPROCESSOR CONNECTABILITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/1989
|
Application #:
|
07190530
|
Filing Dt:
|
05/05/1988
|
|
Title:
|
MULTIFUNCTION FLIP-FLOP-TYPE CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/1990
|
Application #:
|
07190571
|
Filing Dt:
|
05/05/1988
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICE WITH PROGRAMMABLE WORD LINE CONNECTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/1989
|
Application #:
|
07190663
|
Filing Dt:
|
05/05/1988
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICE WITH ARRAY BLOCKS CONNECTED VIA PROGRAMMABLE INTERCONNECT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/1990
|
Application #:
|
07218556
|
Filing Dt:
|
07/13/1988
|
|
Title:
|
BIT LINE SENSE AMPLIFIER FOR PROGRAMMABLE LOGIC DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/1992
|
Application #:
|
07222565
|
Filing Dt:
|
07/21/1988
|
|
Title:
|
PROGRAMMABLE INTERFACE FOR COMPUTER SYSTEM PERIPHERAL CIRCUIT CARD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/1990
|
Application #:
|
07222832
|
Filing Dt:
|
07/22/1988
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICES WITH SPARE CIRCUITS FOR USE IN REPLACING DEFECTIVE CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/1990
|
Application #:
|
07229852
|
Filing Dt:
|
08/08/1988
|
|
Title:
|
METHOD AND APPARATUS FOR PROGRAMMING AND VERIFYING PROGRAMMABLE ELEMENTS IN PROGRAMMABLE DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/1990
|
Application #:
|
07407411
|
Filing Dt:
|
09/14/1989
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICE WITH ARRAY BLOCKS WITH PROGRAMMABLE CLOCKING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/1991
|
Application #:
|
07444993
|
Filing Dt:
|
12/04/1989
|
|
Title:
|
INTEGRATED CIRCUITS WITH REDUCED SWITCHING NOISE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/1992
|
Application #:
|
07587075
|
Filing Dt:
|
09/24/1990
|
|
Title:
|
METHODS AND APPARATUS FOR REDUCING COUPLING NOISE IN PROGRAMMABLE LOGIC DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/1991
|
Application #:
|
07591363
|
Filing Dt:
|
10/01/1990
|
|
Title:
|
REFERENCE VOLTAGE GENERATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1992
|
Application #:
|
07596764
|
Filing Dt:
|
10/12/1990
|
|
Title:
|
SENSE AMPLIFIER WITH INCREASED SPEED AND REDUCED POWER CONSUMPTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1992
|
Application #:
|
07611974
|
Filing Dt:
|
11/13/1990
|
|
Title:
|
METHODS AND APPARATUS FOR FACILITATIANG SCAN TESTING OF ASYNCHRONOUS LOGIC CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/1992
|
Application #:
|
07622615
|
Filing Dt:
|
12/05/1990
|
|
Title:
|
APPARATUS AND METHOD FOR MEASURING GATE DELAYS IN INTEGRATED CIRCUIT WAFERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/1992
|
Application #:
|
07688252
|
Filing Dt:
|
04/22/1991
|
|
Title:
|
REGISTERED LOGIC MACROCELL WITH PRODUCT TERM ALLOCATION AND ADJACENT PRODUCT TERM STEALING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1993
|
Application #:
|
07691640
|
Filing Dt:
|
04/25/1991
|
|
Title:
|
HIGH-DENSITY ERASABLE PROGRAMMABLE LOGIC DEVICE ARCHITECTURE USING MULTIPLEXER INTERCONNECTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/1993
|
Application #:
|
07698084
|
Filing Dt:
|
05/10/1991
|
|
Title:
|
COMPLEMENTARY LOW POWER NON-VOLATILE RECONFIGURABLE EECELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1992
|
Application #:
|
07701686
|
Filing Dt:
|
05/10/1991
|
|
Title:
|
ZERO POWER, HIGH IMPEDANCE TTL-TO-CMOS CONVERTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/1994
|
Application #:
|
07702001
|
Filing Dt:
|
05/17/1991
|
|
Title:
|
METHODS FOR ALLOCATING CIRCUIT ELEMENTS BETWEEN CIRCUIT GROUPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/1993
|
Application #:
|
07708241
|
Filing Dt:
|
05/31/1991
|
|
Title:
|
METHOD OF PROGRAMMING FLOATING GATE MEMORY DEVICES AIDED BY POTENTIAL APPLIED TO READ CHANNEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1993
|
Application #:
|
07754017
|
Filing Dt:
|
09/03/1991
|
|
Title:
|
PROGRAMMABLE LOGIC ELEMENT INTERCONNECTIONS FOR PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/1993
|
Application #:
|
07759944
|
Filing Dt:
|
09/17/1991
|
|
Title:
|
METHOD FOR PROGRAMMING PROGRAMMABLE ELEMENTS IN PROGRAMMABLE DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/1992
|
Application #:
|
07788606
|
Filing Dt:
|
11/06/1991
|
|
Title:
|
METHOD AND APPARATUS FOR ERASING AN ARRAY OF ELECTRICALLY ERASABLE EPROM CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/1993
|
Application #:
|
07788607
|
Filing Dt:
|
11/06/1991
|
|
Title:
|
METHOD AND APPARATUS FOR PREVENTING OVERERASURE IN A FLASH CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/1992
|
Application #:
|
07808593
|
Filing Dt:
|
12/17/1991
|
|
Title:
|
SENSE AMPLIFIER FOR PROGRAMMABLE LOGIC DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/1993
|
Application #:
|
07846915
|
Filing Dt:
|
03/06/1992
|
|
Title:
|
PROGRAMMABLE TRANSFER-DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/1994
|
Application #:
|
07868174
|
Filing Dt:
|
04/14/1992
|
|
Title:
|
EEPROM-BACKED FIFO MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/1993
|
Application #:
|
07879908
|
Filing Dt:
|
05/08/1992
|
|
Title:
|
REGISTERED LOGIC MACROCELL WITH PRODUCT TERM ALLOCATION AND ADJACENT PRODUCT TERM STEALING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1993
|
Application #:
|
07880752
|
Filing Dt:
|
05/08/1992
|
|
Title:
|
LOOK UP TABLE IMPLEMENTATION OF FAST CARRY FOR ADDERS AND COUNTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1993
|
Application #:
|
07880888
|
Filing Dt:
|
05/08/1992
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUITS WITH CASCADE CONNECTIONS BETWEEN LOGIC MODULES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1993
|
Application #:
|
07880908
|
Filing Dt:
|
05/08/1992
|
|
Title:
|
METHODS AND APPARATUS FOR PROGRAMMING CELLULAR PROGRAMMABLE LOGIC INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1993
|
Application #:
|
07880942
|
Filing Dt:
|
05/08/1992
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY HAVING LOCAL AND LONG DISTANCE CONDUCTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/1994
|
Application #:
|
07947729
|
Filing Dt:
|
09/21/1992
|
|
Title:
|
APPARATUS FOR FACILITING SCAN TESTING OF ASYNCHRONOUS LOGIC CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/1995
|
Application #:
|
07979003
|
Filing Dt:
|
11/19/1992
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICES WITH SPARE CIRCUITS FOR REPLACEMENT OF DEFECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/06/1994
|
Application #:
|
08038787
|
Filing Dt:
|
03/29/1993
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICE HAVING MULTIPLEXERS AND DEMULTIPLEXERS RANDOMLY CONNECTED TO GLOBAL CONDUCTORS FOR INTERCONNECTIONS BETWEEN LOGIC ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/1994
|
Application #:
|
08039927
|
Filing Dt:
|
03/29/1993
|
|
Title:
|
MACROCELL WITH FLEXIBLE PRODUCT TERM ALLOCATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/1994
|
Application #:
|
08039944
|
Filing Dt:
|
03/29/1993
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICE WITH MULTIPLEXER-BASED PROGRAMMABLE INTERCONNECTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1993
|
Application #:
|
08043146
|
Filing Dt:
|
03/31/1993
|
|
Title:
|
HIGH-DENSITY ERASABLE PROGRAMMABLE LOGIC DEVICE ARCHITECTURE USING MULTIPLEXER INTERCONNECTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/1995
|
Application #:
|
08123435
|
Filing Dt:
|
09/17/1993
|
|
Title:
|
HIGH-DENSITY ERASABLE PROGRAMMABLE LOGIC DEVICE ARCHITECTURE USING MULTIPLEXER INTERCONNECTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/1996
|
Application #:
|
08156260
|
Filing Dt:
|
11/22/1993
|
|
Title:
|
MULTIPLEXER STRUCTURES FOR USE IN MAKING CONTROLLABLE INTERCONNECTIONS IN INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/1996
|
Application #:
|
08159189
|
Filing Dt:
|
11/30/1993
|
|
Title:
|
EPROM-BASED CROSSBAR SWITCH WITH ZERO STANDBY POWER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/02/1996
|
Application #:
|
08166300
|
Filing Dt:
|
12/13/1993
|
|
Title:
|
LOOK UP TABLE IMPLEMENTAION OF FAST CARRY ARITHMETIC AND EXCLUSIVE-OR OPERATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/1994
|
Application #:
|
08199620
|
Filing Dt:
|
02/22/1994
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICE WITH REDUNDANT CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/1996
|
Application #:
|
08207012
|
Filing Dt:
|
03/04/1994
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICE WITH LOGIC BLOCK OUTPUTS COUPLED TO ADJACENT LOGIC BLOCK OUTPUT MULTIPLEXERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/1996
|
Application #:
|
08331964
|
Filing Dt:
|
10/31/1994
|
|
Title:
|
HIGH-DENSITY ERASABLE PROGRAMMABLE LOGIC DEVICE ARCHITECTURE USING MULTIPLEXER INTERCONNECTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/1996
|
Application #:
|
08356516
|
Filing Dt:
|
12/15/1994
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY WITH LOCAL AND GLOBAL CONDUCTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/1996
|
Application #:
|
08358210
|
Filing Dt:
|
12/16/1994
|
|
Title:
|
SENSE AMPLIFIER WITH FEEDBACK AND STABILIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/1996
|
Application #:
|
08388300
|
Filing Dt:
|
02/14/1995
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY DEVICE WITH GROUPED LOGIC REGIONS AND THREE TYPES OF CONDUCTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/1996
|
Application #:
|
08416296
|
Filing Dt:
|
04/04/1995
|
|
Title:
|
PROGRAMMABLE LOGIC DEVICES WITH SPARE CIRCUITS FOR REPLACEMENT OF DEFECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/1997
|
Application #:
|
08442795
|
Filing Dt:
|
05/17/1995
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUIT DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/1997
|
Application #:
|
08442796
|
Filing Dt:
|
05/17/1995
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUITS WITH INTERCONNECTION CONDUCTORS OF OVERLAPPING EXTENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/1996
|
Application #:
|
08442801
|
Filing Dt:
|
05/17/1995
|
|
Title:
|
TECHNIQUES FOR PROGRAMMING PROGRAMMABLE LOGIC ARRAY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/1996
|
Application #:
|
08442802
|
Filing Dt:
|
05/17/1995
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUITS WITH BLOCKS OF LOGIC REGIONS GROUPED INTO SUPER-BLOCKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/1996
|
Application #:
|
08442832
|
Filing Dt:
|
05/17/1995
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY DEVICES WITH INTERCONNECT LINES OF VARIOUS LENGTHS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/1997
|
Application #:
|
08443119
|
Filing Dt:
|
05/17/1995
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUITS WITH SEGMENTED, SELECTIVELY CONNECTABLE, LONG INTERCONNECTION CONDUCTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/1997
|
Application #:
|
08508401
|
Filing Dt:
|
07/31/1995
|
|
Title:
|
METHODS FOR PARTITIONING CIRCUITS IN ORDER TO ALLOCATE ELEMENTS AMONG MULTIPLE CIRCUIT GROUPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/1996
|
Application #:
|
08517596
|
Filing Dt:
|
08/22/1995
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUIT DEVICES WITH REGIONS OF ENHANCED INTERCONNECTIVITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/1996
|
Application #:
|
08518802
|
Filing Dt:
|
08/24/1995
|
|
Title:
|
METHOD OF FABRICATING SELF-ALIGNED PLANARIZED WELL STRUCTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/1997
|
Application #:
|
08522554
|
Filing Dt:
|
09/01/1995
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUIT DEVICES WITH FLEXIBLE CARRY CHAINS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/1997
|
Application #:
|
08545084
|
Filing Dt:
|
10/19/1995
|
|
Title:
|
ROUTING CONNECTIONS FOR PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/1997
|
Application #:
|
08545437
|
Filing Dt:
|
10/19/1995
|
|
Title:
|
MEANS AND APPARATUS TO MINIMIZE THE EFFECTS OF SILICON PROCESSING DEFECTS IN PROGRAMMABLE LOGIC DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/1997
|
Application #:
|
08555106
|
Filing Dt:
|
11/08/1995
|
|
Title:
|
RANDOM ACCESS MEMORY BLOCK CIRCUITRY FOR PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUIT DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/1996
|
Application #:
|
08555110
|
Filing Dt:
|
11/08/1995
|
|
Title:
|
APPARATUS FOR SERIAL READING AND WRITING OF RANDOM ACCESS MEMORY ARRAYS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/1997
|
Application #:
|
08570117
|
Filing Dt:
|
12/11/1995
|
|
Title:
|
PROGRAMMING PROGRAMMABLE TRANSISTOR DEVICES USING STATE MACHINES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/1997
|
Application #:
|
08574351
|
Filing Dt:
|
12/18/1995
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUITS WITH CARRY AND/OR CASCADE RINGS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/1997
|
Application #:
|
08605445
|
Filing Dt:
|
02/26/1996
|
|
Title:
|
HIGH-DENSITY ERASABLE PROGRAMMABLE LOGIC DEVICE ARCHITECTURE USING MULTIPLEXER INTERCONNECTIONS, AND REGISTERED MACROCELL WITH PRODUCT TERM ALLOCATION AND ADJACENT PRODUCT TERM STEALING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/1997
|
Application #:
|
08626513
|
Filing Dt:
|
04/02/1996
|
|
Title:
|
PROGRAMMABLE LOGIC ARRAY DEVICE WITH GROUPED LOGIC REGIONS AND THREE TYPES OF CONDUCTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/1997
|
Application #:
|
08668265
|
Filing Dt:
|
06/20/1996
|
|
Title:
|
LOOP FILTER LEVEL DETECTION CIRCUIT AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/1997
|
Application #:
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08747194
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Filing Dt:
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11/12/1996
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Title:
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TECHNIOUES FOR PROGRAMMING PROGRAMMABLE LOGIC ARRAY DEVICES
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