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Total properties:
70
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Patent #:
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Issue Dt:
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01/31/1995
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Application #:
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07959711
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Filing Dt:
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10/13/1992
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Title:
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REGISTER SUBSTITUTION DUEING EXCEPTION PROCESSING
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Patent #:
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Issue Dt:
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01/18/1994
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Application #:
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07959712
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Filing Dt:
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10/13/1992
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Title:
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DATA MEMORY AND METHOD OF READING A DATA MEMORY
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Patent #:
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Issue Dt:
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11/07/1995
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Application #:
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08357959
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Filing Dt:
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12/16/1994
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Title:
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SUBASSEMBLY MEANS
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Patent #:
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Issue Dt:
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06/30/1998
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Application #:
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08715595
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Filing Dt:
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09/18/1996
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Title:
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DIGITAL TO ANALOGUE CONVERTER COMPRISING A CONVERTING CIRCUIT AND A REFERENCE CIRCUIT BOTH BEING FORMED IN A SINGLE INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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08727213
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Filing Dt:
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10/08/1996
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Title:
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INPUT OPERAND SIZE AND HI/LOW WORD SELECTION CONTROL IN DATA PROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08727225
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Filing Dt:
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10/08/1996
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Title:
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DATA PROCESSING CONDITION CODE FLAGS
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Patent #:
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Issue Dt:
|
03/09/1999
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Application #:
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08727312
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Filing Dt:
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10/08/1996
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Title:
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DATA PROCESSING SYSTEM REGISTER CONTROL
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Patent #:
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Issue Dt:
|
03/09/1999
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Application #:
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08727338
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Filing Dt:
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10/08/1996
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Title:
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NON-INSTRUCTION BASED REGISTER ADDRESSING IN A DATA PROCESSING APPARATUS
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Patent #:
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Issue Dt:
|
10/19/1999
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Application #:
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08727777
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Filing Dt:
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10/08/1996
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Title:
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DATA PROCESSING APPARATUS REGISTERS
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Patent #:
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|
Issue Dt:
|
07/21/1998
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Application #:
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08727785
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Filing Dt:
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10/08/1996
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Title:
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METHOD AND APPARATUS FOR DIGITAL SIGNAL PROCESSING FOR INTEGRATED CIRCUIT ARCHITECTURE
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Patent #:
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Issue Dt:
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09/15/1998
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Application #:
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08781051
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Filing Dt:
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01/09/1997
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Title:
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INTEGRATED CIRCUIT TESTING
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Patent #:
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Issue Dt:
|
09/14/1999
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Application #:
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08783287
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Filing Dt:
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01/10/1997
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Title:
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DIGITAL ADDER CIRCUIT
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Patent #:
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Issue Dt:
|
06/29/1999
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Application #:
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08783310
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Filing Dt:
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01/10/1997
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Title:
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DYNAMIC LOGIC PIPELINE CONTROL
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Patent #:
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Issue Dt:
|
03/23/1999
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Application #:
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08788286
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Filing Dt:
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01/24/1997
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Title:
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ASYNCHONOUS DATA PROCESSING APPARATUS
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Patent #:
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Issue Dt:
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06/29/1999
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Application #:
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08804113
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Filing Dt:
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02/20/1997
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Title:
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ROUTING OF CLOCK SIGNALS IN A DATA PROCESSING CIRCUIT WITH A POWER SAVING MODE OF OPERATION
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Patent #:
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Issue Dt:
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08/10/1999
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Application #:
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08824015
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Filing Dt:
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03/21/1997
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Title:
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DATA PROCESSING CIRCUIT AND METHOD OF OPERATION PERFORMING ARITHMETIC PROCESSING ON DATA SIGNALS
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Patent #:
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Issue Dt:
|
05/02/2000
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Application #:
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08828501
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Filing Dt:
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03/31/1997
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Title:
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ASYNCHRONOUS FIRST-IN-FIRST-OUT BUFFER CIRCUIT BURST MODE CONTROL
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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08828938
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Filing Dt:
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03/28/1997
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Title:
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DISPLAY PALETTE PROGRAMMING UTILIZING FRAMES OF DATA WHICH ALSO CONTAIN COLOR PALETTE UPDATING DATA PREVENT DISPLAY DISTORTION OR SPARKLE
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Patent #:
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Issue Dt:
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02/23/1999
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Application #:
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08832091
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Filing Dt:
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04/03/1997
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Title:
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A CACHE CONTROL CIRCUIT HAVING A PSEUDO RANDOM ADDRESS GENERATOR
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Patent #:
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Issue Dt:
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01/25/2000
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Application #:
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08841594
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Filing Dt:
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04/30/1997
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Title:
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DATA PROCESSING APPARATUS AND METHOD FOR GENERATING TIMING SIGNALS FOR A SELF-TIMED CIRCUIT
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Patent #:
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Issue Dt:
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10/05/1999
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Application #:
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08893982
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Filing Dt:
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07/16/1997
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Title:
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DATA PROCESSING APPARATUS AND METHOD FOR PRE-FETCHING AN INSTRUMENT IN TO AN INSTRUMENT CACHE
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Patent #:
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Issue Dt:
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02/01/2000
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Application #:
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08921478
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Filing Dt:
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09/02/1997
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Title:
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A DATA PROCESSING APPARATUS AND METHOD FOR CONTROLLING ACCESS TO A MEMORY HAVING A PLURALITY OF MEMORY LOCATIONS FOR STORING DATA VALUES
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Patent #:
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Issue Dt:
|
12/14/1999
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Application #:
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08932053
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Filing Dt:
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09/17/1997
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Title:
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COPROCESSOR DATA ACCESS CONTROL
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Patent #:
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Issue Dt:
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05/18/1999
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Application #:
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08962641
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Filing Dt:
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11/03/1997
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Title:
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MEMORY BIT LINE OUTPUT BUFFER
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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08962832
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Filing Dt:
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11/03/1997
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Title:
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MEMORY ACCESS REQUEST RESULT PREDICTION PRIOR TO CONFIRM SIGNAL GENERATION
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Patent #:
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Issue Dt:
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06/29/1999
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Application #:
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08962833
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Filing Dt:
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11/03/1997
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Title:
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REGISTER BANK BIT LINES
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Patent #:
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Issue Dt:
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03/28/2000
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Application #:
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08963067
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Filing Dt:
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11/03/1997
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Title:
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VOLTAGE LEVEL SHIFTER
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Patent #:
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Issue Dt:
|
03/07/2000
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Application #:
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09015927
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Filing Dt:
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01/30/1998
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Title:
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MACROCELL FOR DATA PROCESSING CIRCUIT
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Patent #:
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Issue Dt:
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04/18/2000
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Application #:
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09035838
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Filing Dt:
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03/06/1998
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Title:
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APPARATUS AND METHOD FOR IDENTIFYING EXCEPTION ROUTINES INDICATED BY INSTRUCTION ADDRESS ISSUED WITH AN INSTRUCTION FETCH COMMAND
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09078595
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Filing Dt:
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05/14/1998
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Title:
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HANDLING EXCEPTIONS IN A PIPELINED DATA PROCESSING APPARATUS
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Patent #:
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Issue Dt:
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08/22/2000
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Application #:
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09078722
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Filing Dt:
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05/14/1998
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Title:
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DIVISION AND/OR SQUARE ROOT CALCULATING CIRCUIT
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Patent #:
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Issue Dt:
|
09/11/2001
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Application #:
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09080206
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Filing Dt:
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05/18/1998
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Title:
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OPERAND SUPPLY TO AN EXECUTION UNIT
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09084304
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Filing Dt:
|
05/27/1998
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Title:
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AN APPARATUS AND METHOD FOR PROCESSING DATA HAVING A MIXED VECTOR/SCALAR REGISTER FILE
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Patent #:
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Issue Dt:
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06/12/2001
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Application #:
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09084386
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Filing Dt:
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05/27/1998
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Title:
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COPROCESSOR OPCODE DIVISION BY DATA TYPE
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Patent #:
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Issue Dt:
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02/13/2001
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Application #:
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09085752
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Filing Dt:
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05/27/1998
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Title:
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RECIRCULATING REGISTER FILE
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Patent #:
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Issue Dt:
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01/02/2001
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Application #:
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09085756
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Filing Dt:
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05/27/1998
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Title:
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SYSTEM FOR TRANSFERING FORMAT DATA FROM FORMAT REGISTER TO MEMORY WHEREIN FORMAT DATA INDICATING THE DISTRIBUTION OF SINGLE OR DOUBLE PRECISION DATA TYPE IN THE REGISTER BANK
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Patent #:
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Issue Dt:
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08/08/2000
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Application #:
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09096523
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Filing Dt:
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06/12/1998
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Title:
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BIT LINE AND/OR MATCH LINE PARTITIONED CONTENT ADDRESSABLE MEMORY
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09108286
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Filing Dt:
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07/01/1998
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Title:
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APPARATUS AND METHOD FOR IMAGE DATA PROCESSING OF PIXEL DATA IN RASTER LINES
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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09127605
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Filing Dt:
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07/31/1998
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Title:
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PERIPHERAL BUSES FOR INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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10/31/2000
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Application #:
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09136842
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Filing Dt:
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08/20/1998
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Title:
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CONDITIONAL INVERT FUNCTIONS IN PRECHARGED CIRCUITS
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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09136843
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Filing Dt:
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08/20/1998
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Title:
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FLOATING POINT MULTIPLY-ACCUMULATE UNIT
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Patent #:
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Issue Dt:
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12/18/2001
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Application #:
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09143449
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Filing Dt:
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08/28/1998
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Title:
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VECTOR REGISTER ADDRESSING
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Patent #:
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Issue Dt:
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11/14/2000
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Application #:
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09143614
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Filing Dt:
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08/28/1998
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Title:
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ROUND INCREMENT IN AN ADDER CIRCUIT
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Patent #:
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Issue Dt:
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10/16/2001
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Application #:
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09144175
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Filing Dt:
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08/31/1998
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Title:
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HANDLING EXCEPTIONS OCCURING DURING PROCESSING OF VECTOR INSTRUCTIONS
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09144264
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Filing Dt:
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08/31/1998
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Title:
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DATA PROCESSING APPARATUS AND METHOD FOR PERFORMING MULTIPLY-ACCUMULATE OPERATIONS
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Patent #:
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Issue Dt:
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11/06/2001
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Application #:
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09196213
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Filing Dt:
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11/20/1998
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Title:
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DOUBLE/SATURATE/ADD/SATURATE AND DOUBLE/SATURATE/SUBTRACT/SATURATE OPERATIONS IN A DATA PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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01/08/2002
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Application #:
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09196214
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Filing Dt:
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11/20/1998
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Title:
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DATA PROCESSING SYSTEM AND METHOD FOR PERFORMING AN ARITHMETIC OPERATION ON A PLURALITY OF SIGNED DATA VALUES
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Patent #:
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Issue Dt:
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01/07/2003
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Application #:
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09251410
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Filing Dt:
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02/17/1999
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Title:
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CLIPPING DATA VALUES IN A DATA PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09252927
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Filing Dt:
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02/19/1999
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Title:
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MEMORY ADDRESS TRANSLATIONIN A DATA PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09259339
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Filing Dt:
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03/01/1999
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Title:
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DATA PROCESSING SYSTEM AND METHOD FOR GENERATING A STRUCTURED LISTING OF SYMBOLS
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09266892
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Filing Dt:
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03/12/1999
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Title:
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S-R FLIP-FLOP CIRCUIT
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Patent #:
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Issue Dt:
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05/22/2001
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Application #:
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09306408
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Filing Dt:
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05/06/1999
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Title:
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BITMAP FONT DATA STORAGE WITHIN DATA PROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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09/03/2002
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Application #:
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09314020
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Filing Dt:
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05/19/1999
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Title:
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DEBUG MECHANISM FOR DATA PROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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01/29/2002
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Application #:
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09314024
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Filing Dt:
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05/19/1999
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Title:
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EXECUTING MULTIPLE DEBUG INSTRUCTIONS
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09314025
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Filing Dt:
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05/19/1999
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Title:
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EXECUTING DEBUG INSTRUCTIONS
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09332526
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Filing Dt:
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06/14/1999
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Title:
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APPARATUS AND METHOD FOR TESTING MASTER LOGIC UNITS WITHIN A DATA PROCESSING APPARATUS
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Patent #:
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Issue Dt:
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01/09/2001
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Application #:
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09335696
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Filing Dt:
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06/18/1999
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Title:
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DECODER FOR GENERATING N OUTPUT SIGNALS FROM TWO OR MORE PRECHARGED INPUT SIGNALS
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Patent #:
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Issue Dt:
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07/09/2002
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Application #:
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09339954
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Filing Dt:
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06/25/1999
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Title:
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APPARATUS AND METHOD FOR CONTROLLING TIMING OF TRANSFER REQUESTS WITHIN A DATA PROCESSING APPARATUS
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09343709
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Filing Dt:
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06/30/1999
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Title:
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SYSTEM AND METHOD OF ORGANISING NODES WITHIN A TREE STRUCTURE
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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09348655
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Filing Dt:
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07/06/1999
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Title:
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MANAGEMENT OF CACHES IN A DATA PROCESSING APPARATUS
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09362182
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Filing Dt:
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07/28/1999
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Title:
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DATA PROCESSING APPARATUS AND METHOD FOR APPLYING FLOATING-POINT OPERATIONS TO FIRST, SECOND AND THIRD OPERANDS
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Patent #:
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Issue Dt:
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12/03/2002
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Application #:
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09394424
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Filing Dt:
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09/13/1999
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Title:
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DATA PROCESSING APPARATUS AND METHOD FOR CACHE LINE REPLACEMENT RESPONSIVE TO THE OPERATIONAL STATE OF MEMORY
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Patent #:
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Issue Dt:
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02/05/2002
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Application #:
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09394425
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Filing Dt:
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09/13/1999
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Title:
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DATA PROCESSING MEMORY SYSTEM
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09407846
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Filing Dt:
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09/29/1999
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Title:
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DEBUGGING DATA PROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09434491
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Filing Dt:
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11/05/1999
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Title:
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ROW SELECTION IN A CACHE MEMORY
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09449863
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Filing Dt:
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11/29/1999
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Title:
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VOLTAGE CONTROLLED OSCILLATOR WITH ACCELERATING AND DECELERATING CIRCUITS
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Patent #:
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Issue Dt:
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04/15/2003
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Application #:
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09449867
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Filing Dt:
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11/29/1999
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Title:
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MECHANISM FOR RECOVERY FROM TERMINATION OF A PROGRAM INSTRUCTION DUE TO AN EXCEPTION IN A PIPELAND PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09454606
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Filing Dt:
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12/07/1999
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Title:
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ZERO RESULT PREDICTION
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Patent #:
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Issue Dt:
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03/02/2004
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Application #:
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09468837
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Filing Dt:
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12/22/1999
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Title:
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DETERMINING EXCEPTION OF A SECOND FLOATING POINT INSTRUCTION BY COMPARING A FORWARDED RESULT FROM AN INTERMEDIATE PIPELINE STAGE WITH A FINAL RESULT OF A FIRST FLOATING POINT INSTRUCTION
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Patent #:
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Issue Dt:
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08/07/2001
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Application #:
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09512329
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Filing Dt:
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02/24/2000
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Title:
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Status bits for cache memory
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