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Total properties:
14
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Patent #:
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Issue Dt:
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06/19/2001
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Application #:
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09005361
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Filing Dt:
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01/09/1998
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Title:
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DESIGN HIERARCHY-BASED PLACEMENT
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09186218
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Filing Dt:
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11/03/1998
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Title:
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AMOEBA DISPLAY FOR HIERARCHICAL LAYOUT
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Patent #:
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Issue Dt:
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02/26/2002
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Application #:
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09458505
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Filing Dt:
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12/09/1999
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Title:
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METHOD FOR BALANCING A CLOCK TREE
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Patent #:
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Issue Dt:
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02/11/2003
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Application #:
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09573996
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Filing Dt:
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05/17/2000
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Title:
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INTEGRATED CIRCUIT PARTITIONING PLACEMENT AND ROUTING SYSTEM
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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10003595
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Filing Dt:
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10/30/2001
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Publication #:
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Pub Dt:
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05/01/2003
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Title:
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SCALABLE, PARTITIONING INTEGRATED CIRCUIT LAYOUT SYSTEM
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Patent #:
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Issue Dt:
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06/10/2003
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Application #:
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10003932
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Filing Dt:
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10/22/2001
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Publication #:
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Pub Dt:
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04/24/2003
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Title:
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METHOD FOR GENERATING A PARTITIONED IC LAYOUT
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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10043458
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Filing Dt:
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01/09/2002
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Publication #:
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Pub Dt:
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11/06/2003
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Title:
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CLOCK TREE SYNTHESIS FOR A HIERARCHICALLY PARTITIONED IC LAYOUT
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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10117761
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Filing Dt:
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04/03/2002
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Title:
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IC LAYOUT SYSTEM EMPLOYING A HIERARCHICAL DATABASE BY UPDATING CELL LIBRARY
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Patent #:
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Issue Dt:
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07/13/2004
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Application #:
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10183331
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Filing Dt:
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06/26/2002
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Title:
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CLOCK TREE SYNTHESIZER FOR BALANCING RECONVERGENT AND CROSSOVER CLOCK TREES
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10183334
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Filing Dt:
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06/26/2002
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Title:
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IC LAYOUT BUFFER INSERTION METHOD
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10217851
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Filing Dt:
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08/12/2002
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Title:
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IC LAYOUT SYSTEM HAVING SEPARATE TRIAL AND DETAILED ROUTING PHASES
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Patent #:
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Issue Dt:
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05/29/2007
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Application #:
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10225215
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Filing Dt:
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08/20/2002
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Publication #:
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Pub Dt:
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02/26/2004
| | | | |
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Title:
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METHOD FOR ELIMINATING ROUTING CONGESTION IN AN IC LAYOUT
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Patent #:
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Issue Dt:
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12/23/2003
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Application #:
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10225255
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Filing Dt:
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08/20/2002
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Publication #:
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Pub Dt:
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09/25/2003
| | | | |
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Title:
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QUADRATIC PROGRAMMING METHOD FOR ELIMINATING CELL OVERLAP AND ROUTING CONGESTION IN AN IC LAYOUT
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|
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Patent #:
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Issue Dt:
|
08/24/2004
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Application #:
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10231532
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Filing Dt:
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08/29/2002
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Publication #:
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Pub Dt:
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09/25/2003
| | | | |
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Title:
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CLOCK TREE SYNTHESIS FOR MIXED DOMAIN CLOCKS
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