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Total properties:
64
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Patent #:
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Issue Dt:
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09/08/1992
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Application #:
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07386753
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Filing Dt:
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07/31/1989
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Title:
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OVERLAPPING LOOK-UP-AND-ADD ECHO CANCELLER REQUIRING A SMALLER MEMORY SIZE
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Patent #:
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Issue Dt:
|
03/10/1992
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Application #:
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07439134
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Filing Dt:
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11/20/1989
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Title:
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TECHNIQUE FOR ACHIEVING THE FULL CODING GAIN OF ENCODED DIGITAL SIGNALS
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Patent #:
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Issue Dt:
|
02/11/1992
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Application #:
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07504812
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Filing Dt:
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04/05/1990
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Title:
|
RATIONAL RATE FREQUENCY GENERATOR
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Patent #:
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Issue Dt:
|
05/19/1992
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Application #:
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07562050
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Filing Dt:
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08/02/1990
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Title:
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PHASE JITTER CORRECTION ARRANGEMENT
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Patent #:
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Issue Dt:
|
03/10/1992
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Application #:
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07576881
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Filing Dt:
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09/04/1990
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Title:
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USE OF CYCLOSTATIONARY SIGNAL TO CONSTRAIN THE FREQUENCY RESPONSE OF A FRACTIONALLY SPACED EQUALIZER
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Patent #:
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Issue Dt:
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07/28/1992
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Application #:
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07620868
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Filing Dt:
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11/30/1990
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Title:
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DIGITAL COMMUNICATIONS SYNCHRONIZATION SCHEME
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Patent #:
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Issue Dt:
|
11/10/1992
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Application #:
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07636821
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Filing Dt:
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01/02/1991
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Title:
|
USE OF A FRACTIONALLY SPACED EQUALIZER TO PERFORM ECHO CANCELLATION IN A FULL-DUPLEX MODEM
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Patent #:
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Issue Dt:
|
11/10/1992
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Application #:
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07673992
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Filing Dt:
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03/25/1991
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Title:
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PHASE-LOCK LOOP WITH ADAPTIVE SCALING ELEMENT
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Patent #:
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Issue Dt:
|
11/10/1992
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Application #:
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07705246
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Filing Dt:
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05/24/1991
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Title:
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SYNCHRONIZING THE OPERATION OF MULTIPLE EQUILIZERS IN A DIGITAL COMMUNICATIONS SYSTEM
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Patent #:
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Issue Dt:
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11/09/1993
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Application #:
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07728824
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Filing Dt:
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07/09/1991
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Title:
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TECHNIQUE FOR DETERMINING SIGNAL DISPERSION CHARACTERISTICS IN COMMUNICATIONS SYSTEMS
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Patent #:
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Issue Dt:
|
11/10/1992
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Application #:
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07776525
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Filing Dt:
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10/11/1991
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Title:
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TECHNIQUE FOR ACHIEVING THE FULL CODING GAIN OF ENCODED DIGITAL SIGNALS
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Patent #:
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Issue Dt:
|
10/04/1994
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Application #:
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07815010
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Filing Dt:
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12/27/1991
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Title:
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EQUALIZER-BASED TIMING RECOVERY
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Patent #:
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Issue Dt:
|
07/19/1994
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Application #:
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07830036
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Filing Dt:
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01/31/1992
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Title:
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SYNCHRONIZATION SCHEME FOR A DIGITAL COMMUNICATIONS SYSTEM
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Patent #:
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Issue Dt:
|
01/24/1995
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Application #:
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07831715
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Filing Dt:
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02/05/1992
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Title:
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MODULO DECODER
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Patent #:
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Issue Dt:
|
12/27/1994
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Application #:
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07876985
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Filing Dt:
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05/01/1992
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Title:
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EXTENDED BANDWIDTH TRANSMITTER FOR CROSSTALK CHANNELS
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Patent #:
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Issue Dt:
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06/07/1994
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Application #:
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08054370
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Filing Dt:
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04/28/1993
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Title:
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HIGH RESOLUTION FILTERING USING LOW RESOLUTION PROCESSORS
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Patent #:
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Issue Dt:
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08/22/1995
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Application #:
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08113113
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Filing Dt:
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08/30/1993
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Title:
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COMMUNICATION MODE IDENTIFICATION TECHNIQUE
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Patent #:
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Issue Dt:
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06/25/1996
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Application #:
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08245755
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Filing Dt:
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05/18/1994
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Title:
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SELF-SYNCHRONIZING SCRAMBLER/DESCRAMBLER WITHOUT ERROR MULTIPLICATION
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Patent #:
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Issue Dt:
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07/30/1996
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Application #:
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08290253
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Filing Dt:
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08/15/1994
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Title:
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DIGITALLY CONTROLLED HIGH RESOLUTION HYBRID PHASE SYNTHESIZER
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Patent #:
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Issue Dt:
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04/30/1996
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Application #:
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08322877
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Filing Dt:
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10/13/1994
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Title:
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HYBRID EQUALIZER ARRANGEMENT FOR USE IN DATA COMMUNICATIONS EQUIPMENT
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Patent #:
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Issue Dt:
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04/27/1999
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Application #:
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08469558
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Filing Dt:
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06/06/1995
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Title:
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IMPLIED INTERLEAVING, A FAMILY OF SYSTEMATIC INTERLEAVERS AND DEINTERLEAVERS
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Patent #:
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Issue Dt:
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03/24/1998
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Application #:
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08579713
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Filing Dt:
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12/28/1995
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Title:
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CHANNEL TRAINING OF MULTI-CHANNEL RECEIVER SYSTEM
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Patent #:
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Issue Dt:
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12/30/1997
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Application #:
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08586008
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Filing Dt:
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12/29/1995
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Title:
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IMPULSE NOISE EFFECT REDUCTION
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Patent #:
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Issue Dt:
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12/30/1997
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Application #:
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08602944
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Filing Dt:
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02/16/1996
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Title:
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MULTI-CHANNEL TIMING RECOVERY SYSTEM
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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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08605404
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Filing Dt:
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02/22/1996
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Title:
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AN ADAPTIVE PRE-EQUALIZER FOR USE IN DATA COMMUNICATIONS EQUIPMENT
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08628220
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Filing Dt:
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04/04/1996
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Title:
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A SYSTEM AND METHOD PROVIDING IMPROVED FRAME SYNCHRONIZATION IN A DIGITAL COMMUNICATION SYSTEM
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Patent #:
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Issue Dt:
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05/12/1998
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Application #:
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08690243
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Filing Dt:
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07/19/1996
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Title:
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RATE ADAPTIVE DIGITAL SUBSCRIBER LINE ("RADSL") MODEM
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Patent #:
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Issue Dt:
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10/05/1999
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Application #:
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08874863
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Filing Dt:
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06/13/1997
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Title:
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CASCADED HIGHER ORDER FILTER WITH LOW SENSITIVITY TO COMPONENT VALUES AND A METHOD FOR DESIGING THE SAME
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Patent #:
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Issue Dt:
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09/28/1999
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Application #:
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08874977
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Filing Dt:
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06/13/1997
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Title:
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SECOND ORDER FILTER WITH LOW SENSITIVITY TO COMPONENT VALUES AND A METHOD FOR DESIGNING THE SAME
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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08932899
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Filing Dt:
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09/18/1997
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Title:
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COMBINED HANDSET AND POTS FILTER
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Patent #:
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Issue Dt:
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10/19/1999
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Application #:
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08944941
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Filing Dt:
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10/02/1997
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Title:
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AN IMPROVED MULTILEVEL ENCODER
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Patent #:
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Issue Dt:
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03/07/2000
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Application #:
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08944942
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Filing Dt:
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10/02/1997
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Title:
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SYSTEM AND METHOD FOR CONCATENATING REED-SOLOMON AND TRELLIS CODES
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Patent #:
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Issue Dt:
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11/23/1999
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Application #:
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08953082
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10/17/1997
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Title:
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SYSTEM AND METHOD FOR OPTIMIZING HIGH SPEED DATA TRANSMISSION
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Patent #:
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Issue Dt:
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06/05/2001
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Application #:
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09005645
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Filing Dt:
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01/12/1998
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Title:
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ADAPTIVE PRECODING SYSTEM AND METHOD FOR EQUALIZING COMMUNICATION SIGNAL
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Patent #:
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Issue Dt:
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12/04/2001
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Application #:
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09014155
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Filing Dt:
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01/27/1998
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Title:
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SYSTEM AND METHOD FOR EXTERNAL TIMING USING A COMPLEX ROTATOR
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09014813
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Filing Dt:
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01/28/1998
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Title:
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RING FILTER FOR POTS COMMUNICATION SYSTEM
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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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09022564
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Filing Dt:
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02/12/1998
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Title:
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SWITCHED HYBRID CIRCUIT FOR USE WITH DIGITAL SUBSCRIBER LINES
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Patent #:
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Issue Dt:
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12/28/1999
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Application #:
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09045434
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03/20/1998
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Title:
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SYSTEM AND METHOD FOR OBTAINING CLOCK RECOVERY FROM A RECEIVED DATA SIGNAL
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Patent #:
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Issue Dt:
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12/22/1998
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Application #:
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09050474
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03/30/1998
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Title:
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METHOD AND APPARATUS FOR A RADSL TRANSCEIVER WARM START ACTIVATION PROCEDURE WITH PRECODING
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Patent #:
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Issue Dt:
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08/08/2000
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09075722
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05/11/1998
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Title:
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SYSTEM AND METHOD FOR DEMODULATING DIGITAL INFORMATION FROM AN ODD CONSTELLATION
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Patent #:
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Issue Dt:
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04/17/2001
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09113468
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07/10/1998
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FRAMELESS REED-SOLOMON CODING SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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05/07/2002
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09127414
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07/31/1998
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TRANSCEIVER CIRCUIT AND METHOD
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Patent #:
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Issue Dt:
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05/16/2000
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09152441
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09/14/1998
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MULTI-MODE BUFFER FOR DIGITAL SIGNAL PROCESSOR
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Patent #:
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Issue Dt:
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07/16/2002
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09164552
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10/01/1998
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Title:
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SYSTEM AND METHOD FOR ECHO CANCELLATION OVER ASYMMERTIC SPECTRA
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Patent #:
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Issue Dt:
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03/20/2001
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09170749
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10/13/1998
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Title:
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SYSTEM AND METHOD FOR BIT LOADING WITH OPTIMAL MARGIN ASSIGNMENT
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Issue Dt:
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11/28/2000
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09170753
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10/13/1998
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Title:
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SYSTEM AND METHOD FOR TESTING DISTORTION IN TRANSFORMERS
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Patent #:
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Issue Dt:
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10/30/2001
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Application #:
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09174026
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Filing Dt:
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10/16/1998
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Title:
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SYSTEM AND METHOD FOR DATA SEQUENCE CORRELATION IN THE TIME DOMAIN
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Patent #:
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Issue Dt:
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05/15/2001
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Application #:
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09175886
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Filing Dt:
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10/20/1998
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Title:
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DECIMATION FILTER FOR OVERSAMPLING ANALOG-TO DIGITAL CONVERTER
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Issue Dt:
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10/01/2002
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Application #:
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09203029
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Filing Dt:
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12/01/1998
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Title:
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SYSTEM AND METHOD FOR PROVIDING NEAR OPTIMAL BIT LOADING IN A DISCRETE MULTI-TONE MODULATION SYSTEM
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06/25/2002
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09243024
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02/03/1999
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Title:
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DIRECT MEMORY ACCESS CONTROLLER HAVING ON-BOARD ARBITRATION CIRCUITRY
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07/02/2002
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Application #:
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09247366
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02/10/1999
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Title:
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SYSTEM FOR WRITING A DATA VALUE AT A STARTING ADDRESS TO A NUMBER OF CONSECUTIVE LOCATIONS EQUAL TO A SEGMENT LENGTH IDENTIFIER
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Issue Dt:
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09/17/2002
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Application #:
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09247407
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02/10/1999
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Title:
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DIRECT MEMORY ACCESS CONTROLLER HAVING DECODE CIRCUIT FOR COMPACT INSTRUCTION FORMAT
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Issue Dt:
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04/03/2001
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Application #:
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09294131
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Filing Dt:
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04/19/1999
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Title:
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POWER CONTROL CIRCUIT FOR A DRIVER
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Patent #:
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Issue Dt:
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03/05/2002
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09303730
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05/03/1999
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Title:
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SYSTEM AND METHOD FOR PERFORMING TIME DOMIAN EQUALIZATION
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03/05/2002
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09309462
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05/11/1999
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Title:
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CONFIGURABLE ENCODER AND METHOD FOR GENERATING A REED-SOLOMON CODEWORD
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02/13/2007
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09357720
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07/21/1999
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Title:
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SYSTEM AND METHOD FOR COMMUNICATING IN A POINT-TO-MULTIPOINT DSL NETWORK
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02/26/2002
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09637748
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08/11/2000
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Title:
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Increased output swing line drivers for operation at supply voltages that exceed the breakdown voltage of the integrated circuit technology
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Patent #:
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Issue Dt:
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03/05/2002
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Application #:
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09663280
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09/15/2000
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Title:
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Power control circuit for a line driver
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09/16/2003
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09759694
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01/12/2001
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11/15/2001
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Title:
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TRELLIS CODING WITH ONE-BIT CONSTELLATIONS
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06/21/2005
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09819325
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03/28/2001
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DSL LINE TESTER
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06/29/2004
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10047180
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11/09/2001
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Title:
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INCREASED OUTPUT SWING LINE DRIVERS FOR OPERATION AT SUPPLY VOLTAGES THAT EXCEED THE BREAKDOWN VOLTAGE OF THE INTEGRATED CIRCUIT TECHNOLOGY
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03/25/2003
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07/18/2002
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11/28/2002
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Title:
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DOUBLE-CASCODE TWO-STAGE OPERATIONAL AMPLIFIER
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09/02/2003
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10247144
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09/19/2002
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01/30/2003
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CIRCUIT AND METHOD FOR COMPUTING A FAST FOURIER TRANSFORM
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07/07/2009
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10786670
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02/25/2004
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03/10/2005
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Title:
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SYSTEM AND METHOD FOR IMPLEMENTING A DELTA-SIGMA MODULATOR INTEGRITY SUPERVISOR
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