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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:018837/0769   Pages: 7
Recorded: 12/21/2006
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 55
1
Patent #:
6596617
Issue Dt:
07/22/2003
Application #:
09602658
Filing Dt:
06/22/2000
Title:
CMOS COMPATIBLE PROCESS FOR MAKING A TUNABLE NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE
2
Patent #:
6512274
Issue Dt:
01/28/2003
Application #:
09603101
Filing Dt:
06/22/2000
Title:
CMOS-PROCESS COMPATIBLE, TUNABLE NDR (NEGATIVE DIFFERENTIAL RESISTANCE) DEVICE AND METHOD OF OPERATING SAME
3
Patent #:
6479862
Issue Dt:
11/12/2002
Application #:
09603102
Filing Dt:
06/22/2000
Title:
CHARGE TRAPPING DEVICE AND METHOD FOR IMPLEMENTING A TRANSISTOR HAVING A NEGATIVE DIFFERENTIAL RESISTANCE MODE
4
Patent #:
6754104
Issue Dt:
06/22/2004
Application #:
10028084
Filing Dt:
12/21/2001
Publication #:
US20020048190
Pub Dt:
04/25/2002
Title:
INSULATED-GATE FIELD-EFFECT TRANSISTOR INTEGRATED WITH NEGATIVE DIFFERENTIAL RESISTANCE (NDR) FET
5
Patent #:
6559470
Issue Dt:
05/06/2003
Application #:
10028085
Filing Dt:
12/21/2001
Publication #:
US20020066933
Pub Dt:
06/06/2002
Title:
NEGATIVE DIFFERENTIAL RESISTANCE FIELD EFFECT TRANSISTOR (NDR-FET) & CIRCUITS USING THE SAME
6
Patent #:
6594193
Issue Dt:
07/15/2003
Application #:
10028089
Filing Dt:
12/21/2001
Publication #:
US20020067651
Pub Dt:
06/06/2002
Title:
CHARGE PUMP FOR NEGATIVE DIFFERENTIAL RESISTANCE TRANSISTOR
7
Patent #:
6518589
Issue Dt:
02/11/2003
Application #:
10028394
Filing Dt:
12/21/2001
Publication #:
US20020057123
Pub Dt:
05/16/2002
Title:
DUAL MODE FET & LOGIC CIRCUIT HAVING NEGATIVE DIFFERENTIAL RESISTANCE MODE
8
Patent #:
6724655
Issue Dt:
04/20/2004
Application #:
10029077
Filing Dt:
12/21/2001
Publication #:
US20020054502
Pub Dt:
05/09/2002
Title:
MEMORY CELL USING NEGATIVE DIFFERENTIAL RESISTANCE FIELD EFFECT TRANSISTORS
9
Patent #:
6847562
Issue Dt:
01/25/2005
Application #:
10185247
Filing Dt:
06/28/2002
Publication #:
US20040001363
Pub Dt:
01/01/2004
Title:
ENHANCED READ & WRITE METHODS FOR NEGATIVE DIFFERENTIAL RESISTANCE (NDR)BASED MEMORY DEVICE
10
Patent #:
6912151
Issue Dt:
06/28/2005
Application #:
10185559
Filing Dt:
06/28/2002
Publication #:
US20040032770
Pub Dt:
02/19/2004
Title:
NEGATIVE DIFFERENTIAL RESISTANCE (NDR) BASED MEMORY DEVICE WITH REDUCED BODY EFFECTS
11
Patent #:
6795337
Issue Dt:
09/21/2004
Application #:
10185568
Filing Dt:
06/28/2002
Publication #:
US20040001354
Pub Dt:
01/01/2004
Title:
NEGATIVE DIFFERENTIAL RESISTANCE (NDR) ELEMENTS & MEMORY DEVICE USING THE SAME
12
Patent #:
6567292
Issue Dt:
05/20/2003
Application #:
10185569
Filing Dt:
06/28/2002
Title:
NEGATIVE DIFFERENTIAL RESISTANCE (NDR) ELEMENT AND MEMORY WITH REDUCED SOFT ERROR RATE
13
Patent #:
6864104
Issue Dt:
03/08/2005
Application #:
10215137
Filing Dt:
08/08/2002
Publication #:
US20040008535
Pub Dt:
01/15/2004
Title:
SILICON ON INSULATOR (SOI) NEGATIVE DIFFERENTIAL RESISTANCE (NDR) BASED MEMORY DEVICE WITH REDUCED BODY EFFECTS
14
Patent #:
6680245
Issue Dt:
01/20/2004
Application #:
10232129
Filing Dt:
08/30/2002
Title:
METHOD FOR MAKING BOTH A NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE AND A NON-NDR DEVICE USING A COMMON MOS PROCESS
15
Patent #:
6700155
Issue Dt:
03/02/2004
Application #:
10252906
Filing Dt:
09/23/2002
Title:
CHARGE TRAPPING DEVICE AND METHOD
16
Patent #:
6727548
Issue Dt:
04/27/2004
Application #:
10298700
Filing Dt:
11/18/2002
Title:
NEGATIVE DIFFERENTIAL RESISTANCE (NDR) ELEMENT AND MEMORY WITH REDUCED SOFT ERROR RATE
17
Patent #:
6664601
Issue Dt:
12/16/2003
Application #:
10298726
Filing Dt:
11/18/2002
Title:
METHOD OF ORPERATING A DUAL MODE FET& LOGIC CIRCUIT HAVING NEGATIVE DIFFERENTIAL RESISTANCE MODE
18
Patent #:
6686267
Issue Dt:
02/03/2004
Application #:
10298915
Filing Dt:
11/18/2002
Title:
METHOD FOR FABRICATING A DUAL MODE FET & LOGIC CIRCUIT HAVING NEGATIVE DIFFERENTIAL RESISTANCE MODE
19
Patent #:
6724024
Issue Dt:
04/20/2004
Application #:
10298916
Filing Dt:
11/18/2002
Title:
FIELD EFFECT TRANSISTOR PULL-UP/ LOAD ELEMENT
20
Patent #:
6693027
Issue Dt:
02/17/2004
Application #:
10298917
Filing Dt:
11/18/2002
Title:
METHOD FOR CONFIGURING A DEVICE TO INCLUDE A NEGATIVE DIFFERENTIAL RESISTANCE (NDR) CHARACTERISTIC
21
Patent #:
6849483
Issue Dt:
02/01/2005
Application #:
10314510
Filing Dt:
12/09/2002
Publication #:
US20040110336
Pub Dt:
06/10/2004
Title:
CHARGE TRAPPING DEVICE & METHOD OF FORMING THE SAME
22
Patent #:
6980467
Issue Dt:
12/27/2005
Application #:
10314735
Filing Dt:
12/09/2002
Publication #:
US20040110324
Pub Dt:
06/10/2004
Title:
METHOD OF FORMING A NEGATIVE DIFFERENTIAL RESISTANCE DEVICE
23
Patent #:
6979580
Issue Dt:
12/27/2005
Application #:
10314785
Filing Dt:
12/09/2002
Publication #:
US20040110338
Pub Dt:
06/10/2004
Title:
PROCESS FOR CONTROLLING PERFORMANCE CHARACTERISTICS OF A NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE
24
Patent #:
6686631
Issue Dt:
02/03/2004
Application #:
10315741
Filing Dt:
12/10/2002
Title:
NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE AND METHOD OF OPERATING SAME
25
Patent #:
7012833
Issue Dt:
03/14/2006
Application #:
10321031
Filing Dt:
12/17/2002
Publication #:
US20040110332
Pub Dt:
06/10/2004
Title:
INTEGRATED CIRCUIT HAVING NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICES WITH VARIED PEAK-TO-VALLEY RATIOS (PVRS)
26
Patent #:
6812084
Issue Dt:
11/02/2004
Application #:
10321090
Filing Dt:
12/17/2002
Publication #:
US20040110337
Pub Dt:
06/10/2004
Title:
ADAPTIVE NEGATIVE DIFFERENTIAL RESISTANCE DEVICE
27
Patent #:
6806117
Issue Dt:
10/19/2004
Application #:
10322080
Filing Dt:
12/17/2002
Publication #:
US20040110349
Pub Dt:
06/10/2004
Title:
METHODS OF TESTING/STRESSING A CHARGE TRAPPING DEVICE
28
Patent #:
7005711
Issue Dt:
02/28/2006
Application #:
10324485
Filing Dt:
12/20/2002
Publication #:
US20040119114
Pub Dt:
06/24/2004
Title:
N-CHANNEL PULL-UP ELEMENT & LOGIC CIRCUIT
29
Patent #:
7067873
Issue Dt:
06/27/2006
Application #:
10753948
Filing Dt:
01/07/2004
Publication #:
US20040145010
Pub Dt:
07/29/2004
Title:
CHARGE TRAPPING DEVICE
30
Patent #:
7109078
Issue Dt:
09/19/2006
Application #:
10754229
Filing Dt:
01/08/2004
Publication #:
US20040142533
Pub Dt:
07/22/2004
Title:
CMOS COMPATIBLE PROCESS FOR MAKING A CHARGE TRAPPING DEVICE
31
Patent #:
6969894
Issue Dt:
11/29/2005
Application #:
10757245
Filing Dt:
01/14/2004
Publication #:
US20040145023
Pub Dt:
07/29/2004
Title:
VARIABLE THRESHOLD SEMICONDUCTOR DEVICE AND METHOD OF OPERATING SAME
32
Patent #:
6972465
Issue Dt:
12/06/2005
Application #:
10760090
Filing Dt:
01/15/2004
Publication #:
US20040150011
Pub Dt:
08/05/2004
Title:
CMOS PROCESS COMPATIBLE, TUNABLE NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE AND METHOD OF OPERATING SAME
33
Patent #:
6894327
Issue Dt:
05/17/2005
Application #:
10827713
Filing Dt:
04/19/2004
Title:
NEGATIVE DIFFERENTIAL RESISTANCE PULL UP ELEMENT
34
Patent #:
6933548
Issue Dt:
08/23/2005
Application #:
10827886
Filing Dt:
04/19/2004
Title:
NEGATIVE DIFFERENTIAL RESISTANCE LOAD ELEMENT
35
Patent #:
6956262
Issue Dt:
10/18/2005
Application #:
10828356
Filing Dt:
04/19/2004
Title:
CHARGE TRAPPING PULL UP ELEMENT
36
Patent #:
6853035
Issue Dt:
02/08/2005
Application #:
10831867
Filing Dt:
04/26/2004
Title:
NEGATIVE DIFFERENTIAL RESISTANCE (NDR) MEMORY DEVICE WITH REDUCED SOFT ERROR RATE
37
Patent #:
6861707
Issue Dt:
03/01/2005
Application #:
10831950
Filing Dt:
04/26/2004
Title:
NEGATIVE DIFFERENTIAL RESISTANCE (NDR) MEMORY CELL WITH REDUCED SOFT ERROR RATE
38
Patent #:
7186619
Issue Dt:
03/06/2007
Application #:
10867006
Filing Dt:
06/14/2004
Publication #:
US20040238855
Pub Dt:
12/02/2004
Title:
INSULATED-GATE FIELD-EFFECT TRANSISTOR INTEGRATED WITH NEGATIVE DIFFERENTIAL RESISTANCE (NDR) FET
39
Patent #:
6990016
Issue Dt:
01/24/2006
Application #:
10884574
Filing Dt:
07/02/2004
Publication #:
US20040246764
Pub Dt:
12/09/2004
Title:
METHOD OF MAKING MEMORY CELL UTILIZING NEGATIVE DIFFERENTIAL RESISTANCE DEVICES
40
Patent #:
7016224
Issue Dt:
03/21/2006
Application #:
10884576
Filing Dt:
07/02/2004
Publication #:
US20040246778
Pub Dt:
12/09/2004
Title:
TWO TERMINAL SILICON BASED NEGATIVE DIFFERENTIAL RESISTANCE DEVICE
41
Patent #:
7060524
Issue Dt:
06/13/2006
Application #:
10966575
Filing Dt:
10/15/2004
Publication #:
US20050106765
Pub Dt:
05/19/2005
Title:
METHODS OF TESTING/STRESSING A CHARGE TRAPPING DEVICE
42
Patent #:
7254050
Issue Dt:
08/07/2007
Application #:
10979469
Filing Dt:
11/01/2004
Publication #:
US20050064645
Pub Dt:
03/24/2005
Title:
METHOD OF MAKING ADAPTIVE NEGATIVE DIFFERENTIAL RESISTANCE DEVICE
43
Patent #:
7220636
Issue Dt:
05/22/2007
Application #:
10982425
Filing Dt:
11/04/2004
Publication #:
US20050153461
Pub Dt:
07/14/2005
Title:
PROCESS FOR CONTROLLING PERFORMANCE CHARACTERISTICS OF A NEGATIVE DIFFERENTIAL RESISTANCE (NDR) DEVICE
44
Patent #:
7015536
Issue Dt:
03/21/2006
Application #:
10983312
Filing Dt:
11/04/2004
Publication #:
US20050156158
Pub Dt:
07/21/2005
Title:
CHARGE TRAPPING DEVICE AND METHOD OF FORMING THE SAME
45
Patent #:
7012842
Issue Dt:
03/14/2006
Application #:
11010132
Filing Dt:
12/09/2004
Publication #:
US20050128797
Pub Dt:
06/16/2005
Title:
ENHANCED READ AND WRITE METHODS FOR NEGATIVE DIFFERENTIAL RESISTANCE (NDR) BASED MEMORY DEVICE
46
Patent #:
NONE
Issue Dt:
Application #:
11027093
Filing Dt:
12/30/2004
Publication #:
US20050145955
Pub Dt:
07/07/2005
Title:
Negative differential resistance (NDR) memory device with reduced soft error rate
47
Patent #:
7187028
Issue Dt:
03/06/2007
Application #:
11035786
Filing Dt:
01/13/2005
Publication #:
US20050121664
Pub Dt:
06/09/2005
Title:
SILICON ON INSULATOR (SOI) NEGATIVE DIFFERENTIAL RESISTANCE (NDR) BASED MEMORY DEVICE WITH REDUCED BODY EFFECTS
48
Patent #:
7113423
Issue Dt:
09/26/2006
Application #:
11045535
Filing Dt:
01/28/2005
Publication #:
US20050253133
Pub Dt:
11/17/2005
Title:
METHOD OF FORMING A NEGATIVE DIFFERENTIAL RESISTANCE DEVICE
49
Patent #:
7186621
Issue Dt:
03/06/2007
Application #:
11045539
Filing Dt:
01/28/2005
Publication #:
US20050260798
Pub Dt:
11/24/2005
Title:
METHOD OF FORMING A NEGATIVE DIFFERENTIAL RESISTANCE DEVICE
50
Patent #:
7453083
Issue Dt:
11/18/2008
Application #:
11198955
Filing Dt:
08/08/2005
Publication #:
US20050269628
Pub Dt:
12/08/2005
Title:
NEGATIVE DIFFERENTIAL RESISTANCE FIELD EFFECT TRANSISTOR FOR IMPLEMENTING A PULL UP ELEMENT IN A MEMORY CELL
51
Patent #:
7098472
Issue Dt:
08/29/2006
Application #:
11229182
Filing Dt:
09/15/2005
Publication #:
US20060007773
Pub Dt:
01/12/2006
Title:
NEGATIVE DIFFERENTIAL RESISTANCE (NDR) ELEMENTS AND MEMORY DEVICE USING THE SAME
52
Patent #:
7095659
Issue Dt:
08/22/2006
Application #:
11243346
Filing Dt:
10/03/2005
Publication #:
US20060028881
Pub Dt:
02/09/2006
Title:
VARIABLE VOLTAGE SUPPLY BIAS AND METHODS FOR NEGATIVE DIFFERENTIAL RESISTANCE (NDR) BASED MEMORY DEVICE
53
Patent #:
7266010
Issue Dt:
09/04/2007
Application #:
11288883
Filing Dt:
11/28/2005
Publication #:
US20070121371
Pub Dt:
05/31/2007
Title:
COMPACT STATIC MEMORY CELL WITH NON-VOLATILE STORAGE CAPABILITY
54
Patent #:
NONE
Issue Dt:
Application #:
11345248
Filing Dt:
01/31/2006
Publication #:
US20060125017
Pub Dt:
06/15/2006
Title:
Stacked memory cell utilizing negative differential resistance devices
55
Patent #:
NONE
Issue Dt:
Application #:
11382474
Filing Dt:
05/09/2006
Publication #:
US20060197122
Pub Dt:
09/07/2006
Title:
Charge Trapping Device
Assignor
1
PROGRESSANT TECHNOLOGIES, INC.
Exec Dt:
12/18/2006
Assignee
1
SYNOPSYS, INC.
700 E. MIDDLEFIELD ROAD
MOUNTAIN VIEW, CALIFORNIA 94043
Correspondence name and address
JULIE STEPHENSON
SYNOPSYS, INC.
700 E. MIDDLEFIELD ROAD
MOUNTAIN VIEW, CA 94043

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