Total properties:
35
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Patent #:
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Issue Dt:
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11/21/1995
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Application #:
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07913183
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Filing Dt:
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07/14/1992
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Title:
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COLUMN REDUNDANCY SCHEME FOR DRAM USING NORMAL AND REDUDANT COLUMN DECODERS PROGRAMMED WITH DEFECTIVE ARRAY ADDRESS AND DEFECTIVE COLUMN ADDRESS
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Patent #:
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Issue Dt:
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08/13/1996
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Application #:
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08224998
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Filing Dt:
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04/07/1994
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Title:
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METHOD AND APPARATUS FOR A SINGLE INSTRUCTION OPERATING MULTIPLE PROCESSORS ON A MEMORY CHIP
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Patent #:
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Issue Dt:
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10/29/1996
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Application #:
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08430230
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Filing Dt:
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04/28/1995
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Title:
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SYNCHRONOUS DRAM TESTER
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Patent #:
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Issue Dt:
|
01/13/1998
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Application #:
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08560547
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Filing Dt:
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11/17/1995
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Title:
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COLUMN REDUNDANCY SCHEME FOR DRAM USING NORMAL AND REDUNDANT COLUMN DECODERS PROGRAMMED WITH DEFECTIVE ARRAY ADDRESS AND DEFECTIVE COLUMN ADDRESS
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Patent #:
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Issue Dt:
|
10/13/1998
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Application #:
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08624213
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Filing Dt:
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03/29/1996
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Title:
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DIGITAL MEMORY TESTING METHOD
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Patent #:
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Issue Dt:
|
09/21/1999
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Application #:
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08686504
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Filing Dt:
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07/24/1996
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Title:
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MEMORY DEVICE WTIH MULTIPLE PROCESSORS HAVING PARALLEL ACCESS TO THE SAME MEMORY AREA
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Patent #:
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Issue Dt:
|
08/21/2001
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Application #:
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09275972
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Filing Dt:
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03/25/1999
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Title:
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MEMORY DEVICE WITH MULTIPLE PROCESSORS HAVING PARALLEL ACCESS TO THE SAME MEMORY AREA
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Patent #:
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Issue Dt:
|
08/10/2004
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Application #:
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09409184
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Filing Dt:
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09/30/1999
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Title:
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METHOD AND APPARATUS FOR A FOUR-WAY HASH TABLE
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Patent #:
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Issue Dt:
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02/10/2004
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Application #:
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09733627
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Filing Dt:
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12/08/2000
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Publication #:
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Pub Dt:
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08/22/2002
| | | | |
Title:
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METHOD AND APPARATUS FOR LONGEST MATCH ADDRESS LOOKUP
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Patent #:
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Issue Dt:
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09/09/2008
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Application #:
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09733629
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Filing Dt:
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12/08/2000
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Publication #:
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Pub Dt:
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11/22/2001
| | | | |
Title:
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METHOD AND APPARATUS FOR AN INCREMENTAL UPDATE OF A LONGEST PREFIX MATCH LOOKUP TABLE
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09733761
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Filing Dt:
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12/08/2000
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Publication #:
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Pub Dt:
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11/22/2001
| | | | |
Title:
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METHOD AND APPARATUS FOR STORING SPARSE AND DENSE SUBTREES IN A LONGEST PREFIX MATCH LOOKUP TABLE
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Patent #:
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Issue Dt:
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03/21/2006
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Application #:
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09851169
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Filing Dt:
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05/09/2001
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Publication #:
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Pub Dt:
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12/12/2002
| | | | |
Title:
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CALCULATING APPARATUS HAVING A PLURALITY OF STAGES
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Patent #:
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Issue Dt:
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01/04/2005
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Application #:
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09886649
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Filing Dt:
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06/21/2001
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Title:
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METHOD AND APPARATUS FOR LOGICALLY EXPANDING THE WIDTH OF MEMORY
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|
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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09886650
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Filing Dt:
|
06/21/2001
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Title:
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METHOD AND APPARATUS FOR PHYSICAL WIDTH EXPANSION OF A LONGEST PREFIX MATCH LOOKUP TABLE
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|
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Patent #:
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Issue Dt:
|
06/21/2011
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Application #:
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09886659
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Filing Dt:
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06/21/2001
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Publication #:
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Pub Dt:
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04/07/2011
| | | | |
Title:
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METHOD AND APPARATUS FOR LOGICALLY EXPANDING THE LENGTH OF A SEARCH KEY
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|
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09907825
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Filing Dt:
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07/19/2001
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Publication #:
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|
Pub Dt:
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12/20/2001
| | | | |
Title:
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METHOD AND APPARATUS FOR AN ENERGY EFFICIENT OPERATION OF MULTIPLE PROCESSORS IN A MEMORY
|
|
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Patent #:
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|
Issue Dt:
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09/12/2006
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Application #:
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10004280
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Filing Dt:
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10/31/2001
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Publication #:
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Pub Dt:
|
07/11/2002
| | | | |
Title:
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DEFAULT ROUTE CODING
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|
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Patent #:
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Issue Dt:
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07/12/2005
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Application #:
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10132675
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Filing Dt:
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04/24/2002
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Publication #:
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Pub Dt:
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12/05/2002
| | | | |
Title:
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LOAD BALANCING IN IP ADDRESS LOOKUP
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|
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10187472
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Filing Dt:
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06/28/2002
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Publication #:
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Pub Dt:
|
02/06/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR A FOUR-WAY HASH TABLE
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|
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Patent #:
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|
Issue Dt:
|
01/24/2006
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Application #:
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10296884
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Filing Dt:
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09/22/2003
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Publication #:
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Pub Dt:
|
07/08/2004
| | | | |
Title:
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MULTIPLE MATCH DETECTION CIRCUIT AND METHOD
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|
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Patent #:
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|
Issue Dt:
|
03/07/2006
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Application #:
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10306732
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Filing Dt:
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11/29/2002
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Publication #:
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Pub Dt:
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04/29/2004
| | | | |
Title:
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METHOD AND CIRCUIT FOR ERROR CORRECTION IN CAM CELLS
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|
|
Patent #:
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|
Issue Dt:
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12/28/2004
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Application #:
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10336055
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Filing Dt:
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01/02/2003
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Publication #:
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Pub Dt:
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07/03/2003
| | | | |
Title:
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METHOD AND APPARATUS FOR STORING SPARSE AND DENSE SUBTREES IN A LONGEST PREFIX MATCH LOOKUP TABLE
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|
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Patent #:
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|
Issue Dt:
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11/14/2006
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Application #:
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10357270
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Filing Dt:
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01/31/2003
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Publication #:
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Pub Dt:
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05/13/2004
| | | | |
Title:
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METHOD AND APPARATUS FOR WIDE WORD DELETION IN CONTENT ADDRESSABLE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
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02/21/2006
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Application #:
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10386378
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Filing Dt:
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03/10/2003
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Publication #:
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Pub Dt:
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06/24/2004
| | | | |
Title:
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SEARCHING SMALL ENTITIES IN A WIDE CAM
|
|
|
Patent #:
|
|
Issue Dt:
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12/26/2006
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Application #:
|
10429690
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Filing Dt:
|
05/06/2003
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Publication #:
|
|
Pub Dt:
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10/16/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR AN ENERGY EFFICIENT OPERATION OF MULTIPLE PROCESSORS IN A MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2011
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Application #:
|
11069635
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Filing Dt:
|
02/28/2005
|
Publication #:
|
|
Pub Dt:
|
07/07/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR A FOUR-WAY HASH TABLE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2011
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Application #:
|
11099724
|
Filing Dt:
|
04/06/2005
|
Publication #:
|
|
Pub Dt:
|
08/11/2005
| | | | |
Title:
|
METHOD AND APPARATUS FOR PHYSICAL WIDTH EXPANSION OF A LONGEST PREFIX MATCH LOOKUP TABLE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2006
|
Application #:
|
11285197
|
Filing Dt:
|
11/23/2005
|
Publication #:
|
|
Pub Dt:
|
04/20/2006
| | | | |
Title:
|
MULTIPLE MATCH DETECTION CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2007
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Application #:
|
11291673
|
Filing Dt:
|
11/30/2005
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Publication #:
|
|
Pub Dt:
|
04/13/2006
| | | | |
Title:
|
SEARCHING SMALL ENTITIES IN A WIDE CAM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
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Application #:
|
11313661
|
Filing Dt:
|
12/22/2005
|
Publication #:
|
|
Pub Dt:
|
06/08/2006
| | | | |
Title:
|
METHOD AND CIRCUIT FOR ERROR CORRECTION IN CAM CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2010
|
Application #:
|
11327725
|
Filing Dt:
|
01/06/2006
|
Publication #:
|
|
Pub Dt:
|
07/06/2006
| | | | |
Title:
|
METHODS AND APPARATUS FOR PIPELINE PROCESSING OF ENCRYPTION DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2007
|
Application #:
|
11459420
|
Filing Dt:
|
07/24/2006
|
Publication #:
|
|
Pub Dt:
|
11/16/2006
| | | | |
Title:
|
MULTIPLE MATCH DETECTION CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2010
|
Application #:
|
11502587
|
Filing Dt:
|
08/10/2006
|
Publication #:
|
|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
DEFAULT ROUTE CODING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2009
|
Application #:
|
11548766
|
Filing Dt:
|
10/12/2006
|
Publication #:
|
|
Pub Dt:
|
06/14/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR WIDE WORD DELETION IN
CONTENT ADDRESSABLE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2010
|
Application #:
|
12111138
|
Filing Dt:
|
04/28/2008
|
Publication #:
|
|
Pub Dt:
|
01/15/2009
| | | | |
Title:
|
CALCULATING APPARATUS HAVING A PLURALITY OF STAGES
|
|