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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:023129/0669   Pages: 15
Recorded: 04/13/2009
Conveyance: SECURITY AGREEMENT
Total properties: 104
Page 1 of 2
Pages: 1 2
1
Patent #:
Issue Dt:
02/22/2005
Application #:
10249846
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
08/19/2004
Title:
MEMORY ARRAY OF A NON-VOLATILE RAM
2
Patent #:
Issue Dt:
02/15/2005
Application #:
10249848
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
08/19/2004
Title:
NON-VOLATILE MEMORY WITH A SINGLE TRANSISTOR AND RESISTIVE MEMORY ELEMENT
3
Patent #:
Issue Dt:
09/28/2004
Application #:
10330150
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
08/19/2004
Title:
MULTI-OUTPUT MULTIPLEXOR
4
Patent #:
Issue Dt:
12/21/2004
Application #:
10330153
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
08/19/2004
Title:
CROSS POINT MEMORY ARRAY USING MULTIPLE MODES OF OPERATION
5
Patent #:
Issue Dt:
11/29/2005
Application #:
10330170
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
08/19/2004
Title:
PROVIDING A REFERENCE VOLTAGE TO A CROSS POINT MEMORY ARRAY
6
Patent #:
Issue Dt:
06/22/2004
Application #:
10330512
Filing Dt:
12/26/2002
Title:
CROSS POINT MEMORY ARRAY USING MULTIPLE THIN FILMS
7
Patent #:
Issue Dt:
02/01/2005
Application #:
10330900
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
08/19/2004
Title:
CROSS POINT MEMORY ARRAY WITH MEMORY PLUGS EXHIBITING A CHARACTERISTIC HYSTERESIS
8
Patent #:
Issue Dt:
12/14/2004
Application #:
10330964
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
08/19/2004
Title:
CROSS POINT MEMORY ARRAY USING DISTINCT VOLTAGES
9
Patent #:
Issue Dt:
02/01/2005
Application #:
10330965
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
08/19/2004
Title:
MULTIPLEXOR HAVING A REFERENCE VOLTAGE ON UNSELECTED LINES
10
Patent #:
Issue Dt:
07/12/2005
Application #:
10360005
Filing Dt:
02/07/2003
Publication #:
Pub Dt:
08/19/2004
Title:
HIGH-DENSITY NVRAM
11
Patent #:
Issue Dt:
06/20/2006
Application #:
10387773
Filing Dt:
03/13/2003
Publication #:
Pub Dt:
09/16/2004
Title:
LOW TEMPERATURE DEPOSITION OF COMPLEX METAL OXIDES (CMO) MEMORY MATERIALS FOR NON-VOLATILE MEMORY INTEGRATED CIRCUITS
12
Patent #:
Issue Dt:
12/18/2007
Application #:
10387799
Filing Dt:
03/13/2003
Publication #:
Pub Dt:
09/16/2004
Title:
LASER ANNEALING OF COMPLEX METAL OXIDES (CMO) MEMORY MATERIALS FOR NON-VOLATILE MEMORY INTEGRATED CIRCUITS
13
Patent #:
Issue Dt:
03/22/2005
Application #:
10604556
Filing Dt:
07/30/2003
Publication #:
Pub Dt:
09/02/2004
Title:
REWRITABLE MEMORY WITH NON-LINEAR MEMORY ELEMENT
14
Patent #:
Issue Dt:
07/04/2006
Application #:
10604606
Filing Dt:
08/04/2003
Publication #:
Pub Dt:
08/19/2004
Title:
MULTI-RESISTIVE STATE MATERIAL THAT USES DOPANTS
15
Patent #:
Issue Dt:
11/15/2005
Application #:
10605757
Filing Dt:
10/23/2003
Publication #:
Pub Dt:
08/19/2004
Title:
MULTI-LAYER CONDUCTIVE MEMORY DEVICE
16
Patent #:
Issue Dt:
03/07/2006
Application #:
10605963
Filing Dt:
11/10/2003
Publication #:
Pub Dt:
05/12/2005
Title:
CONDUCTIVE MEMORY STACK WITH NON-UNIFORM WIDTH
17
Patent #:
Issue Dt:
03/06/2007
Application #:
10605977
Filing Dt:
11/11/2003
Publication #:
Pub Dt:
11/18/2004
Title:
CONDUCTIVE MEMORY STACK WITH SIDEWALL
18
Patent #:
Issue Dt:
06/14/2005
Application #:
10612191
Filing Dt:
07/01/2003
Publication #:
Pub Dt:
08/19/2004
Title:
RE-WRITABLE MEMORY WITH MULTIPLE MEMORY LAYERS
19
Patent #:
Issue Dt:
03/07/2006
Application #:
10612263
Filing Dt:
07/01/2003
Publication #:
Pub Dt:
08/19/2004
Title:
LINE DRIVERS THAT USE MINIMAL METAL LAYERS
20
Patent #:
Issue Dt:
07/18/2006
Application #:
10612733
Filing Dt:
07/01/2003
Publication #:
Pub Dt:
08/19/2004
Title:
LAYOUT OF DRIVER SETS IN A CROSS POINT MEMORY ARRAY
21
Patent #:
Issue Dt:
06/06/2006
Application #:
10612776
Filing Dt:
07/01/2003
Publication #:
Pub Dt:
08/19/2004
Title:
CROSS POINT MEMORY ARRAY WITH FAST ACCESS TIME
22
Patent #:
Issue Dt:
12/28/2004
Application #:
10613099
Filing Dt:
07/01/2003
Publication #:
Pub Dt:
08/19/2004
Title:
LINE DRIVERS THAT FIT WITHIN A SPECIFIED LINE PITCH
23
Patent #:
Issue Dt:
05/02/2006
Application #:
10634636
Filing Dt:
08/04/2003
Publication #:
Pub Dt:
08/19/2004
Title:
2-TERMINAL TRAPPED CHARGE MEMORY DEVICE WITH VOLTAGE SWITCHABLE MULTI-LEVEL RESISTANCE
24
Patent #:
Issue Dt:
02/05/2008
Application #:
10665882
Filing Dt:
09/19/2003
Publication #:
Pub Dt:
08/19/2004
Title:
RESISTIVE MEMORY DEVICE WITH A TREATED INTERFACE
25
Patent #:
Issue Dt:
09/06/2005
Application #:
10680508
Filing Dt:
10/06/2003
Publication #:
Pub Dt:
08/19/2004
Title:
ADAPTIVE PROGRAMMING TECHNIQUE FOR A RE-WRITABLE CONDUCTIVE MEMORY DEVICE
26
Patent #:
Issue Dt:
06/27/2006
Application #:
10682277
Filing Dt:
10/08/2003
Publication #:
Pub Dt:
08/19/2004
Title:
CONDUCTIVE MEMORY DEVICE WITH CONDUCTIVE OXIDE ELECTRODES
27
Patent #:
Issue Dt:
08/29/2006
Application #:
10745178
Filing Dt:
12/22/2003
Publication #:
Pub Dt:
06/23/2005
Title:
CONDUCTIVE MEMORY ARRAY HAVING PAGE MODE AND BURST MODE WRITE CAPABILITY
28
Patent #:
Issue Dt:
08/22/2006
Application #:
10745264
Filing Dt:
12/22/2003
Publication #:
Pub Dt:
06/23/2005
Title:
CONDUCTIVE MEMORY ARRAY HAVING PAGE MODE AND BURST MODE READ CAPABILITY
29
Patent #:
Issue Dt:
05/09/2006
Application #:
10765406
Filing Dt:
01/26/2004
Publication #:
Pub Dt:
08/19/2004
Title:
MEMORY ARRAY WITH HIGH TEMPERATURE WIRING
30
Patent #:
Issue Dt:
07/25/2006
Application #:
10773549
Filing Dt:
02/06/2004
Publication #:
Pub Dt:
08/11/2005
Title:
MULTI-RESISTIVE STATE ELEMENT WITH REACTIVE METAL
31
Patent #:
Issue Dt:
12/06/2005
Application #:
10868578
Filing Dt:
06/15/2004
Publication #:
Pub Dt:
11/03/2005
Title:
MEMORY ELEMENT HAVING ISLANDS
32
Patent #:
Issue Dt:
07/11/2006
Application #:
10895218
Filing Dt:
07/20/2004
Publication #:
Pub Dt:
01/26/2006
Title:
TWO TERMINAL MEMORY ARRAY HAVING REFERENCE CELLS
33
Patent #:
Issue Dt:
06/21/2005
Application #:
10921037
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
01/20/2005
Title:
MULTIPLE MODES OF OPERATION IN A CROSS POINT ARRAY
34
Patent #:
Issue Dt:
03/28/2006
Application #:
10922202
Filing Dt:
08/18/2004
Publication #:
Pub Dt:
01/27/2005
Title:
DISCHARGE OF CONDUCTIVE ARRAY LINES IN FAST MEMORY
35
Patent #:
Issue Dt:
05/26/2009
Application #:
10934951
Filing Dt:
09/03/2004
Publication #:
Pub Dt:
03/09/2006
Title:
MEMORY USING VARIABLE TUNNEL BARRIER WIDTHS
36
Patent #:
Issue Dt:
03/28/2006
Application #:
11012059
Filing Dt:
12/13/2004
Publication #:
Pub Dt:
05/26/2005
Title:
CROSS POINT ARRAY USING DISTINCT VOLTAGES
37
Patent #:
Issue Dt:
02/12/2008
Application #:
11021600
Filing Dt:
12/23/2004
Publication #:
Pub Dt:
02/09/2006
Title:
ENHANCED FUNCTIONALITY IN A TWO-TERMINAL MEMORY ARRAY
38
Patent #:
Issue Dt:
01/02/2007
Application #:
11024279
Filing Dt:
04/14/2005
Publication #:
Pub Dt:
08/11/2005
Title:
LINE DRIVERS THAT FITS WITHIN A SPECIFIED LINE PITCH
39
Patent #:
Issue Dt:
04/20/2010
Application #:
11037971
Filing Dt:
01/18/2005
Publication #:
Pub Dt:
07/20/2006
Title:
MOVABLE TERMINAL IN A TWO TERMINAL MEMORY ARRAY
40
Patent #:
Issue Dt:
01/31/2006
Application #:
11047952
Filing Dt:
01/31/2005
Publication #:
Pub Dt:
06/16/2005
Title:
CROSS POINT MEMORY ARRAY EXHIBITING A CHARACTERISTIC HYSTERESIS
41
Patent #:
Issue Dt:
12/12/2006
Application #:
11061100
Filing Dt:
02/18/2005
Publication #:
Pub Dt:
09/29/2005
Title:
MEMORY ARRAY OF A NON-VOLATILE RAM
42
Patent #:
Issue Dt:
10/24/2006
Application #:
11061101
Filing Dt:
02/18/2005
Publication #:
Pub Dt:
09/08/2005
Title:
NON-VOLATILE MEMORY WITH A SINGLE TRANSISTOR AND RESISTIVE MEMORY ELEMENT
43
Patent #:
NONE
Issue Dt:
Application #:
11095026
Filing Dt:
03/30/2005
Publication #:
Pub Dt:
08/03/2006
Title:
Memory using mixed valence conductive oxides
44
Patent #:
Issue Dt:
08/22/2006
Application #:
11151880
Filing Dt:
06/13/2005
Publication #:
Pub Dt:
10/20/2005
Title:
RE-WRITABLE MEMORY WITH MULTIPLE MEMORY LAYERS
45
Patent #:
Issue Dt:
02/20/2007
Application #:
11179790
Filing Dt:
07/11/2005
Publication #:
Pub Dt:
02/02/2006
Title:
HIGH-DENSITY NVRAM
46
Patent #:
Issue Dt:
05/30/2006
Application #:
11218655
Filing Dt:
09/02/2005
Publication #:
Pub Dt:
01/12/2006
Title:
ADAPTIVE PROGRAMMING TECHNIQUE FOR A RE-WRITABLE CONDUCTIVE MEMORY DEVICE
47
Patent #:
Issue Dt:
12/12/2006
Application #:
11288472
Filing Dt:
11/28/2005
Publication #:
Pub Dt:
04/20/2006
Title:
PROVIDING A REFERENCE VOLTAGE TO A CROSS POINT MEMORY ARRAY
48
Patent #:
Issue Dt:
02/05/2008
Application #:
11342491
Filing Dt:
01/30/2006
Publication #:
Pub Dt:
07/27/2006
Title:
STORAGE CONTROLLER FOR MULTIPLE CONFIGURATIONS OF VERTICAL MEMORY
49
Patent #:
Issue Dt:
10/21/2008
Application #:
11369663
Filing Dt:
03/06/2006
Publication #:
Pub Dt:
07/27/2006
Title:
CONDUCTIVE MEMORY STACK WITH NON-UNIFORM WIDTH
50
Patent #:
Issue Dt:
07/15/2008
Application #:
11405958
Filing Dt:
04/18/2006
Title:
CONDUCTIVE MEMORY DEVICE WITH CONDUCTIVE OXIDE ELECTRODES
51
Patent #:
Issue Dt:
06/05/2007
Application #:
11446733
Filing Dt:
06/05/2006
Publication #:
Pub Dt:
11/02/2006
Title:
CROSS POINT MEMORY ARRAY WITH FAST ACCESS TIME
52
Patent #:
Issue Dt:
04/21/2009
Application #:
11449105
Filing Dt:
06/08/2006
Publication #:
Pub Dt:
12/13/2007
Title:
SERIAL MEMORY INTERFACE
53
Patent #:
Issue Dt:
07/01/2008
Application #:
11473005
Filing Dt:
06/22/2006
Publication #:
Pub Dt:
11/02/2006
Title:
MULTI-RESISTIVE STATE ELEMENT WITH REACTIVE METAL
54
Patent #:
Issue Dt:
06/29/2010
Application #:
11478163
Filing Dt:
06/28/2006
Publication #:
Pub Dt:
01/03/2008
Title:
PERFORMING DATA OPERATIONS USING NON-VOLATILE THIRD DIMENSION MEMORY
55
Patent #:
Issue Dt:
06/05/2007
Application #:
11478520
Filing Dt:
06/29/2006
Publication #:
Pub Dt:
11/02/2006
Title:
TWO TERMINAL MEMORY ARRAY HAVING REFERENCE CELLS
56
Patent #:
Issue Dt:
11/17/2009
Application #:
11506385
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
02/21/2008
Title:
MEMORY POWER MANAGEMENT
57
Patent #:
Issue Dt:
05/26/2009
Application #:
11543502
Filing Dt:
10/05/2006
Publication #:
Pub Dt:
04/10/2008
Title:
SCALEABLE MEMORY SYSTEMS USING THIRD DIMENSION MEMORY
58
Patent #:
Issue Dt:
05/27/2008
Application #:
11583446
Filing Dt:
10/19/2006
Publication #:
Pub Dt:
04/24/2008
Title:
SENSING A SIGNAL IN A TWO-TERMINAL MEMORY ARRAY HAVING LEAKAGE CURRENT
59
Patent #:
Issue Dt:
05/13/2008
Application #:
11583676
Filing Dt:
10/19/2006
Publication #:
Pub Dt:
04/24/2008
Title:
TWO-CYCLE SENSING IN A TWO-TERMINAL MEMORY ARRAY HAVING LEAKAGE CURRENT
60
Patent #:
NONE
Issue Dt:
Application #:
11584876
Filing Dt:
10/20/2006
Publication #:
Pub Dt:
05/10/2007
Title:
OXYGEN DEPLETED ETCHING PROCESS
61
Patent #:
Issue Dt:
02/05/2008
Application #:
11636735
Filing Dt:
12/11/2006
Publication #:
Pub Dt:
12/06/2007
Title:
PROVIDING A REFERENCE VOLTAGE TO A CROSS POINT MEMORY ARRAY
62
Patent #:
Issue Dt:
07/27/2010
Application #:
11655599
Filing Dt:
01/19/2007
Publication #:
Pub Dt:
07/24/2008
Title:
FAST DATA ACCESS THROUGH PAGE MANIPULATION
63
Patent #:
Issue Dt:
11/25/2008
Application #:
11707340
Filing Dt:
02/16/2007
Publication #:
Pub Dt:
01/03/2008
Title:
TWO TERMINAL MEMORY ARRAY HAVING REFERENCE CELLS
64
Patent #:
Issue Dt:
05/05/2009
Application #:
11714555
Filing Dt:
03/05/2007
Publication #:
Pub Dt:
07/12/2007
Title:
CONDUCTIVE MEMORY STACK WITH SIDEWALL
65
Patent #:
Issue Dt:
06/03/2008
Application #:
11725045
Filing Dt:
03/16/2007
Publication #:
Pub Dt:
01/03/2008
Title:
TWO TERMINAL MEMORY ARRAY HAVING REFERENCE CELLS
66
Patent #:
Issue Dt:
06/03/2008
Application #:
11809643
Filing Dt:
06/01/2007
Publication #:
Pub Dt:
01/03/2008
Title:
TWO TERMINAL MEMORY ARRAY HAVING REFERENCE CELLS
67
Patent #:
Issue Dt:
06/22/2010
Application #:
11881474
Filing Dt:
07/26/2007
Publication #:
Pub Dt:
01/29/2009
Title:
CONTINUOUS PLANE OF THIN-FILM MATERIALS FOR A TWO-TERMINAL CROSS-POINT MEMORY
68
Patent #:
Issue Dt:
11/17/2009
Application #:
11881475
Filing Dt:
07/26/2007
Publication #:
Pub Dt:
01/29/2009
Title:
MULTI-STEP SELECTIVE ETCHING FOR CROSS-POINT MEMORY
69
Patent #:
Issue Dt:
03/01/2011
Application #:
11881496
Filing Dt:
07/26/2007
Publication #:
Pub Dt:
01/29/2009
Title:
CONTINUOUS PLANE OF THIN-FILM MATERIALS FOR A TWO-TERMINAL CROSS-POINT MEMORY
70
Patent #:
Issue Dt:
04/20/2010
Application #:
11881500
Filing Dt:
07/26/2007
Publication #:
Pub Dt:
01/29/2009
Title:
LOW READ CURRENT ARCHITECTURE FOR MEMORY
71
Patent #:
Issue Dt:
10/12/2010
Application #:
11893644
Filing Dt:
08/16/2007
Publication #:
Pub Dt:
02/19/2009
Title:
MULTIPLE-TYPE MEMORY
72
Patent #:
Issue Dt:
05/11/2010
Application #:
11893647
Filing Dt:
08/16/2007
Publication #:
Pub Dt:
02/19/2009
Title:
CIRCUITRY AND METHOD FOR INDICATING A MEMORY
73
Patent #:
Issue Dt:
04/24/2012
Application #:
11897726
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
03/05/2009
Title:
MEMORY EMULATION IN AN IMAGE CAPTURE DEVICE
74
Patent #:
Issue Dt:
08/09/2011
Application #:
11897909
Filing Dt:
08/30/2007
Publication #:
Pub Dt:
03/05/2009
Title:
MEMORY EMULATION IN AN ELECTRONIC ORGANIZER
75
Patent #:
Issue Dt:
04/24/2012
Application #:
11974034
Filing Dt:
10/10/2007
Publication #:
Pub Dt:
04/16/2009
Title:
MEMORY EMULATION IN A CELLULAR TELEPHONE
76
Patent #:
Issue Dt:
09/22/2009
Application #:
11975275
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
04/23/2009
Title:
MEMORY EMULATION USING RESISTIVITY-SENSITIVE MEMORY
77
Patent #:
Issue Dt:
12/15/2009
Application #:
11999376
Filing Dt:
12/04/2007
Publication #:
Pub Dt:
06/04/2009
Title:
PLANAR THIRD DIMENSIONAL MEMORY WITH MULTI-PORT ACCESS
78
Patent #:
Issue Dt:
09/14/2010
Application #:
12001335
Filing Dt:
12/10/2007
Publication #:
Pub Dt:
06/11/2009
Title:
INTEGRATED CIRCUITS AND METHODS TO COMPENSATE FOR DEFECTIVE MEMORY IN MULTIPLE LAYERS OF MEMORY
79
Patent #:
Issue Dt:
02/07/2012
Application #:
12001952
Filing Dt:
12/12/2007
Publication #:
Pub Dt:
06/18/2009
Title:
DISTURB CONTROL CIRCUITS AND METHODS TO CONTROL MEMORY DISTURBS AMONG MULTIPLE LAYERS OF MEMORY
80
Patent #:
Issue Dt:
10/26/2010
Application #:
12004192
Filing Dt:
12/20/2007
Publication #:
Pub Dt:
06/25/2009
Title:
EMULATION OF A NAND MEMORY SYSTEM
81
Patent #:
Issue Dt:
09/13/2011
Application #:
12004292
Filing Dt:
12/19/2007
Publication #:
Pub Dt:
05/08/2008
Title:
COMBINED MEMORIES IN INTEGRATED CIRCUITS
82
Patent #:
NONE
Issue Dt:
Application #:
12004734
Filing Dt:
12/24/2007
Publication #:
Pub Dt:
06/25/2009
Title:
Memory access protection
83
Patent #:
Issue Dt:
07/06/2010
Application #:
12004737
Filing Dt:
12/21/2007
Publication #:
Pub Dt:
06/25/2009
Title:
MEDIA PLAYER WITH NON-VOLATILE MEMORY
84
Patent #:
NONE
Issue Dt:
Application #:
12004740
Filing Dt:
12/23/2007
Publication #:
Pub Dt:
06/25/2009
Title:
Non-volatile memory compiler
85
Patent #:
Issue Dt:
01/25/2011
Application #:
12004768
Filing Dt:
12/22/2007
Publication #:
Pub Dt:
06/25/2009
Title:
METHOD AND SYSTEM FOR ACCESSING NON-VOLATILE MEMORY
86
Patent #:
NONE
Issue Dt:
Application #:
12005259
Filing Dt:
12/26/2007
Publication #:
Pub Dt:
07/02/2009
Title:
Memory Sanitization
87
Patent #:
NONE
Issue Dt:
Application #:
12005685
Filing Dt:
12/28/2007
Publication #:
Pub Dt:
07/02/2009
Title:
Non-volatile processor register
88
Patent #:
NONE
Issue Dt:
Application #:
12005687
Filing Dt:
12/27/2007
Publication #:
Pub Dt:
07/02/2009
Title:
Non-Volatile memories in interactive entertainment systems
89
Patent #:
Issue Dt:
01/26/2010
Application #:
12006006
Filing Dt:
12/29/2007
Publication #:
Pub Dt:
07/02/2009
Title:
FIELD PROGRAMMABLE GATE ARRAYS USING RESISTIVITY SENSITIVE MEMORIES
90
Patent #:
NONE
Issue Dt:
Application #:
12006187
Filing Dt:
12/31/2007
Publication #:
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07/02/2009
Title:
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Title:
STATE MACHINES USING RESISTIVITY-SENSITIVE MEMORIES
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12006970
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Title:
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12008077
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07/09/2009
Title:
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02/15/2011
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12008212
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Pub Dt:
07/09/2009
Title:
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07/16/2009
Title:
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96
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08/06/2009
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08/06/2009
Title:
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06/16/2015
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Title:
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06/19/2008
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10/14/2008
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03/03/2008
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Pub Dt:
07/03/2008
Title:
METHOD FOR TWO-CYCLE SENSING IN A TWO-TERMINAL MEMORY ARRAY HAVING LEAKAGE CURRENT
Assignor
1
Exec Dt:
04/07/2009
Assignee
1
ONE ALMADEN BLVD. SUITE 630
SUNNYVALE, CALIFORNIA USA 95113
Correspondence name and address
UCC DIRECT SERVICES
187 WOLF ROAD, SUITE 101
ATTN: 14080632
ALBANY, NY 12205

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