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Total properties:
11
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Patent #:
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Issue Dt:
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11/25/1997
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Application #:
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08754602
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Filing Dt:
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11/20/1996
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Title:
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METHOD FOR FORMING BLANKET PLANARIZATION OF THE MULTILEVEL INTERCONNECTION
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Patent #:
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Issue Dt:
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11/25/1997
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Application #:
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08772210
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Filing Dt:
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12/20/1996
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Title:
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METHOD OF FABRICATING A CAPACITOR OVER A BIT LINE DRAM PROCESS
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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08774753
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Filing Dt:
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12/30/1996
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Title:
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MANUFACTURING PROCESS OF A SPLIT GATE FLASH MEMORY UNIT
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Patent #:
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Issue Dt:
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11/17/1998
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Application #:
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08805391
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Filing Dt:
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02/24/1997
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Title:
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INTRACHIP POWER DISTRIBUTION PACKAGE AND METHOD FOR SEMICONDUCTORS HAVING A SUPPLY NODE ELECTRICALLY INTERCONNECTED WITH ONE OR MORE INTERMEDIATE NODES
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Patent #:
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Issue Dt:
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12/26/2000
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Application #:
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09048832
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Filing Dt:
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03/20/1998
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Title:
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COVERED SLIT ISOLATION BETWEEN INTEGRATED CIRCUIT DEVICES
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09159079
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Filing Dt:
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09/22/1998
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Title:
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CONTACT PRESSURE JIG FOR SIGNAL ANALYSIS
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Patent #:
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Issue Dt:
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05/21/2002
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Application #:
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09190660
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Filing Dt:
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11/12/1998
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Title:
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MULTI-CHIP MEMORY APPARATUS AND ASSOCIATED METHOD
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Patent #:
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Issue Dt:
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02/06/2001
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Application #:
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09444988
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Filing Dt:
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11/23/1999
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Title:
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SELF-ALIGNED CONTACT FOR TRENCH DMOS TRANSISTORS
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Patent #:
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Issue Dt:
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07/24/2001
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Application #:
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09687022
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Filing Dt:
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10/13/2000
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Title:
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Covered slit isolation between integrated circuit devices
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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09905416
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Filing Dt:
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07/13/2001
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Publication #:
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Pub Dt:
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01/16/2003
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Title:
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METHOD AND APPARATUS FOR WAFER ANALYSIS
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Patent #:
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Issue Dt:
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07/08/2003
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Application #:
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10004680
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Filing Dt:
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12/05/2001
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Publication #:
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Pub Dt:
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06/05/2003
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Title:
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APPARATUS AND METHOD FOR PREVENTING A WAFER MAPPING SYSTEM OF AN SMIF SYSTEM FROM BEING POLLUTED BY CORROSIVE GASES REMAINING ON WAFERS
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