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Patent Assignment Details
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Reel/Frame:023768/0001   Pages: 396
Recorded: 01/12/2010
Attorney Dkt #:0609612800100
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 391
Page 1 of 4
Pages: 1 2 3 4
1
Patent #:
Issue Dt:
09/06/1994
Application #:
08026944
Filing Dt:
03/05/1993
Title:
FORMATION OF SILICIDED JUNCTIONS IN DEEP SUB-MICRON MOSFETS BY DEFECT ENHANCED COSI2 FORMATION
2
Patent #:
Issue Dt:
09/05/1995
Application #:
08290801
Filing Dt:
08/17/1994
Title:
CIRCUIT FOR THE BUFFER STORAGE OF A BIT, AND USE OF THE CIRCUIT AS AN ADDRESS BUFFER STORE
3
Patent #:
Issue Dt:
10/13/1998
Application #:
08629184
Filing Dt:
04/08/1996
Title:
INTEGRATED SEMICONDUCTOR CIRCUIT
4
Patent #:
Issue Dt:
09/25/2001
Application #:
08756670
Filing Dt:
11/26/1996
Title:
DISTRIBUTION PLATE FOR A REACTION CHAMBER WITH MULTIPLE GAS INLETS AND SEPARATE MASS FLOW CONTROL LOOPS
5
Patent #:
Issue Dt:
10/26/1999
Application #:
08817630
Filing Dt:
03/26/1997
Title:
READ-ONLY-MEMORY CELL ARRANGEMENT USING VERTICAL MOS TRANSISTORS AND GATE DIELECTRICS OF DIFFERENT THICKNESSES AND METHOD FOR ITS PRODUCTION
6
Patent #:
Issue Dt:
07/27/1999
Application #:
09009602
Filing Dt:
01/20/1998
Title:
INTEGRATED CIRCUIT WITH ESD PROTECTION
7
Patent #:
Issue Dt:
08/15/2000
Application #:
09120629
Filing Dt:
07/22/1998
Title:
PREVENTION OF PHOTORESIST POISONING FROM DIELECTRIC ANTIREFLECTIVE COATING IN SEMICONDUCTOR FABRICATION
8
Patent #:
Issue Dt:
05/30/2000
Application #:
09174745
Filing Dt:
10/19/1998
Title:
INTEGRATED BUFFER CIRCUIT
9
Patent #:
Issue Dt:
12/28/1999
Application #:
09204031
Filing Dt:
12/01/1998
Title:
SILICON OXYNITRIDE CAP FOR FLUORINATED SILICATE GLASS FILM IN INTERMETAL DIELECTRIC SEMICONDUCTOR FABRICATION
10
Patent #:
Issue Dt:
09/25/2001
Application #:
09266038
Filing Dt:
03/11/1999
Title:
METHOD FOR NONDESTRUCTIVE MEASUREMENT OF DOPANT CONCENTRATIONS AND PROFILES IN THE DRIFT REGION OF CERTAIN SEMICONDUCTOR DEVICES
11
Patent #:
Issue Dt:
02/12/2002
Application #:
09266039
Filing Dt:
03/11/1999
Title:
METHOD FOR NONDESTRUCTIVE MEASUREMENT OF MINORITY CARRIER DIFFUSION LENGTH AND MINORITY CARRIER LIFETIME IN SEMICONDUCTOR DEVICES
12
Patent #:
Issue Dt:
01/30/2001
Application #:
09269047
Filing Dt:
03/18/1999
Title:
STEEP EDGE TIME-DELAY RELAY
13
Patent #:
Issue Dt:
08/06/2002
Application #:
09271684
Filing Dt:
03/18/1999
Publication #:
Pub Dt:
10/25/2001
Title:
CMP UNIFORMITY
14
Patent #:
Issue Dt:
09/17/2002
Application #:
09281021
Filing Dt:
03/30/1999
Title:
REDUCED SIGNAL TEST FOR DYNAMIC RANDOM ACCESS MEMORY
15
Patent #:
Issue Dt:
03/27/2001
Application #:
09282122
Filing Dt:
03/31/1999
Title:
ISOLATION COLLAR NITRIDE LINER FOR DRAM PROCESS IMPROVEMENT
16
Patent #:
Issue Dt:
07/30/2002
Application #:
09328763
Filing Dt:
06/09/1999
Publication #:
Pub Dt:
08/23/2001
Title:
METHOD FOR EXPANDING TRENCHES BY AN ANISOTROPIC WET ETCH
17
Patent #:
Issue Dt:
04/16/2002
Application #:
09438305
Filing Dt:
09/13/1999
Title:
BACKING FILM FOR CHEMICAL MECHANICAL PLANARIZATION (CMP) OF A SEMICONDUCTOR WAFER
18
Patent #:
Issue Dt:
07/05/2005
Application #:
09462994
Filing Dt:
01/14/2000
Title:
INTEGRATED CIRCUIT ARRANGEMENT AND METHOD FOR THE MANUFACTURE THEREOF
19
Patent #:
Issue Dt:
09/10/2002
Application #:
09491296
Filing Dt:
01/25/2000
Title:
POLISHING AGENT FOR SEMICONDUCTOR SUBSTRATES
20
Patent #:
Issue Dt:
08/27/2002
Application #:
09491408
Filing Dt:
01/26/2000
Title:
TECHNIQUES FOR IMPROVING MEMORY ACCESS IN A VIRTUAL MEMORY SYSTEM
21
Patent #:
Issue Dt:
07/30/2002
Application #:
09594911
Filing Dt:
06/15/2000
Title:
INTEGRATED MEMORY WITH A BUFFER CIRCUIT
22
Patent #:
Issue Dt:
11/09/2004
Application #:
09596129
Filing Dt:
06/16/2000
Title:
SEMICONDUCTOR ARRANGEMENT
23
Patent #:
Issue Dt:
05/04/2004
Application #:
09596130
Filing Dt:
06/16/2000
Title:
SEMICONDUCTOR PACKAGE AND METHOD
24
Patent #:
Issue Dt:
02/03/2004
Application #:
09639986
Filing Dt:
08/16/2000
Title:
CMP UNIFORMITY
25
Patent #:
Issue Dt:
10/28/2003
Application #:
09648952
Filing Dt:
08/25/2000
Title:
ELECTRICALLY PROGRAMMABLE MEMORY CELL CONFIGURATION AND METHOD FOR FABRICATING IT
26
Patent #:
Issue Dt:
03/16/2004
Application #:
09664825
Filing Dt:
09/19/2000
Title:
CONTROL OF SEPARATION BETWEEN TRANSFER GATE AND STORAGE NODE IN VERTICAL DRAM
27
Patent #:
Issue Dt:
11/02/2004
Application #:
09669585
Filing Dt:
09/26/2000
Title:
TRENCH CAPACITOR MEMORY CELL
28
Patent #:
Issue Dt:
06/04/2002
Application #:
09687883
Filing Dt:
10/13/2000
Title:
PULSE WIDTH DETECTION
29
Patent #:
Issue Dt:
09/27/2005
Application #:
09733665
Filing Dt:
12/08/2000
Publication #:
Pub Dt:
05/30/2002
Title:
SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHODS
30
Patent #:
Issue Dt:
08/26/2003
Application #:
09797245
Filing Dt:
03/01/2001
Publication #:
Pub Dt:
07/25/2002
Title:
SELF-ALIGNED CROSS-POINT MRAM DEVICE WITH ALUMINUM METALLIZATION LAYERS
31
Patent #:
Issue Dt:
03/23/2004
Application #:
09798101
Filing Dt:
03/02/2001
Publication #:
Pub Dt:
07/25/2002
Title:
A METHOD OF MANUFACTURING A METAL CAP LAYER FOR PREVENTING DAMASCENE CONDUCTIVE LINES FROM OXIDATION
32
Patent #:
Issue Dt:
05/20/2003
Application #:
09806614
Filing Dt:
05/11/2001
Title:
DRAM CELL SYSTEM AND METHOD FOR PRODUCING SAME
33
Patent #:
Issue Dt:
02/18/2003
Application #:
09818010
Filing Dt:
03/27/2001
Publication #:
Pub Dt:
07/25/2002
Title:
NON-ORTHOGONAL MRAM DEVICE
34
Patent #:
Issue Dt:
08/24/2004
Application #:
09854760
Filing Dt:
05/14/2001
Publication #:
Pub Dt:
07/25/2002
Title:
DESIGN OF LITHOGRAPHY ALIGNMENT AND OVERLAY MEASUREMENT MARKS ON CMP FINISHED DAMASCENE SURFACE
35
Patent #:
Issue Dt:
07/01/2003
Application #:
09873659
Filing Dt:
06/04/2001
Publication #:
Pub Dt:
02/14/2002
Title:
DRAM CELL CONFIGURATION WHOSE MEMORY CELLS CAN HAVE TRANSISTORS AND CAPACITORS WITH IMPROVED ELECTRICAL PROPERTIES
36
Patent #:
Issue Dt:
07/15/2003
Application #:
09885759
Filing Dt:
06/20/2001
Publication #:
Pub Dt:
07/25/2002
Title:
CURRENT SOURCE AND DRAIN ARRANGEMENT FOR MAGNETORESISTIVE MEMORIES (MRAMS)
37
Patent #:
Issue Dt:
12/23/2003
Application #:
09905357
Filing Dt:
07/13/2001
Publication #:
Pub Dt:
01/16/2003
Title:
HIGH ASPECT RATIO HIGH DENSITY PLASMA (HDP) OXIDE GAPFILL METHOD IN A LINES AND SPACE PATTERN
38
Patent #:
Issue Dt:
11/30/2004
Application #:
09905853
Filing Dt:
07/13/2001
Publication #:
Pub Dt:
01/31/2002
Title:
RANDOM ACCESS SEMICONDUCTOR MEMORY WITH REDUCED SIGNAL OVERCOUPLING
39
Patent #:
Issue Dt:
11/09/2004
Application #:
09906452
Filing Dt:
07/16/2001
Publication #:
Pub Dt:
03/14/2002
Title:
SEMICONDUCTOR DEVICE WITH TEMPERATURE REGULATION
40
Patent #:
Issue Dt:
06/04/2002
Application #:
09913422
Filing Dt:
10/15/2001
Title:
METHOD FOR PRODUCING A DRAM CELL WITH A TRENCH CAPACITOR
41
Patent #:
Issue Dt:
02/17/2004
Application #:
09923266
Filing Dt:
08/03/2001
Publication #:
Pub Dt:
07/25/2002
Title:
SELF-ALIGNED CONDUCTIVE LINE FOR CROSS-POINT MAGNETIC MEMORY INTEGRATED CIRCUITS
42
Patent #:
Issue Dt:
08/31/2004
Application #:
09923720
Filing Dt:
08/06/2001
Publication #:
Pub Dt:
02/28/2002
Title:
TEST APPARATUS FOR SEMICONDUCTOR CIRCUIT AND METHOD OF TESTING SEMICONDUCTOR CIRCUITS
43
Patent #:
Issue Dt:
01/18/2005
Application #:
09927573
Filing Dt:
08/09/2001
Publication #:
Pub Dt:
01/23/2003
Title:
MEMORY CELL, MEMORY CELL CONFIGURATION AND FABRICATION METHOD
44
Patent #:
Issue Dt:
11/23/2004
Application #:
09933304
Filing Dt:
08/20/2001
Publication #:
Pub Dt:
03/28/2002
Title:
CMP PROCESS
45
Patent #:
Issue Dt:
09/30/2003
Application #:
09937838
Filing Dt:
02/05/2002
Title:
MEMORY CELL ARRANGEMENT
46
Patent #:
Issue Dt:
04/06/2004
Application #:
09940001
Filing Dt:
08/27/2001
Publication #:
Pub Dt:
02/28/2002
Title:
VERTICAL NON-VOLATILE SEMICONDUCTOR MEMORY CELL AND METHOD FOR MANUFACTURING THE MEMORY CELL
47
Patent #:
Issue Dt:
07/13/2004
Application #:
09946994
Filing Dt:
09/04/2001
Publication #:
Pub Dt:
04/25/2002
Title:
EDGE-TRIGGERED D-FLIP-FLOP CIRCUIT
48
Patent #:
Issue Dt:
06/24/2003
Application #:
09953614
Filing Dt:
09/11/2001
Publication #:
Pub Dt:
07/04/2002
Title:
METHOD FOR FABRICATING A TRENCH ISOLATION FOR ELECTRICALLY ACTIVE COMPONENTS
49
Patent #:
Issue Dt:
11/26/2002
Application #:
09962411
Filing Dt:
09/24/2001
Publication #:
Pub Dt:
03/07/2002
Title:
INTEGRATED MEMORY HAVING MEMORY CELLS AND REFERENCE CELLS, AND OPERATING METHOD FOR SUCH A MEMORY
50
Patent #:
Issue Dt:
08/06/2002
Application #:
09964209
Filing Dt:
09/26/2001
Title:
MULTI-LEVEL SIGNAL LINES WITH VERTICAL TWISTS
51
Patent #:
Issue Dt:
06/24/2003
Application #:
09965086
Filing Dt:
09/27/2001
Publication #:
Pub Dt:
07/25/2002
Title:
MRAM BIT LINE WORD LINE ARCHITECTURE
52
Patent #:
Issue Dt:
04/06/2004
Application #:
09965092
Filing Dt:
09/28/2001
Publication #:
Pub Dt:
04/03/2003
Title:
LOW TEMPERATURE SIDEWALL OXIDATION OF W/WN/POLY-GATESTACK
53
Patent #:
Issue Dt:
11/09/2004
Application #:
09967795
Filing Dt:
09/28/2001
Publication #:
Pub Dt:
04/03/2003
Title:
TUNGSTEN HARD MASK
54
Patent #:
Issue Dt:
12/30/2003
Application #:
09980386
Filing Dt:
03/19/2002
Title:
SEMICONDUCTOR STORAGE COMPONENT WITH STORAGE CELLS, LOGIC AREAS AND FILLING STRUCTURES
55
Patent #:
Issue Dt:
07/29/2003
Application #:
09980811
Filing Dt:
03/11/2002
Title:
SOI DRAM WITHOUT FLOATING BODY EFFECT
56
Patent #:
Issue Dt:
03/08/2005
Application #:
09996279
Filing Dt:
11/28/2001
Publication #:
Pub Dt:
06/27/2002
Title:
DOUBLE GATE MOSFET TRANSISTOR AND METHOD FOR THE PRODUCTION THEREOF
57
Patent #:
Issue Dt:
07/27/2004
Application #:
10001429
Filing Dt:
10/30/2001
Publication #:
Pub Dt:
07/04/2002
Title:
READ/WRITE AMPLIFIER FOR A DRAM MEMORY CELL, AND DRAM MEMORY
58
Patent #:
Issue Dt:
03/18/2003
Application #:
10005978
Filing Dt:
12/03/2001
Publication #:
Pub Dt:
05/09/2002
Title:
METHOD FOR FABRICATING A MEMORY CELL CONFIGURATION
59
Patent #:
Issue Dt:
01/18/2005
Application #:
10012168
Filing Dt:
10/26/2001
Publication #:
Pub Dt:
06/06/2002
Title:
STORAGE CAPACITOR AND ASSOCIATED CONTACT-MAKING STRUCTURE AND A METHOD FOR FABRICATING THE STORAGE CAPACITOR AND THE CONTACT-MAKING STRUCTURE
60
Patent #:
Issue Dt:
10/18/2005
Application #:
10022226
Filing Dt:
12/17/2001
Publication #:
Pub Dt:
07/11/2002
Title:
ELECTRONIC COMPONENT WITH FLEXIBLE BONDING PADS AND METHOD OF PRODUCING SUCH A COMPONENT
61
Patent #:
Issue Dt:
07/27/2004
Application #:
10032389
Filing Dt:
10/26/2001
Publication #:
Pub Dt:
05/01/2003
Title:
METHOD FOR OBTAINING ELLIPTICAL AND ROUNDED SHAPES USING BEAM SHAPING
62
Patent #:
Issue Dt:
04/06/2004
Application #:
10048192
Filing Dt:
06/03/2002
Title:
METHOD FOR PRODUCING A SEMICONDUCTOR MEMORY ELEMENT
63
Patent #:
Issue Dt:
07/08/2003
Application #:
10053145
Filing Dt:
01/17/2002
Publication #:
Pub Dt:
03/27/2003
Title:
SPACER FORMATION IN A DEEP TRENCH MEMORY CELL
64
Patent #:
Issue Dt:
12/21/2004
Application #:
10070025
Filing Dt:
05/14/2002
Title:
ELECTRONIC CIRCUIT FOR A METHOD FOR STORING INFORMATION, SAID CIRCUIT COMPRISING FEROELECTRIC FLIPFLOPS
65
Patent #:
Issue Dt:
01/11/2005
Application #:
10073550
Filing Dt:
02/11/2002
Publication #:
Pub Dt:
10/10/2002
Title:
ETCHING PROCESS FOR A TWO-LAYER METALLIZATION
66
Patent #:
Issue Dt:
05/10/2005
Application #:
10079114
Filing Dt:
02/20/2002
Publication #:
Pub Dt:
11/14/2002
Title:
ELECTRONIC COMPONENT WITH A SEMICONDUCTOR CHIP AND METHOD OF PRODUCING AN ELECTRONIC COMPONENT
67
Patent #:
Issue Dt:
05/18/2004
Application #:
10082554
Filing Dt:
02/25/2002
Publication #:
Pub Dt:
08/29/2002
Title:
STACKED VIA WITH SPECIALLY DESIGNED LANDING PAD FOR INTEGRATED SEMICONDUCTOR STRUCTURES
68
Patent #:
Issue Dt:
04/06/2004
Application #:
10089531
Filing Dt:
06/04/2002
Title:
POLYVALENT, MAGNETORESISTIVE WRITE/READ MEMORY AND METHOD FOR WRITING AND READING A MEMORY OF THIS TYPE
69
Patent #:
Issue Dt:
09/23/2003
Application #:
10089910
Filing Dt:
06/27/2002
Title:
MEMORY DEVICE
70
Patent #:
Issue Dt:
04/13/2004
Application #:
10098840
Filing Dt:
03/14/2002
Publication #:
Pub Dt:
10/02/2003
Title:
METHOD OF ELIMINATING BACK-END REROUTING IN BALL GRID ARRAY PACKAGING
71
Patent #:
Issue Dt:
02/08/2005
Application #:
10105467
Filing Dt:
03/26/2002
Publication #:
Pub Dt:
09/26/2002
Title:
CONFIGURATION HAVING AN ELECTRONIC DEVICE ELECTRICALLY CONNECTED TO A PRINTED CIRCUIT BOARD
72
Patent #:
Issue Dt:
04/20/2004
Application #:
10111294
Filing Dt:
06/26/2003
Title:
PACKAGE FOR A SEMICONDUCTOR CHIP
73
Patent #:
Issue Dt:
03/16/2004
Application #:
10112272
Filing Dt:
03/28/2002
Publication #:
Pub Dt:
09/12/2002
Title:
FERROELECTRIC TRANSISTOR
74
Patent #:
Issue Dt:
02/20/2007
Application #:
10130441
Filing Dt:
08/06/2002
Title:
DRAM CELL STRUCTURE WITH TUNNEL BARRIER
75
Patent #:
Issue Dt:
03/11/2008
Application #:
10132826
Filing Dt:
04/25/2002
Publication #:
Pub Dt:
10/31/2002
Title:
ELECTRONIC COMPONENT WITH SEMICONDUCTOR CHIPS, ELECTRONIC ASSEMBLY COMPOSED OF STACKED SEMICONDUCTOR CHIPS, AND METHODS FOR PRODUCING AN ELECTRONIC COMPONENT AND AN ELECTRONIC ASSEMBLY
76
Patent #:
Issue Dt:
06/29/2004
Application #:
10135580
Filing Dt:
04/30/2002
Publication #:
Pub Dt:
11/21/2002
Title:
INTEGRATED CIRCUIT HAVING AN ANTIFUSE AND A METHOD OF MANUFACTURE
77
Patent #:
Issue Dt:
11/23/2004
Application #:
10148241
Filing Dt:
10/15/2002
Publication #:
Pub Dt:
05/15/2003
Title:
METHOD FOR CHEMICAL-MECHANICAL POLISHING OF LAYERS MADE FROM METALS FROM THE PLATINUM GROUP
78
Patent #:
Issue Dt:
04/24/2007
Application #:
10149892
Filing Dt:
10/01/2004
Publication #:
Pub Dt:
02/24/2005
Title:
CASING CONFIGURATION OF A SEMICODUCTOR COMPONENT
79
Patent #:
Issue Dt:
02/22/2005
Application #:
10161908
Filing Dt:
06/04/2002
Publication #:
Pub Dt:
12/04/2003
Title:
FERROELECTRIC MEMORY INTEGRATED CIRCUIT WITH IMPROVED RELIABILITY
80
Patent #:
Issue Dt:
10/21/2003
Application #:
10165171
Filing Dt:
06/07/2002
Title:
STRUCTURE AND METHOD FOR DUAL WORK FUNCTION LOGIC DEVICES IN VERTICAL DRAM PROCESS
81
Patent #:
Issue Dt:
05/10/2005
Application #:
10166837
Filing Dt:
06/11/2002
Publication #:
Pub Dt:
12/11/2003
Title:
AUTO-ADJUSTMENT OF SELF-REFRESH FREQUENCY
82
Patent #:
Issue Dt:
05/17/2005
Application #:
10171255
Filing Dt:
06/12/2002
Publication #:
Pub Dt:
12/18/2003
Title:
VERTICAL ACCESS TRANSISTOR WITH CURVED CHANNEL
83
Patent #:
Issue Dt:
03/08/2005
Application #:
10195958
Filing Dt:
07/16/2002
Publication #:
Pub Dt:
03/20/2003
Title:
ELECTRONIC INTERFACE STRUCTURES AND METHODS
84
Patent #:
Issue Dt:
09/28/2004
Application #:
10197793
Filing Dt:
07/18/2002
Publication #:
Pub Dt:
01/23/2003
Title:
CONNECTION OF PACKAGED INTEGRATED MEMORY CHIPS TO A PRINTED CIRCUIT BOARD
85
Patent #:
Issue Dt:
01/22/2008
Application #:
10204180
Filing Dt:
11/13/2002
Publication #:
Pub Dt:
09/25/2003
Title:
ELECTRONIC COMPONENT COMPRISING AN ELECTRICALLY CONDUCTIVE CONNECTION CONSISTING OF CARBON NANOTUBES AND A METHOD FOR PRODUCING THE SAME
86
Patent #:
Issue Dt:
09/14/2004
Application #:
10204830
Filing Dt:
12/05/2002
Publication #:
Pub Dt:
07/24/2003
Title:
METHOD FOR PRODUCING A FERROELECTRIC LAYER
87
Patent #:
Issue Dt:
05/30/2006
Application #:
10208397
Filing Dt:
07/30/2002
Publication #:
Pub Dt:
08/07/2003
Title:
USE OF POLYBENZOXAZOLES (PBOS) FOR ADHESION
88
Patent #:
Issue Dt:
11/23/2004
Application #:
10210132
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
02/05/2004
Title:
MASKLESS MIDDLE-OF-LINE LINER DEPOSITION
89
Patent #:
Issue Dt:
06/26/2007
Application #:
10210218
Filing Dt:
08/01/2002
Publication #:
Pub Dt:
02/06/2003
Title:
PROTECTIVE DEVICE FOR SUBASSEMBLIES AND METHOD FOR PRODUCING A PROTECTIVE DEVICE
90
Patent #:
Issue Dt:
03/16/2004
Application #:
10210628
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
02/06/2003
Title:
FUSE PROGRAMMABLE I/O ORGANIZATION
91
Patent #:
Issue Dt:
12/20/2005
Application #:
10220344
Filing Dt:
10/24/2002
Publication #:
Pub Dt:
01/29/2004
Title:
FIN FIELD-EFFECT TRANSISTOR AND METHOD FOR THE PRODUCTION THEREOF
92
Patent #:
Issue Dt:
07/15/2003
Application #:
10223038
Filing Dt:
08/16/2002
Publication #:
Pub Dt:
01/30/2003
Title:
PROCESS FOR PLANARIZATION AND RECESS ETCHING OF INTEGRATED CIRCUITS
93
Patent #:
Issue Dt:
11/30/2004
Application #:
10243492
Filing Dt:
09/13/2002
Publication #:
Pub Dt:
04/03/2003
Title:
PROCESS WINDOW ENHANCEMENT FOR DEEP TRENCH SPACER CONSERVATION
94
Patent #:
Issue Dt:
01/25/2005
Application #:
10249531
Filing Dt:
04/17/2003
Publication #:
Pub Dt:
10/21/2004
Title:
LOW SWITCHING FIELD MAGNETIC ELEMENT
95
Patent #:
Issue Dt:
05/10/2005
Application #:
10250209
Filing Dt:
06/13/2003
Publication #:
Pub Dt:
03/25/2004
Title:
ELEMENT STORAGE LAYER IN INTEGRATED CIRCUITS
96
Patent #:
Issue Dt:
08/30/2005
Application #:
10252449
Filing Dt:
09/23/2002
Publication #:
Pub Dt:
03/27/2003
Title:
SEMICONDUCTOR COMPONENT AND METHOD FOR ITS PRODUCTION
97
Patent #:
Issue Dt:
10/26/2004
Application #:
10258354
Filing Dt:
02/24/2003
Publication #:
Pub Dt:
08/21/2003
Title:
FIELD EFFECT TRANSISTOR AND METHOD FOR PRODUCING A FIELD EFFECT TRANSISTOR
98
Patent #:
Issue Dt:
09/28/2004
Application #:
10275337
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
08/07/2003
Title:
FIELD EFFECT TRANSISTOR
99
Patent #:
Issue Dt:
05/04/2004
Application #:
10275598
Filing Dt:
04/21/2003
Publication #:
Pub Dt:
09/11/2003
Title:
MEMORY ELEMENT AND METHOD FOR FABRICATING A MEMORY ELEMENT
100
Patent #:
Issue Dt:
05/30/2006
Application #:
10281031
Filing Dt:
10/25/2002
Publication #:
Pub Dt:
05/01/2003
Title:
DEVICE AND METHOD FOR CLOCK GENERATION
Assignor
1
Exec Dt:
04/25/2006
Assignee
1
GUSTAV-HEINEMANN-RING 212
MUNICH, GERMANY 81739
Correspondence name and address
BARRY E. BRETSCHNEIDER
C/O MORRISON & FOERSTER LLP
1650 TYSONS BOULEVARD SUITE 400
MCLEAN, VA 22102

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