|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
09994205
|
Filing Dt:
|
11/26/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
PER-BIT SET-UP AND HOLD TIME ADJUSTMENT FOR DOUBLE-DATA RATE SYNCHRONOUS DRAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2003
|
Application #:
|
09994547
|
Filing Dt:
|
11/27/2001
|
|
Title:
|
ATOMIC LAYER DEPOSITION OF CAPACITOR DIELECTRIC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2003
|
Application #:
|
09994668
|
Filing Dt:
|
11/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/02/2002
| | | | |
|
Title:
|
ELECTRO-MECHANICAL POLISHING OF PLATINUM CONTAINER STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
09996423
|
Filing Dt:
|
11/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/21/2002
| | | | |
|
Title:
|
SPIN COATING FOR MAXIMUM FILL CHARACTERISTIC YIELDING A PLANARIZED THIN FILM SURFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
09997019
|
Filing Dt:
|
11/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/30/2002
| | | | |
|
Title:
|
SPIN COATING FOR MAXIMUM FILL CHARACTERISTIC YIELDING A PLANARIZED THIN FILM SURFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
09997156
|
Filing Dt:
|
11/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/29/2003
| | | | |
|
Title:
|
ACTIVE TERMINATION CIRCUIT AND METHOD FOR CONTROLLING THE IMPEDANCE OF EXTERNAL INTEGRATED CIRCUIT TERMINALS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2003
|
Application #:
|
09997660
|
Filing Dt:
|
11/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/30/2002
| | | | |
|
Title:
|
METHOD AND STRUCTURE FOR REDUCING CONTACT ASPECT RATIOS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
09997721
|
Filing Dt:
|
11/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
LOW PASS FILTERS IN DLL CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2003
|
Application #:
|
09997876
|
Filing Dt:
|
11/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/05/2002
| | | | |
|
Title:
|
METAL OXYNITRIDE CAPACITOR BARRIER LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
09997920
|
Filing Dt:
|
11/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
METAL OXYNITRIDE CAPACITOR BARRIER LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
09999281
|
Filing Dt:
|
11/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/22/2002
| | | | |
|
Title:
|
METAL OXYNITRIDE CAPACITOR BARRIER LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
09999498
|
Filing Dt:
|
11/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR UPDATING A SEARCH ENGINE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
|
Application #:
|
10001007
|
Filing Dt:
|
11/14/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/04/2002
| | | | |
|
Title:
|
PROGRAM CONTROLLED EMBEDDED-DRAM-DSP ARCHITECTURE AND METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/2006
|
Application #:
|
10002175
|
Filing Dt:
|
12/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
STACKED CHIP CONNECTION USING STAND OFF STITCH BONDING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
10004135
|
Filing Dt:
|
10/18/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/11/2002
| | | | |
|
Title:
|
METHODS OF DETERMINING A COMMUNICATIONS RANGE OF AN INTERROGATOR OF A WIRELESS IDENTIFICATION SYSTEM AND METHODS OF VERIFYING OPERATION OF A WIRELESS IDENTIFICATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
10008558
|
Filing Dt:
|
11/13/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/29/2002
| | | | |
|
Title:
|
METHOD OF FABRICATING A DRAM TRANSISTOR WITH A DUAL GATE OXIDE TECHNIQUE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
10008710
|
Filing Dt:
|
12/07/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
SEQUENTIAL NIBBLE BURST ORDERING FOR DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2003
|
Application #:
|
10015260
|
Filing Dt:
|
12/11/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
|
Title:
|
METHOD FOR MANUFACTURING TAPERED OPENINGS USING AN ANISOTROPIC ETCH DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2004
|
Application #:
|
10016296
|
Filing Dt:
|
10/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
|
Title:
|
METHOD OF PROVIDING AN INTERFACE TO A PLURALITY OF PERIPHERAL DEVICES USING BUS ADAPTER CHIPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
10017255
|
Filing Dt:
|
12/06/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/25/2002
| | | | |
|
Title:
|
HIGH SPEED DATA BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
10017256
|
Filing Dt:
|
12/06/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/25/2002
| | | | |
|
Title:
|
HIGH SPEED DATA BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
10017257
|
Filing Dt:
|
12/06/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/11/2002
| | | | |
|
Title:
|
HIGH SPEED DATA BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
10017419
|
Filing Dt:
|
12/12/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
|
Title:
|
METHODS FOR MASK REPATTERN PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2002
|
Application #:
|
10017705
|
Filing Dt:
|
12/12/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/02/2002
| | | | |
|
Title:
|
VIRTUAL SHADOW REGISTERS AND VIRTUAL REGISTER WINDOWS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2005
|
Application #:
|
10017826
|
Filing Dt:
|
12/06/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/11/2002
| | | | |
|
Title:
|
HIGH SPEED DATA BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10017892
|
Filing Dt:
|
12/12/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
METHOD AND ARCHITECTURE TO CALIBRATE READ OPERATIONS IN SYNCHRONOUS FLASH MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
10020741
|
Filing Dt:
|
12/12/2001
|
|
Title:
|
OPTIMIZED CONTAINER STACKED CAPACITOR DRAM CELL UTILIZING SACRIFICIAL OXIDE DEPOSITION AND CHEMICAL MECHANICAL POLISHING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
10020801
|
Filing Dt:
|
12/07/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
|
Title:
|
WIRELESS COMMUNICATION SYSTEM, RADIO FREQUENCY COMMUNICATIONS SYSTEM, WIRELESS COMMUNICATIONS METHOD, RADIO FREQUENCY COMMUNICATIONS METHOD, AND BACKSCATTER RADIO FREQUENCY COMMUNICATIONS SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2005
|
Application #:
|
10021388
|
Filing Dt:
|
12/06/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/25/2002
| | | | |
|
Title:
|
HIGH SPEED DATA BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2003
|
Application #:
|
10022319
|
Filing Dt:
|
12/14/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
|
Title:
|
METHOD OF FORMING A CONTACT STRUCTURE IN A SEMICONDUCTOR DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
|
10029572
|
Filing Dt:
|
12/20/2001
|
|
Title:
|
BLOCK WRITE CIRCUIT AND METHOD FOR WIDE DATA PATH MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2003
|
Application #:
|
10035109
|
Filing Dt:
|
12/27/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/09/2002
| | | | |
|
Title:
|
ENCAPSULATED CONDUCTIVE PILLAR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2003
|
Application #:
|
10035728
|
Filing Dt:
|
12/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/10/2002
| | | | |
|
Title:
|
LOW POWER MEMORY MODULE USING RESTRICTED RAM ACTIVATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
10036141
|
Filing Dt:
|
12/26/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
MULTI-MODE SYNCHRONOUOS MEMORY DEVICE AND METHOD OF OPERATING AND TESTING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2003
|
Application #:
|
10037637
|
Filing Dt:
|
10/23/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/22/2002
| | | | |
|
Title:
|
FLIP-CHIP WITH MATCHED SIGNAL LINES, GROUND PLANE AND GROUND BUMPS ADJACENT SIGNAL BUMPS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
10039815
|
Filing Dt:
|
10/26/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
MEMORY DEVICE OPERABLE IN EITHER A HIGH-POWER, FULL-PAGE SIZE MODE OR A LOW-POWER, REDUCED-PAGE SIZE MODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2005
|
Application #:
|
10041322
|
Filing Dt:
|
01/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/16/2002
| | | | |
|
Title:
|
METHOD AND STRUCTURE FOR MANUFACTURING IMPROVED YIELD SEMICONDUCTOR PACKAGED DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2003
|
Application #:
|
10042560
|
Filing Dt:
|
11/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/22/2003
| | | | |
|
Title:
|
WAFER LEVEL STACKABLE SEMICONDUCTOR PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10042736
|
Filing Dt:
|
06/01/1999
|
|
Title:
|
PRODUCING WALKING ONE PATTERN IN SHIFT REGISTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
10043462
|
Filing Dt:
|
01/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
|
Title:
|
REFRESH CONTROLLER AND ADDRESS REMAPPING CIRCUIT AND METHOD FOR DUAL MODE FULL/REDUCED DENSITY DRAMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2005
|
Application #:
|
10043680
|
Filing Dt:
|
01/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
|
Title:
|
REFRESH CONTROLLER AND ADDRESS REMAPPING CIRCUIT AND METHOD FOR DUAL MODE FULL/REDUCED DENSITY DRAMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2005
|
Application #:
|
10043682
|
Filing Dt:
|
01/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
|
Title:
|
REFRESH CONTROLLER AND ADDRESS REMAPPING CIRCUIT AND METHOD FOR DUAL MODE FULL/REDUCED DENSITY DRAMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
10043683
|
Filing Dt:
|
01/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
|
Title:
|
REFRESH CONTROLLER AND ADDRESS REMAPPING CIRCUIT AND METHOD FOR DUAL MODE FULL/REDUCED DENSITY DRAMS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2003
|
Application #:
|
10046737
|
Filing Dt:
|
01/17/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/06/2002
| | | | |
|
Title:
|
DOUBLE LDD DEVICES FOR IMPROVED DRAM REFRESH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2003
|
Application #:
|
10046944
|
Filing Dt:
|
01/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/08/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR BIT-TO-BIT TIMING CORRECTION OF A HIGH SPEED MEMORY BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10047903
|
Filing Dt:
|
01/17/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
|
Title:
|
METHOD FOR FABRICATING BOC SEMICONDUCTOR PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
10051483
|
Filing Dt:
|
01/17/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/17/2003
| | | | |
|
Title:
|
METHOD AND CIRCUIT FOR ADJUSTING THE TIMING OF OUTPUT DATA BASED ON THE CURRENT AND FUTURE STATES OF THE OUTPUT DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2004
|
Application #:
|
10054415
|
Filing Dt:
|
01/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/11/2002
| | | | |
|
Title:
|
COMPENSATION FOR A DELAY LOCKED LOOP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
10054909
|
Filing Dt:
|
01/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR MONITORING COMPONENT LATENCY DRIFTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2004
|
Application #:
|
10056193
|
Filing Dt:
|
01/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
MEMORY MODULE WITH INTEGRATED BUS TERMINATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2002
|
Application #:
|
10056384
|
Filing Dt:
|
01/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/26/2002
| | | | |
|
Title:
|
HIGH SPEED LATCH/REGISTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2003
|
Application #:
|
10056439
|
Filing Dt:
|
01/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
|
Title:
|
COMPUTER SYSTEM HAVING MEMORY DEVICE WITH ADJUSTABLE DATA CLOCKING USING PASS GATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10056935
|
Filing Dt:
|
10/18/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2003
| | | | |
|
Title:
|
LOW POWER AUTO-REFRESH CIRCUIT AND METHOD FOR DYNAMIC RANDOM ACCESS MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2005
|
Application #:
|
10057225
|
Filing Dt:
|
01/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/27/2002
| | | | |
|
Title:
|
METHOD OF FABRICATING A TRANSISTOR ON A SUBSTRATE TO OPERATE AS A FULLY DEPLETED STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2003
|
Application #:
|
10061938
|
Filing Dt:
|
10/25/2001
|
|
Title:
|
HIGH SPEED DIGITAL TO ANALOG CONVERTER USING MULTIPLE STAGGERED SUCCESSIVE APPROXIMATION CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
10062756
|
Filing Dt:
|
01/30/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/08/2002
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH SELF REFRESH TEST MODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
10067454
|
Filing Dt:
|
02/04/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/03/2003
| | | | |
|
Title:
|
FLASH MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
|
10073235
|
Filing Dt:
|
02/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
|
Title:
|
METHOD TO REDUCE FLOATING GRAIN DEFECTS IN DUAL-SIDED CONTAINER CAPACITOR FABRICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
10073543
|
Filing Dt:
|
02/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
USER SELECTABLE BANKS FOR DRAM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/2004
|
Application #:
|
10073723
|
Filing Dt:
|
02/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
FET HAVING EPITAXIAL SILICON GROWTH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2006
|
Application #:
|
10074296
|
Filing Dt:
|
02/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR POWER SAVING DELAY LOCKED LOOP CONTROL BY SELECTIVELY LOCKING DELAY INTERVAL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
10074705
|
Filing Dt:
|
02/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/04/2002
| | | | |
|
Title:
|
Methods for intelligent caching in an embedded DRAM-DSP architecture
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
10074779
|
Filing Dt:
|
02/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/11/2002
| | | | |
|
Title:
|
PROGRAM CONTROLLED EMBEDDED-DRAM-DSP HAVING IMPROVED INSTRUCTION SET ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2006
|
Application #:
|
10075189
|
Filing Dt:
|
02/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
|
Title:
|
APPARATUS FOR ADAPTIVELY ADJUSTING A DATA RECEIVER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2005
|
Application #:
|
10075193
|
Filing Dt:
|
02/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
|
Title:
|
METHODS OF FORMING A CAPACITOR STRUCTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
10075390
|
Filing Dt:
|
02/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
|
Title:
|
METHOD TO ALTER CHALCOGENIDE GLASS FOR IMPROVED SWITCHING CHARACTERISTICS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
10075791
|
Filing Dt:
|
02/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/13/2002
| | | | |
|
Title:
|
COMMUNICATION SYSTEMS, COMMUNICATION APPARATUSES, RADIO FREQUENCY COMMUNICATION METHODS, METHODS OF COMMUNICATING USING A RADIO FREQUENCY COMMUNICATION SYSTEM, AND METHODS OF FORMING A RADIO FREQUENCY COMMUNICATION DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2004
|
Application #:
|
10076152
|
Filing Dt:
|
02/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
|
Title:
|
METHODS OF UTILIZING A SACRIFICIAL LAYER DURING FORMATION OF A CAPACITOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2013
|
Application #:
|
10081256
|
Filing Dt:
|
02/19/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/11/2002
| | | | |
|
Title:
|
WIRELESS COMMUNICATION SYSTEMS, INTERROGATORS AND METHODS OF COMMUNICATION WITHIN A WIRELESS COMMUNICATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10087147
|
Filing Dt:
|
02/28/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
|
Title:
|
METHODS OF FABRICATING INTEGRATED CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
10092216
|
Filing Dt:
|
03/05/2002
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
|
Title:
|
TWO-STAGE TRANSFER MOLDING METHOD TO ENCAPSULATE MMC MODULE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2004
|
Application #:
|
10093470
|
Filing Dt:
|
03/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/11/2003
| | | | |
|
Title:
|
MIM CAPACITOR WITH METAL NITRIDE ELECTRODE MATERIALS AND METHOD OF FORMATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
10093858
|
Filing Dt:
|
03/07/2002
|
|
Title:
|
MEMORY DEVICE HAVING A RELATIVELY WIDE DATA BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2003
|
Application #:
|
10096540
|
Filing Dt:
|
03/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR MECHANICAL AND CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
10099483
|
Filing Dt:
|
03/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/25/2002
| | | | |
|
Title:
|
METHOD OF CONNECTING SEMICONDUCTOR DEVICE TO A SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2004
|
Application #:
|
10100770
|
Filing Dt:
|
03/19/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/25/2003
| | | | |
|
Title:
|
MEMORY WITH ADDRESS MANAGEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
10102757
|
Filing Dt:
|
03/21/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
|
Title:
|
DDR SYNCHRONOUS FLASH MEMORY WITH VIRTUAL SEGMENT ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2005
|
Application #:
|
10106558
|
Filing Dt:
|
03/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
|
Title:
|
256 MEG DYNAMIC RANDOM ACCESS MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
10109088
|
Filing Dt:
|
03/28/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/02/2003
| | | | |
|
Title:
|
METHOD FOR PROGRAMMING A MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2007
|
Application #:
|
10114859
|
Filing Dt:
|
04/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/05/2002
| | | | |
|
Title:
|
COMPUTER TOUCH SCREEN ADAPTED TO FACILITATE SELECTION OF FEATURES AT EDGE OF SCREEN
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2004
|
Application #:
|
10117737
|
Filing Dt:
|
04/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
|
Title:
|
WIRELESS IDENTIFICATION DEVICE, RFID DEVICE WITH PUSH-ON/PUSH OFF SWITCH, AND METHOD OF MANUFACTURING WIRELESS IDENTIFICATION DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2003
|
Application #:
|
10118299
|
Filing Dt:
|
04/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/17/2002
| | | | |
|
Title:
|
CONTINUOUS INTERLEAVE BURST ACCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2008
|
Application #:
|
10118366
|
Filing Dt:
|
04/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/09/2003
| | | | |
|
Title:
|
BOND PAD REROUTING ELEMENT, REROUTED SEMICONDUCTOR DEVICES INCLUDING THE REROUTING ELEMENT, AND ASSEMBLIES INCLUDING THE REROUTED SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
10118401
|
Filing Dt:
|
04/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/09/2003
| | | | |
|
Title:
|
MULTI-CHIP MODULE AND METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2004
|
Application #:
|
10118570
|
Filing Dt:
|
04/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
|
Title:
|
DIE PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
10118576
|
Filing Dt:
|
04/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/10/2003
| | | | |
|
Title:
|
APPARATUS AND METHOD FOR PACKAGING CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
10119192
|
Filing Dt:
|
04/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/05/2002
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE, BALL GRID ARRAY CONNECTION SYSTEM, AND METHOD OF MAKING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
10121825
|
Filing Dt:
|
04/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR PLANARIZING AND CLEANING MICROELECTRONIC SUBSTRATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
10121921
|
Filing Dt:
|
04/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/16/2003
| | | | |
|
Title:
|
FEEDBACK STABILIZED LIGHT SOURCE WITH RAIL CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
10122943
|
Filing Dt:
|
04/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/16/2003
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR LOW POWER REFRESH OF DYNAMIC RANDOM ACCESS MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
10123336
|
Filing Dt:
|
04/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/16/2003
| | | | |
|
Title:
|
HIGH SPEED DIGITAL SIGNAL BUFFER AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
10123990
|
Filing Dt:
|
04/15/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/16/2003
| | | | |
|
Title:
|
CALIBRATION OF MEMORY CIRCUITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2005
|
Application #:
|
10126067
|
Filing Dt:
|
04/19/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2003
| | | | |
|
Title:
|
INTEGRATED CIRCUIT PACKAGE HAVING REDUCED INTERCONNECTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2003
|
Application #:
|
10126351
|
Filing Dt:
|
04/19/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/05/2002
| | | | |
|
Title:
|
METHODS FOR FORMING ALIGNED FUSES DISPOSED IN AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2003
|
Application #:
|
10126626
|
Filing Dt:
|
04/22/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/31/2002
| | | | |
|
Title:
|
METHOD FOR DESIGNING PHOTOLITHOGRAPHIC RETICLE LAYOUT, RETICLE, AND PHOTOLITHOGRAPHIC PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2004
|
Application #:
|
10128936
|
Filing Dt:
|
04/23/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/23/2003
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR QUICK SELF-REFRESH EXIT WITH TRANSITIONAL REFRESH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10132903
|
Filing Dt:
|
04/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/17/2003
| | | | |
|
Title:
|
ASSEMBLIES INCLUDING STACKED SEMICONDUCTOR DEVICES SEPARATED A DISTANCE DEFINED BY ADHESIVE MATERIAL INTERPOSED THEREBETWEEN, PACKAGES INCLUDING THE ASSEMBLIES, AND METHODS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2004
|
Application #:
|
10132917
|
Filing Dt:
|
04/26/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
|
Title:
|
RADIO FREQUENCY DATA COMMUNICATIONS DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2003
|
Application #:
|
10136126
|
Filing Dt:
|
05/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/29/2002
| | | | |
|
Title:
|
INTEGRATED CIRCUIT CONTACT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
10136544
|
Filing Dt:
|
05/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/19/2002
| | | | |
|
Title:
|
INTEGRATED CIRCUIT CONTACT
|
|
