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Patent Assignment Details
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Reel/Frame:023786/0416   Pages: 274
Recorded: 01/04/2010
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 3434
Page 27 of 35
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
1
Patent #:
Issue Dt:
10/30/2007
Application #:
10850011
Filing Dt:
05/19/2004
Publication #:
Pub Dt:
11/04/2004
Title:
METHOD FOR WRITING TO MULTIPLE BANKS OF A MEMORY DEVICE
2
Patent #:
Issue Dt:
08/16/2005
Application #:
10851081
Filing Dt:
05/24/2004
Publication #:
Pub Dt:
10/28/2004
Title:
METHOD AND APPARATUS FOR ESTABLISHING AND MAINTAINING DESIRED READ LATENCY IN HIGH-SPEED DRAM
3
Patent #:
Issue Dt:
11/15/2005
Application #:
10851879
Filing Dt:
05/20/2004
Publication #:
Pub Dt:
10/28/2004
Title:
MEMORY DEVICE OPERABLE IN EITHER A HIGH-POWER, FULL-PAGE SIZE MODE OR A LOW-POWER, REDUCED-PAGE SIZE MODE
4
Patent #:
Issue Dt:
08/09/2005
Application #:
10852031
Filing Dt:
05/24/2004
Publication #:
Pub Dt:
10/28/2004
Title:
SEMICONDUCTOR DEVICE WITH SELF REFRESH TEST MODE
5
Patent #:
Issue Dt:
01/31/2006
Application #:
10852547
Filing Dt:
05/24/2004
Publication #:
Pub Dt:
01/06/2005
Title:
METHOD FOR REDUCING REMOVAL FORCES FOR CMP PADS
6
Patent #:
Issue Dt:
10/09/2007
Application #:
10854593
Filing Dt:
05/26/2004
Publication #:
Pub Dt:
11/04/2004
Title:
ENHANCED ATOMIC LAYER DEPOSITION
7
Patent #:
Issue Dt:
05/02/2006
Application #:
10861438
Filing Dt:
06/03/2004
Publication #:
Pub Dt:
11/04/2004
Title:
APPLYING EPITAXIAL SILICON IN DISPOSABLE SPACER FLOW
8
Patent #:
Issue Dt:
12/04/2007
Application #:
10863048
Filing Dt:
06/07/2004
Publication #:
Pub Dt:
11/11/2004
Title:
ATOMIC LAYER DEPOSITION METHODS
9
Patent #:
NONE
Issue Dt:
Application #:
10863994
Filing Dt:
06/09/2004
Publication #:
Pub Dt:
12/15/2005
Title:
Wafer-level packaged microelectronic imagers and processes for wafer-level packaging
10
Patent #:
Issue Dt:
03/07/2006
Application #:
10864151
Filing Dt:
06/09/2004
Publication #:
Pub Dt:
01/06/2005
Title:
MEMORY MODULE WITH INTEGRATED BUS TERMINATION
11
Patent #:
NONE
Issue Dt:
Application #:
10865903
Filing Dt:
06/14/2004
Publication #:
Pub Dt:
11/11/2004
Title:
Resistance variable memory element having chalcogenide glass for improved switching characteristics
12
Patent #:
Issue Dt:
08/15/2006
Application #:
10867374
Filing Dt:
06/14/2004
Publication #:
Pub Dt:
07/28/2005
Title:
MULTI-DRIVE VIRTUAL MASS STORAGE DEVICE AND METHOD OF OPERATING SAME
13
Patent #:
Issue Dt:
05/09/2006
Application #:
10868284
Filing Dt:
06/14/2004
Publication #:
Pub Dt:
12/15/2005
Title:
LOW POWER AND LOW TIMING JITTER PHASE-LOCK LOOP AND METHOD
14
Patent #:
Issue Dt:
07/18/2006
Application #:
10868741
Filing Dt:
06/14/2004
Publication #:
Pub Dt:
12/30/2004
Title:
LOW POWER AUTO-REFRESH CIRCUIT AND METHOD FOR DYNAMIC RANDOM ACCESS MEMORIES
15
Patent #:
Issue Dt:
11/28/2006
Application #:
10869508
Filing Dt:
06/15/2004
Publication #:
Pub Dt:
01/27/2005
Title:
WAKE UP DEVICE FOR A COMMUNICATIONS SYSTEM
16
Patent #:
Issue Dt:
11/29/2005
Application #:
10869554
Filing Dt:
06/15/2004
Publication #:
Pub Dt:
11/11/2004
Title:
GRAPHICS RESAMPLING SYSTEM AND METHOD FOR USE THEREOF
17
Patent #:
Issue Dt:
09/09/2008
Application #:
10869701
Filing Dt:
06/16/2004
Publication #:
Pub Dt:
11/25/2004
Title:
SYSTEM FOR DETERMINING STATUS OF MULTIPLE INTERLOCKING FIFO BUFFER STRUCTURES BASED ON THE POSITION OF AT LEAST ONE POINTER OF EACH OF THE MULTIPLE BUFFERS
18
Patent #:
Issue Dt:
10/03/2006
Application #:
10870138
Filing Dt:
06/18/2004
Publication #:
Pub Dt:
11/25/2004
Title:
APPARATUS AND METHOD FOR ADJUSTING CLOCK SKEW
19
Patent #:
Issue Dt:
06/06/2006
Application #:
10871126
Filing Dt:
06/18/2004
Publication #:
Pub Dt:
11/11/2004
Title:
SEMICONDUCTOR PROCESSING METHODS OF REMOVING CONDUCTIVE MATERIAL
20
Patent #:
Issue Dt:
12/13/2005
Application #:
10871925
Filing Dt:
06/18/2004
Publication #:
Pub Dt:
11/18/2004
Title:
SEMICONDUCTOR PACKAGE HAVING FLEX CIRCUIT WITH EXTERNAL CONTACTS
21
Patent #:
Issue Dt:
09/05/2006
Application #:
10872765
Filing Dt:
06/21/2004
Publication #:
Pub Dt:
08/04/2005
Title:
SMALL ELECTRODE FOR A CHALCOGENIDE SWITCHING DEVICE AND METHOD FOR FABRICATING SAME
22
Patent #:
Issue Dt:
02/26/2008
Application #:
10877420
Filing Dt:
06/25/2004
Publication #:
Pub Dt:
12/29/2005
Title:
MULTIPLE LEVEL CELL MEMORY DEVICE WITH SINGLE BIT PER CELL, RE-MAPPABLE MEMORY BLOCK
23
Patent #:
Issue Dt:
01/06/2009
Application #:
10877791
Filing Dt:
06/25/2004
Publication #:
Pub Dt:
10/25/2007
Title:
METHODS OF OPERATING PORTABLE COMPUTERIZED DEVICE WITH NETWORK SECURITY
24
Patent #:
Issue Dt:
04/10/2007
Application #:
10878060
Filing Dt:
06/29/2004
Publication #:
Pub Dt:
11/25/2004
Title:
CO-SPUTTER DEPOSITION OF METAL-DOPED CHALCOGENIDES
25
Patent #:
Issue Dt:
09/05/2006
Application #:
10878350
Filing Dt:
06/29/2004
Publication #:
Pub Dt:
11/25/2004
Title:
PASSIVATION PLANARIZATION
26
Patent #:
Issue Dt:
06/26/2007
Application #:
10879158
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
01/19/2006
Title:
MEMORY ARCHITECTURE
27
Patent #:
Issue Dt:
11/13/2007
Application #:
10879398
Filing Dt:
06/29/2004
Publication #:
Pub Dt:
12/29/2005
Title:
PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS
28
Patent #:
Issue Dt:
10/17/2006
Application #:
10881273
Filing Dt:
06/29/2004
Publication #:
Pub Dt:
11/25/2004
Title:
MEMORY WITH ADDRESS MANAGEMENT
29
Patent #:
Issue Dt:
09/20/2005
Application #:
10881527
Filing Dt:
07/01/2004
Publication #:
Pub Dt:
03/17/2005
Title:
NON-VOLATILE MEMORY STRUCTURE
30
Patent #:
Issue Dt:
05/01/2007
Application #:
10881951
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
01/05/2006
Title:
MINIMIZING ADJACENT WORDLINE DISTURB IN A MEMORY DEVICE
31
Patent #:
Issue Dt:
12/01/2009
Application #:
10882087
Filing Dt:
06/29/2004
Publication #:
Pub Dt:
01/20/2005
Title:
METHOD AND SYSTEM FOR UPDATING A SEARCH ENGINE DATABASE BASED ON POPULARITY OF LINKS
32
Patent #:
Issue Dt:
07/01/2008
Application #:
10884132
Filing Dt:
07/02/2004
Publication #:
Pub Dt:
12/09/2004
Title:
SPLIT EMBEDDED DRAM PROCESSOR
33
Patent #:
Issue Dt:
09/05/2006
Application #:
10886428
Filing Dt:
07/07/2004
Publication #:
Pub Dt:
01/12/2006
Title:
SOLUTION TO DQS POSTAMBLE RINGING PROBLEM IN MEMORY CHIPS
34
Patent #:
Issue Dt:
02/27/2007
Application #:
10888195
Filing Dt:
07/08/2004
Publication #:
Pub Dt:
01/12/2006
Title:
ALIGNMENT OF MEMORY READ DATA AND CLOCKING
35
Patent #:
Issue Dt:
08/15/2006
Application #:
10890184
Filing Dt:
07/14/2004
Publication #:
Pub Dt:
12/30/2004
Title:
SEMICONDUCTOR DEVICE, BALL GRID ARRAY CONNECTION SYSTEM, AND METHOD OF MAKING
36
Patent #:
Issue Dt:
11/09/2010
Application #:
10893101
Filing Dt:
07/16/2004
Title:
WIRELESS COMMUNICATION SYSTEMS, INTERFACING DEVICES, COMMUNICATION METHODS, METHODS OF INTERFACING WITH AN INTERROGATOR, AND METHODS OF OPERATING AN INTERROGATOR
37
Patent #:
Issue Dt:
02/05/2008
Application #:
10893112
Filing Dt:
07/16/2004
Publication #:
Pub Dt:
04/14/2005
Title:
COMMUNICATIONS SYSTEM AND METHOD WITH A/D CONVERTER
38
Patent #:
Issue Dt:
05/30/2006
Application #:
10894269
Filing Dt:
07/19/2004
Publication #:
Pub Dt:
01/19/2006
Title:
WRITE ADDRESS SYNCHRONIZATION USEFUL FOR A DDR PREFETCH SDRAM
39
Patent #:
Issue Dt:
06/17/2008
Application #:
10894633
Filing Dt:
07/19/2004
Publication #:
Pub Dt:
01/19/2006
Title:
METHODS OF FORMING SEMICONDUCTOR STRUCTURES AND CAPACITOR DEVICES
40
Patent #:
Issue Dt:
09/06/2005
Application #:
10898550
Filing Dt:
07/26/2004
Publication #:
Pub Dt:
05/26/2005
Title:
LOW POWER BUFFER IMPLEMENTATION
41
Patent #:
Issue Dt:
05/08/2007
Application #:
10899258
Filing Dt:
07/26/2004
Publication #:
Pub Dt:
01/06/2005
Title:
IMAGING SYSTEM
42
Patent #:
Issue Dt:
06/12/2007
Application #:
10901114
Filing Dt:
07/29/2004
Publication #:
Pub Dt:
01/06/2005
Title:
METHOD OF ORPERATING A CMOS APS PIXEL SENSOR
43
Patent #:
Issue Dt:
10/03/2006
Application #:
10901178
Filing Dt:
07/29/2004
Publication #:
Pub Dt:
01/06/2005
Title:
CMOS APS PIXEL SENSOR DYNAMIC RANGE INCREASE
44
Patent #:
Issue Dt:
02/28/2006
Application #:
10903851
Filing Dt:
07/30/2004
Publication #:
Pub Dt:
04/21/2005
Title:
SECURE CARGO TRANSPORTATION SYSTEM
45
Patent #:
Issue Dt:
07/17/2007
Application #:
10906242
Filing Dt:
02/10/2005
Publication #:
Pub Dt:
06/09/2005
Title:
ARCHITECTURE FOR REAL-TIME TEXTURE LOOK-UP'S FOR VOLUME RENDERING
46
Patent #:
Issue Dt:
06/20/2006
Application #:
10908283
Filing Dt:
05/05/2005
Publication #:
Pub Dt:
08/18/2005
Title:
METHOD AND APPARATUS FOR SAVING CURRENT IN A MEMORY DEVICE
47
Patent #:
Issue Dt:
10/11/2005
Application #:
10910192
Filing Dt:
08/03/2004
Publication #:
Pub Dt:
01/06/2005
Title:
MEMORY SYSTEM, METHOD AND PREDECODING CIRCUIT OPERABLE IN DIFFERENT MODES FOR SELECTIVELY ACCESSING MULTIPLE BLOCKS OF MEMORY CELLS FOR SIMULTANEOUS WRITING OR ERASURE
48
Patent #:
Issue Dt:
01/24/2006
Application #:
10911862
Filing Dt:
08/03/2004
Publication #:
Pub Dt:
01/13/2005
Title:
METHOD OF FABRICATION OF STACKED SEMICONDUCTOR DEVICES
49
Patent #:
Issue Dt:
11/15/2005
Application #:
10912929
Filing Dt:
08/05/2004
Publication #:
Pub Dt:
01/13/2005
Title:
METHOD AND SYSTEM FOR USING DYNAMIC RANDOM ACCESS MEMORY AS CACHE MEMORY
50
Patent #:
Issue Dt:
05/09/2006
Application #:
10914757
Filing Dt:
08/09/2004
Publication #:
Pub Dt:
01/13/2005
Title:
INTERLACED DELAY-LOCKED LOOPS FOR CONTROLLING MEMORY-CIRCUIT TIMING
51
Patent #:
Issue Dt:
10/18/2005
Application #:
10915155
Filing Dt:
08/09/2004
Publication #:
Pub Dt:
01/13/2005
Title:
METHOD AND APPARATUS FOR SAVING CURRENT IN A MEMORY DEVICE
52
Patent #:
Issue Dt:
05/22/2007
Application #:
10915774
Filing Dt:
08/11/2004
Publication #:
Pub Dt:
02/16/2006
Title:
FAST-LOCKING DIGITAL PHASE LOCKED LOOP
53
Patent #:
Issue Dt:
03/21/2006
Application #:
10916941
Filing Dt:
08/12/2004
Publication #:
Pub Dt:
01/27/2005
Title:
SYNCHRONOUS FLASH MEMORY WITH VIRTUAL SEGMENT ARCHITECTURE
54
Patent #:
Issue Dt:
10/24/2006
Application #:
10918613
Filing Dt:
08/13/2004
Publication #:
Pub Dt:
02/16/2006
Title:
MEMORY CIRCUITRY
55
Patent #:
Issue Dt:
12/19/2006
Application #:
10920716
Filing Dt:
08/16/2004
Publication #:
Pub Dt:
02/16/2006
Title:
MEMORY DEVICE AND METHOD HAVING PROGRAMMABLE ADDRESS CONFIGURATIONS
56
Patent #:
Issue Dt:
07/17/2007
Application #:
10922429
Filing Dt:
08/19/2004
Publication #:
Pub Dt:
02/23/2006
Title:
READ COMMAND TRIGGERED SYNCHRONIZATION CIRCUITRY
57
Patent #:
Issue Dt:
10/16/2007
Application #:
10923060
Filing Dt:
08/19/2004
Publication #:
Pub Dt:
01/27/2005
Title:
METHOD FOR AN INTEGRATED CIRCUIT CONTACT
58
Patent #:
Issue Dt:
10/02/2007
Application #:
10923242
Filing Dt:
08/19/2004
Publication #:
Pub Dt:
01/27/2005
Title:
METHOD FOR AN INTEGRATED CIRCUIT CONTACT
59
Patent #:
Issue Dt:
08/07/2007
Application #:
10923360
Filing Dt:
08/20/2004
Publication #:
Pub Dt:
01/27/2005
Title:
MULTIPLE SUBSTRATE MICROELECTRONIC DEVICES AND METHODS OF MANUFACTURE
60
Patent #:
Issue Dt:
04/28/2009
Application #:
10923441
Filing Dt:
08/20/2004
Publication #:
Pub Dt:
03/17/2005
Title:
METHODS AND APPARATUS FOR REMOVING CONDUCTIVE MATERIAL FROM A MICROELECTRONIC SUBSTRATE
61
Patent #:
Issue Dt:
08/04/2009
Application #:
10923587
Filing Dt:
08/19/2004
Publication #:
Pub Dt:
01/27/2005
Title:
A METHOD FOR AN INTEGRATED CIRCUIT CONTACT
62
Patent #:
Issue Dt:
06/13/2006
Application #:
10925171
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
03/16/2006
Title:
ANALOG TO DIGITAL CONVERSION WITH OFFSET CANCELLATION
63
Patent #:
Issue Dt:
04/05/2005
Application #:
10925524
Filing Dt:
08/24/2004
Publication #:
Pub Dt:
01/27/2005
Title:
DUAL DEPTH TRENCH ISOLATION
64
Patent #:
Issue Dt:
07/08/2008
Application #:
10926529
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
02/03/2005
Title:
PROGRAMMABLE MULTIPLE TEXTURE COMBINE CIRCUIT FOR A GRAPHICS PROCESSING SYSTEM AND METHOD FOR USE THEREOF
65
Patent #:
Issue Dt:
05/23/2006
Application #:
10928049
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
02/03/2005
Title:
REDUCED CURRENT INPUT BUFFER CIRCUIT
66
Patent #:
Issue Dt:
04/03/2007
Application #:
10928411
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
MEMORY SYSTEM AND METHOD HAVING UNIDIRECTIONAL DATA BUSES
67
Patent #:
Issue Dt:
09/12/2006
Application #:
10928417
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
02/03/2005
Title:
DISTRIBUTED PROCESSOR MEMORY MODULE AND METHOD
68
Patent #:
Issue Dt:
05/27/2008
Application #:
10928515
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
02/03/2005
Title:
MEMORY SYSTEM AND METHOD FOR IMPROVED UTILIZATION OF READ AND WRITE BANDWIDTH OF A GRAPHICS PROCESSING SYSTEM
69
Patent #:
Issue Dt:
04/10/2007
Application #:
10928931
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/09/2006
Title:
METHODS OF FORMING A PLURALITY OF CAPACITORS
70
Patent #:
Issue Dt:
10/21/2008
Application #:
10929037
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS OF FORMING A PLURALITY OF CAPACITORS
71
Patent #:
Issue Dt:
05/27/2008
Application #:
10929046
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
02/10/2005
Title:
METHOD OF FORMING MEMORY CELLS IN AN ARRAY
72
Patent #:
Issue Dt:
05/15/2007
Application #:
10929066
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/02/2006
Title:
SELF-TIMED FINE TUNING CONTROL
73
Patent #:
Issue Dt:
06/10/2008
Application #:
10929252
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
AN ELECTROCHEMICAL REACTION CELL FOR A COMBINED BARRIER LAYER AND SEED LAYER
74
Patent #:
Issue Dt:
02/12/2008
Application #:
10929282
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
PROGRAMMABLE DQS PREAMBLE
75
Patent #:
Issue Dt:
01/24/2006
Application #:
10929658
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
HORIZONTAL MEMORY DEVICES WITH VERTICAL GATES
76
Patent #:
Issue Dt:
12/19/2006
Application #:
10929903
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
HORIZONTAL MEMORY DEVICES WITH VERTICAL GATES
77
Patent #:
Issue Dt:
03/20/2012
Application #:
10929932
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/10/2005
Title:
APPARATUS AND METHOD FOR PACKAGING CIRCUITS
78
Patent #:
Issue Dt:
05/30/2006
Application #:
10930159
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SYNCHRONOUS FLASH MEMORY WITH NON-VOLATILE MODE REGISTER
79
Patent #:
Issue Dt:
04/25/2006
Application #:
10930191
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SYSTEMS AND METHODS FOR MONITORING CHARACTERISTICS OF A POLISHING PAD USED IN POLISHING MICRO-DEVICE WORKPIECES
80
Patent #:
Issue Dt:
09/18/2007
Application #:
10930305
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/10/2005
Title:
METHOD AND APPARATUS FOR FORMING AN INTEGRATED CIRCUIT ELECTRODE HAVING A REDUCED CONTACT AREA
81
Patent #:
Issue Dt:
07/04/2006
Application #:
10930314
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/10/2005
Title:
SYSTEMS AND METHODS FOR MONITORING CHARACTERISTICS OF A POLISHING PAD USED IN POLISHING MICRO-DEVICE WORKPIECES
82
Patent #:
Issue Dt:
04/25/2006
Application #:
10930318
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SYSTEMS AND METHODS FOR MONITORING CHARACTERISTICS OF A POLISHING PAD USED IN POLISHING MICRO-DEVICE WORKPIECES
83
Patent #:
Issue Dt:
05/29/2007
Application #:
10930322
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
03/02/2006
Title:
NON-SKIPPING AUTO-REFRESH IN A DRAM
84
Patent #:
Issue Dt:
06/12/2007
Application #:
10930439
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
04/20/2006
Title:
USER CONFIGURABLE COMMANDS FOR FLASH MEMORY
85
Patent #:
Issue Dt:
03/27/2007
Application #:
10930524
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
03/02/2006
Title:
POWER EFFICIENT MEMORY AND CARDS
86
Patent #:
Issue Dt:
09/25/2007
Application #:
10931196
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/24/2005
Title:
METHOD OF FABRICATING A CONDUCTIVE PATH IN A SEMICONDUCTOR DEVICE
87
Patent #:
Issue Dt:
09/18/2007
Application #:
10931358
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/10/2005
Title:
METHOD AND APPARATUS FOR IMPROVING OUTPUT SKEW FOR SYNCHRONOUS INTEGRATED CIRCUITS
88
Patent #:
Issue Dt:
10/11/2005
Application #:
10931370
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/03/2005
Title:
DELAY LOCKED LOOP CONTROL CIRCUIT
89
Patent #:
Issue Dt:
02/20/2007
Application #:
10931376
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/10/2005
Title:
APPARATUS AND METHOD FOR DISTRIBUTED MEMORY CONTROL IN A GRAPHICS PROCESSING SYSTEM
90
Patent #:
Issue Dt:
04/03/2007
Application #:
10931408
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/03/2005
Title:
CONDUCTIVE CONTAINER STRUCTURES HAVING A DIELECTRIC CAP
91
Patent #:
Issue Dt:
03/20/2007
Application #:
10931427
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
02/24/2005
Title:
ADJUSTABLE TIMING CIRCUIT OF AN INTEGRATED CIRCUT
92
Patent #:
Issue Dt:
04/03/2007
Application #:
10931564
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD AND SYSTEM FOR REDUCING THE PEAK CURRENT IN REFRESHING DYNAMIC RANDOM ACCESS MEMORY DEVICES
93
Patent #:
Issue Dt:
01/23/2007
Application #:
10931570
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/03/2005
Title:
CAPACITOR STRUCTURES
94
Patent #:
Issue Dt:
10/03/2006
Application #:
10931718
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
04/28/2005
Title:
CAPACITOR FOR USE IN AN INTEGRATED CIRCUIT
95
Patent #:
Issue Dt:
12/19/2006
Application #:
10931771
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS FOR INCREASING PHOTO ALIGNMENT MARGINS
96
Patent #:
Issue Dt:
10/17/2006
Application #:
10931802
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
04/21/2005
Title:
WIRELESS COMMUNICATION DEVICES, RADIO FREQUENCY IDENTIFICATION DEVICES, RADIO FREQUENCY IDENTIFICATION DEVICE COMMUNICATION SYSTEMS, WIRELESS COMMUNICATION METHODS, AND RADIO FREQUENCY IDENTIFICATION DEVICE COMMUNICATION METHODS
97
Patent #:
Issue Dt:
03/13/2007
Application #:
10931891
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
02/03/2005
Title:
FORMATION OF STANDARD VOLTAGE THRESHOLD AND LOW VOLTAGE THRESHOLD MOSFET DEVICES
98
Patent #:
Issue Dt:
10/04/2005
Application #:
10932271
Filing Dt:
09/02/2004
Publication #:
Pub Dt:
02/24/2005
Title:
CLAMPING CIRCUIT FOR THE VPOP VOLTAGE USED TO PROGRAM ANTIFUSES
99
Patent #:
Issue Dt:
07/10/2007
Application #:
10932477
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
02/10/2005
Title:
MEMORY MODULE AND METHOD HAVING IMPROVED SIGNAL ROUTING TOPOLOGY
100
Patent #:
Issue Dt:
12/05/2006
Application #:
10932668
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
02/10/2005
Title:
METHOD AND CIRCUITRY FOR REDUCING DUTY CYCLE DISTORTION IN DIFFERENTIAL DELAY LINES
Assignor
1
Exec Dt:
12/23/2009
Assignee
1
26 DEER CREEK LANE
MT. KISCO, NEW YORK 10549
Correspondence name and address
CHRISTOPHER C. HENRY
ROPES & GRAY LLP
1211 AVENUE OF THE AMERICAS
NEW YORK, NEW YORK 10036

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