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Patent Assignment Details
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Reel/Frame:023786/0416   Pages: 274
Recorded: 01/04/2010
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 3434
Page 30 of 35
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
1
Patent #:
Issue Dt:
03/09/2010
Application #:
11218998
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
01/19/2006
Title:
METHODS OF FORMING AN INTEGRATED CIRCUIT PACKAGE
2
Patent #:
Issue Dt:
08/04/2009
Application #:
11219214
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHODS FOR SECURING PACKAGED SEMICONDUCTOR DEVICES TO CARRIER SUBSTRATES
3
Patent #:
Issue Dt:
12/26/2006
Application #:
11230836
Filing Dt:
09/19/2005
Publication #:
Pub Dt:
01/19/2006
Title:
METHOD AND SYSTEM FOR USING DYNAMIC RANDOM ACCESS MEMORY AS CACHE MEMORY
4
Patent #:
Issue Dt:
10/09/2007
Application #:
11231090
Filing Dt:
09/20/2005
Publication #:
Pub Dt:
01/19/2006
Title:
STRUCTURE AND METHOD OF FABRICATING A TRANSISTOR HAVING A TRENCH GATE
5
Patent #:
Issue Dt:
11/24/2009
Application #:
11236957
Filing Dt:
09/28/2005
Publication #:
Pub Dt:
01/26/2006
Title:
MIXED ENCLAVE OPERATION IN A COMPUTER NETWORK
6
Patent #:
Issue Dt:
10/16/2007
Application #:
11238900
Filing Dt:
09/28/2005
Publication #:
Pub Dt:
02/02/2006
Title:
MEMORY MODULE AND METHOD HAVING IMPROVED SIGNAL ROUTING TOPOLOGY
7
Patent #:
Issue Dt:
04/03/2007
Application #:
11244101
Filing Dt:
10/06/2005
Publication #:
Pub Dt:
02/09/2006
Title:
LAYERED MICROLENS STRUCTURES AND DEVICES
8
Patent #:
Issue Dt:
03/29/2011
Application #:
11247496
Filing Dt:
10/10/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHOD AND APPARATUS FOR OUTPUT DATA SYNCHRONIZATION WITH SYSTEM CLOCK IN DDR
9
Patent #:
Issue Dt:
06/06/2006
Application #:
11247951
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
03/23/2006
Title:
BATTERY-POWERED ELECTRONIC DEVICE WITH SPACED CONTACT EXTENSIONS
10
Patent #:
NONE
Issue Dt:
Application #:
11248376
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
07/26/2007
Title:
METHOD AND APPARATUS FOR CONTROLLING REPRODUCTION OF AN AUDIOVISUAL WORK
11
Patent #:
Issue Dt:
06/17/2008
Application #:
11250356
Filing Dt:
10/15/2005
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS FOR PACKAGING IMAGE SENSITIVE ELECTRONIC DEVICES
12
Patent #:
Issue Dt:
06/30/2009
Application #:
11250905
Filing Dt:
10/15/2005
Publication #:
Pub Dt:
03/09/2006
Title:
METHODS FOR PACKAGING IMAGE SENSITIVE ELECTRONIC DEVICES
13
Patent #:
Issue Dt:
09/02/2008
Application #:
11250907
Filing Dt:
10/15/2005
Publication #:
Pub Dt:
03/09/2006
Title:
METHODS FOR PACKAGING IMAGE SENSITIVE ELECTRONIC DEVICES
14
Patent #:
Issue Dt:
06/29/2010
Application #:
11255243
Filing Dt:
10/20/2005
Publication #:
Pub Dt:
02/23/2006
Title:
METHOD AND CIRCUIT FOR ADJUSTING A SELF-REFRESH RATE TO MAINTAIN DYNAMIC DATA AT LOW SUPPLY VOLTAGES
15
Patent #:
Issue Dt:
10/31/2006
Application #:
11256215
Filing Dt:
10/21/2005
Publication #:
Pub Dt:
04/06/2006
Title:
DIGITAL DELAY-LOCKED LOOP CIRCUITS WITH HIERARCHICAL DELAY ADJUSTMENT
16
Patent #:
Issue Dt:
02/20/2007
Application #:
11259489
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD OF FORMING SHALLOW DOPED JUNCTIONS HAVING A VARIABLE PROFILE GRADATION OF DOPANTS
17
Patent #:
Issue Dt:
02/27/2007
Application #:
11260753
Filing Dt:
10/26/2005
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS OF FORMING TRANSISTOR GATES; AND METHODS OF FORMING PROGRAMMABLE READ-ONLY MEMORY CONSTRUCTIONS
18
Patent #:
Issue Dt:
02/13/2007
Application #:
11265154
Filing Dt:
11/03/2005
Publication #:
Pub Dt:
03/30/2006
Title:
ROW DRIVEN IMAGER PIXEL
19
Patent #:
Issue Dt:
04/24/2007
Application #:
11265460
Filing Dt:
11/02/2005
Publication #:
Pub Dt:
03/23/2006
Title:
CONTINUOUS INTERLEAVE BURST ACCESS
20
Patent #:
Issue Dt:
09/05/2006
Application #:
11266552
Filing Dt:
11/03/2005
Publication #:
Pub Dt:
03/23/2006
Title:
INTERLEAVED DELAY LINE FOR PHASE LOCKED AND DELAY LOCKED LOOPS
21
Patent #:
Issue Dt:
03/18/2008
Application #:
11266836
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
03/16/2006
Title:
COPPER INTERCONNECT FOR SEMICONDUCTOR DEVICE
22
Patent #:
Issue Dt:
02/10/2009
Application #:
11266842
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
03/16/2006
Title:
COPPER INTERCONNECT
23
Patent #:
Issue Dt:
04/10/2007
Application #:
11267341
Filing Dt:
11/07/2005
Publication #:
Pub Dt:
03/23/2006
Title:
LONGEST MATCH DETECTION IN A CAM
24
Patent #:
Issue Dt:
08/04/2009
Application #:
11267612
Filing Dt:
11/04/2005
Publication #:
Pub Dt:
03/16/2006
Title:
COPPER INTERCONNECT
25
Patent #:
Issue Dt:
03/02/2010
Application #:
11270204
Filing Dt:
11/08/2005
Publication #:
Pub Dt:
03/16/2006
Title:
METHOD OF ADDRESSING MESSAGES AND COMMUNICATIONS SYSTEM
26
Patent #:
Issue Dt:
02/13/2007
Application #:
11270578
Filing Dt:
11/10/2005
Publication #:
Pub Dt:
03/23/2006
Title:
SELECTABLE CLOCK INPUT
27
Patent #:
Issue Dt:
08/04/2009
Application #:
11271935
Filing Dt:
11/10/2005
Publication #:
Pub Dt:
03/23/2006
Title:
SYSTEM AND METHOD FOR LOCATING INDIVIDUALS AND EQUIPMENT, AIRLINE RESERVATION SYSTEM, COMMUNICATION SYSTEM
28
Patent #:
Issue Dt:
09/18/2007
Application #:
11272232
Filing Dt:
11/10/2005
Publication #:
Pub Dt:
03/23/2006
Title:
METHODS OF FORMING A PLURALITY OF CAPACITOR DEVICES
29
Patent #:
Issue Dt:
11/11/2008
Application #:
11272247
Filing Dt:
11/10/2005
Publication #:
Pub Dt:
03/23/2006
Title:
METHODS OF FORMING A PLURALITY OF CAPACITOR DEVICES
30
Patent #:
Issue Dt:
07/08/2008
Application #:
11273880
Filing Dt:
11/15/2005
Publication #:
Pub Dt:
03/30/2006
Title:
MEASURE CONTROLLED DELAY WITH DUTY CYCLE CONTROL
31
Patent #:
Issue Dt:
08/07/2007
Application #:
11274423
Filing Dt:
11/15/2005
Publication #:
Pub Dt:
07/06/2006
Title:
METHOD AND APPARATUS FOR ELECTRONIC IMAGE PROCESSING
32
Patent #:
Issue Dt:
10/20/2009
Application #:
11274857
Filing Dt:
11/14/2005
Publication #:
Pub Dt:
03/30/2006
Title:
DELAY LINE SYNCHRONIZER APPARATUS AND METHOD
33
Patent #:
Issue Dt:
04/15/2008
Application #:
11281084
Filing Dt:
11/17/2005
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD FOR FABRICATING PACKAGED DIE
34
Patent #:
Issue Dt:
12/19/2006
Application #:
11284498
Filing Dt:
11/21/2005
Publication #:
Pub Dt:
04/20/2006
Title:
MEMORY DEVICE AND METHOD HAVING DATA PATH WITH MULTIPLE PREFETCH I/O CONFIGURATIONS
35
Patent #:
Issue Dt:
06/10/2008
Application #:
11290238
Filing Dt:
11/29/2005
Publication #:
Pub Dt:
04/20/2006
Title:
RADIO FREQUENCY DATA COMMUNICATIONS DEVICE
36
Patent #:
Issue Dt:
08/14/2007
Application #:
11293586
Filing Dt:
12/02/2005
Publication #:
Pub Dt:
04/20/2006
Title:
STATUS REGISTER TO IMPROVE INITIALIZATION OF A SYNCHRONOUS MEMORY
37
Patent #:
Issue Dt:
11/06/2007
Application #:
11295856
Filing Dt:
12/07/2005
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD AND APPARATUS FOR CONTROLLING REFRESH OPERATIONS IN A DYNAMIC MEMORY DEVICE
38
Patent #:
Issue Dt:
10/13/2009
Application #:
11296359
Filing Dt:
12/08/2005
Publication #:
Pub Dt:
04/27/2006
Title:
DYNAMICALLY SETTING BURST LENGTH OF MEMORY DEVICE BY APPLYING SIGNAL TO AT LEAST ONE EXTERNAL PIN DURING A READ OR WRITE TRANSACTION
39
Patent #:
Issue Dt:
09/09/2008
Application #:
11297087
Filing Dt:
12/07/2005
Publication #:
Pub Dt:
06/29/2006
Title:
SYSTEM AND METHOD FOR POWER SAVING DELAY LOCKED LOOP CONTROL BY SELECTIVELY LOCKING DELAY INTERVAL
40
Patent #:
Issue Dt:
02/27/2007
Application #:
11301575
Filing Dt:
12/13/2005
Publication #:
Pub Dt:
07/20/2006
Title:
METHODS AND APPARATUSES FOR ANALYZING AND CONTROLLING PERFORMANCE PARAMETERS IN MECHANICAL AND CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATES
41
Patent #:
Issue Dt:
09/11/2007
Application #:
11302056
Filing Dt:
12/13/2005
Publication #:
Pub Dt:
05/04/2006
Title:
SYNCHRONOUS MEMORY OPEN PAGE REGISTER
42
Patent #:
Issue Dt:
10/28/2008
Application #:
11303680
Filing Dt:
12/16/2005
Publication #:
Pub Dt:
06/21/2007
Title:
SYSTEM AND METHOD FOR PROVIDING TEMPERATURE DATA FROM A MEMORY DEVICE HAVING A TEMPERATURE SENSOR
43
Patent #:
Issue Dt:
03/11/2008
Application #:
11305597
Filing Dt:
12/16/2005
Publication #:
Pub Dt:
05/04/2006
Title:
APPLYING EPITAXIAL SILICON IN DISPOSABLE SPACER FLOW
44
Patent #:
NONE
Issue Dt:
Application #:
11312669
Filing Dt:
12/19/2005
Publication #:
Pub Dt:
05/11/2006
Title:
Wireless communication devices and methods of forming and operating the same
45
Patent #:
Issue Dt:
02/06/2007
Application #:
11313291
Filing Dt:
12/20/2005
Publication #:
Pub Dt:
07/27/2006
Title:
GENERATING MULTI-PHASE CLOCK SIGNALS USING HIERARCHICAL DELAYS
46
Patent #:
Issue Dt:
05/06/2008
Application #:
11318510
Filing Dt:
12/28/2005
Publication #:
Pub Dt:
05/18/2006
Title:
METHOD AND APPARATUS PROVIDING CMOS IMAGER DEVICE PIXEL WITH TRANSISTOR HAVING LOWER THRESHOLD VOLTAGE THAN OTHER IMAGER DEVICE TRANSISTORS
47
Patent #:
Issue Dt:
05/27/2008
Application #:
11321111
Filing Dt:
12/29/2005
Publication #:
Pub Dt:
05/18/2006
Title:
HIGH SELECTIVITY BPSG TO TEOS ETCHANT
48
Patent #:
Issue Dt:
10/30/2007
Application #:
11322819
Filing Dt:
12/30/2005
Publication #:
Pub Dt:
05/25/2006
Title:
METHOD FOR TWO-STAGE TRANSFER MOLDING DEVICE TO ENCAPSULATE MMC MODULE
49
Patent #:
Issue Dt:
04/01/2008
Application #:
11323530
Filing Dt:
12/30/2005
Publication #:
Pub Dt:
07/05/2007
Title:
CONFIGURABLE INPUTS AND OUTPUTS FOR MEMORY STACKING SYSTEM AND METHOD
50
Patent #:
Issue Dt:
10/16/2007
Application #:
11325293
Filing Dt:
01/04/2006
Publication #:
Pub Dt:
06/01/2006
Title:
BOND PAD REROUTING ELEMENT AND STACKED SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING THE REROUTING ELEMENT
51
Patent #:
Issue Dt:
06/03/2008
Application #:
11329482
Filing Dt:
01/10/2006
Publication #:
Pub Dt:
05/25/2006
Title:
ACTIVE TERMINATION CIRCUIT AND METHOD FOR CONTROLLING THE IMPEDANCE OF EXTERNAL INTEGRATED CIRCUIT TERMINALS
52
Patent #:
Issue Dt:
05/11/2010
Application #:
11329596
Filing Dt:
01/10/2006
Publication #:
Pub Dt:
05/25/2006
Title:
ACTIVE TERMINATION CIRCUIT AND METHOD FOR CONTROLLING THE IMPEDANCE OF EXTERNAL INTEGRATED CIRCUIT TERMINALS
53
Patent #:
Issue Dt:
09/25/2007
Application #:
11331300
Filing Dt:
01/11/2006
Publication #:
Pub Dt:
06/01/2006
Title:
APPARATUS AND METHOD FOR GENERATING A DELAYED CLOCK SIGNAL
54
Patent #:
Issue Dt:
01/29/2008
Application #:
11331573
Filing Dt:
01/13/2006
Publication #:
Pub Dt:
06/01/2006
Title:
SEMICONDUCTOR DEVICE HAVING RECESS AND PLANARIZED LAYERS
55
Patent #:
Issue Dt:
05/29/2007
Application #:
11333662
Filing Dt:
01/17/2006
Publication #:
Pub Dt:
06/01/2006
Title:
SEMICONDUCTOR COMPONENT HAVING PLATE AND STACKED DICE
56
Patent #:
Issue Dt:
10/09/2007
Application #:
11333786
Filing Dt:
01/17/2006
Publication #:
Pub Dt:
08/10/2006
Title:
APPARATUS FOR ASSISTING VIDEO COMPRESSION IN A COMPUTER SYSTEM
57
Patent #:
NONE
Issue Dt:
Application #:
11334038
Filing Dt:
01/17/2006
Publication #:
Pub Dt:
08/03/2006
Title:
Wireless identification device, RFID device with push-on/push-off switch, and method of manufacturing wireless identification device
58
Patent #:
Issue Dt:
05/13/2008
Application #:
11337617
Filing Dt:
01/23/2006
Publication #:
Pub Dt:
06/08/2006
Title:
METHOD OF FABRICATION OF STACKED SEMICONDUCTOR DEVICES
59
Patent #:
Issue Dt:
02/19/2008
Application #:
11338155
Filing Dt:
01/24/2006
Publication #:
Pub Dt:
06/08/2006
Title:
TECHNIQUES FOR STORING ACCURATE OPERATING CURRENT VALUES
60
Patent #:
Issue Dt:
07/31/2007
Application #:
11338200
Filing Dt:
01/24/2006
Publication #:
Pub Dt:
07/06/2006
Title:
TECHNIQUES FOR STORING ACCURATE OPERATING CURRENT VALUES
61
Patent #:
Issue Dt:
03/03/2009
Application #:
11338279
Filing Dt:
01/24/2006
Publication #:
Pub Dt:
06/08/2006
Title:
TECHNIQUES FOR STORING ACCURATE OPERATING CURRENT VALUES
62
Patent #:
Issue Dt:
09/08/2009
Application #:
11339784
Filing Dt:
01/25/2006
Publication #:
Pub Dt:
06/08/2006
Title:
APPARATUS AND METHOD FOR REDUCING REMOVAL FORCES FOR CMP PADS
63
Patent #:
Issue Dt:
01/01/2008
Application #:
11340899
Filing Dt:
01/27/2006
Publication #:
Pub Dt:
06/08/2006
Title:
SYSTEM AND METHOD FOR COMMUNICATING INFORMATION TO A MEMORY DEVICE USING A RECONFIGURED DEVICE PIN
64
Patent #:
Issue Dt:
10/02/2007
Application #:
11347162
Filing Dt:
02/02/2006
Publication #:
Pub Dt:
06/22/2006
Title:
DRAM POWER BUS CONTROL
65
Patent #:
Issue Dt:
12/09/2008
Application #:
11351047
Filing Dt:
02/08/2006
Publication #:
Pub Dt:
06/15/2006
Title:
METHOD AND CIRCUIT FOR OFF CHIP DRIVER CONTROL, AND MEMORY DEVICE USING SAME
66
Patent #:
Issue Dt:
10/16/2007
Application #:
11352685
Filing Dt:
02/13/2006
Publication #:
Pub Dt:
07/27/2006
Title:
METHODS FOR DESIGNING BOND PAD REROUTING ELEMENTS FOR USE IN STACKED SEMICONDUCTOR DEVICE ASSEMBLIES AND FOR ASSEMBLING SEMICONDUCTOR DEVICES
67
Patent #:
Issue Dt:
10/02/2007
Application #:
11353573
Filing Dt:
02/14/2006
Publication #:
Pub Dt:
06/15/2006
Title:
BURST WRITE IN A NON-VOLATILE MEMORY DEVICE
68
Patent #:
Issue Dt:
05/13/2008
Application #:
11356618
Filing Dt:
02/17/2006
Publication #:
Pub Dt:
07/13/2006
Title:
PORTABLE COMPUTER SUPPORTING PAGING INSTRUCTIONS
69
Patent #:
Issue Dt:
09/18/2007
Application #:
11357286
Filing Dt:
02/17/2006
Publication #:
Pub Dt:
07/13/2006
Title:
REDUCED CURRENT INPUT BUFFER CIRCUIT
70
Patent #:
Issue Dt:
04/15/2008
Application #:
11357343
Filing Dt:
02/21/2006
Publication #:
Pub Dt:
06/29/2006
Title:
METHOD OF FABRICATING AN IMAGING DEVICE FOR COLLECTING PHOTONS
71
Patent #:
Issue Dt:
06/26/2007
Application #:
11358354
Filing Dt:
02/21/2006
Publication #:
Pub Dt:
06/29/2006
Title:
FLASH MEMORY ARCHITECTURE FOR OPTIMIZING PERFORMANCE OF MEMORY HAVING MULTI-LEVEL MEMORY CELLS
72
Patent #:
Issue Dt:
12/09/2008
Application #:
11360164
Filing Dt:
02/23/2006
Publication #:
Pub Dt:
06/29/2006
Title:
TEMPERATURE SENSING DEVICE IN AN INTEGRATED CIRCUIT
73
Patent #:
Issue Dt:
11/04/2008
Application #:
11362063
Filing Dt:
02/24/2006
Publication #:
Pub Dt:
07/06/2006
Title:
METHODS OF FORMING A PLURALITY OF CAPACITORS
74
Patent #:
Issue Dt:
08/07/2007
Application #:
11367468
Filing Dt:
03/03/2006
Publication #:
Pub Dt:
07/13/2006
Title:
MEMORY DEVICE AND METHOD HAVING LOW-POWER, HIGH WRITE LATENCY MODE AND HIGH-POWER, LOW WRITE LATENCY MODE AND/OR INDEPENDENTLY SELECTABLE WRITE LATENCY
75
Patent #:
Issue Dt:
01/09/2007
Application #:
11369348
Filing Dt:
03/07/2006
Publication #:
Pub Dt:
07/06/2006
Title:
FLASH MEMORY PROGRAMMING
76
Patent #:
Issue Dt:
10/16/2007
Application #:
11370455
Filing Dt:
03/07/2006
Publication #:
Pub Dt:
07/06/2006
Title:
RADIO FREQUENCY DATA COMMUNICATIONS DEVICE WITH SELECTIVELY REMOVABLE ANTENNA PORTION AND METHOD
77
Patent #:
Issue Dt:
05/06/2008
Application #:
11371657
Filing Dt:
03/08/2006
Publication #:
Pub Dt:
07/27/2006
Title:
METAL GATE ENGINEERING FOR SURFACE P-CHANNEL DEVICES
78
Patent #:
Issue Dt:
12/29/2009
Application #:
11374728
Filing Dt:
03/13/2006
Publication #:
Pub Dt:
07/13/2006
Title:
METHODS OF FABRICATION FOR FLIP-CHIP IMAGE SENSOR PACKAGES
79
Patent #:
Issue Dt:
12/30/2008
Application #:
11375632
Filing Dt:
03/14/2006
Publication #:
Pub Dt:
07/20/2006
Title:
PROGRAMABLE IDENTIFICATION CIRCUITRY
80
Patent #:
Issue Dt:
07/31/2007
Application #:
11380617
Filing Dt:
04/27/2006
Publication #:
Pub Dt:
09/07/2006
Title:
DOUBLE DATA RATE SCHEME FOR DATA OUTPUT
81
Patent #:
Issue Dt:
02/26/2008
Application #:
11388226
Filing Dt:
03/23/2006
Publication #:
Pub Dt:
09/14/2006
Title:
FAST-LOCKING DIGITAL PHASE LOCKED LOOP
82
Patent #:
Issue Dt:
05/13/2008
Application #:
11393265
Filing Dt:
03/29/2006
Publication #:
Pub Dt:
10/26/2006
Title:
METHOD AND APPARATUS FOR GENERATING EXPECT DATA FROM A CAPTURED BIT PATTERN, AND MEMORY DEVICE USING SAME
83
Patent #:
Issue Dt:
10/02/2007
Application #:
11394506
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
08/03/2006
Title:
LOW POWER AND LOW TIMING JITTER PHASE-LOCK LOOP AND METHOD
84
Patent #:
Issue Dt:
02/27/2007
Application #:
11394997
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
08/31/2006
Title:
HIGH SPEED DATA BUS
85
Patent #:
Issue Dt:
03/02/2010
Application #:
11397419
Filing Dt:
04/03/2006
Publication #:
Pub Dt:
08/24/2006
Title:
METHODS AND APPARATUSES FOR ELECTROCHEMICAL-MECHANICAL POLISHING
86
Patent #:
Issue Dt:
08/19/2008
Application #:
11398018
Filing Dt:
04/04/2006
Publication #:
Pub Dt:
08/03/2006
Title:
MEMORY HUB BYPASS CIRCUIT AND METHOD
87
Patent #:
Issue Dt:
06/05/2007
Application #:
11398269
Filing Dt:
04/05/2006
Publication #:
Pub Dt:
09/07/2006
Title:
WRITE ADDRESS SYNCHRONIZATION USEFUL FOR A DDR PREFETCH SDRAM
88
Patent #:
Issue Dt:
04/17/2007
Application #:
11399873
Filing Dt:
04/07/2006
Publication #:
Pub Dt:
08/10/2006
Title:
SYSTEM AND METHOD FOR MEMORY HUB-BASED EXPANSION BUS
89
Patent #:
Issue Dt:
02/06/2007
Application #:
11399905
Filing Dt:
04/07/2006
Publication #:
Pub Dt:
08/31/2006
Title:
SYSTEM AND METHOD FOR MEMORY HUB-BASED EXPANSION BUS
90
Patent #:
Issue Dt:
05/22/2007
Application #:
11399986
Filing Dt:
04/07/2006
Publication #:
Pub Dt:
08/10/2006
Title:
SYSTEM AND METHOD FOR MEMORY HUB-BASED EXPANSION BUS
91
Patent #:
Issue Dt:
04/22/2008
Application #:
11402479
Filing Dt:
04/11/2006
Publication #:
Pub Dt:
08/17/2006
Title:
METHOD AND SYSTEM FOR LOW POWER REFRESH OF DYNAMIC RANDOM ACCESS MEMORIES
92
Patent #:
Issue Dt:
05/22/2007
Application #:
11402549
Filing Dt:
04/12/2006
Publication #:
Pub Dt:
08/31/2006
Title:
NON-VOLATILE MEMORY DEVICE WITH ERASE ADDRESS REGISTER
93
Patent #:
Issue Dt:
12/09/2008
Application #:
11405112
Filing Dt:
04/17/2006
Publication #:
Pub Dt:
08/24/2006
Title:
METHOD FOR MAKING LARGE-AREA FED APPARATUS
94
Patent #:
Issue Dt:
03/04/2008
Application #:
11407780
Filing Dt:
04/20/2006
Publication #:
Pub Dt:
08/24/2006
Title:
SEQUENTIAL NIBBLE BURST ORDERING FOR DATA
95
Patent #:
Issue Dt:
08/26/2008
Application #:
11408285
Filing Dt:
04/19/2006
Publication #:
Pub Dt:
09/21/2006
Title:
MEMORY HUB AND METHOD FOR PROVIDING MEMORY SEQUENCING HINTS
96
Patent #:
Issue Dt:
10/23/2007
Application #:
11412157
Filing Dt:
04/25/2006
Publication #:
Pub Dt:
09/07/2006
Title:
SYSTEMS INCLUDING DIFFERENTIAL PRESSURE APPLICATION APPARATUS
97
Patent #:
Issue Dt:
05/06/2008
Application #:
11413438
Filing Dt:
04/28/2006
Publication #:
Pub Dt:
09/14/2006
Title:
ATOMIC LAYER DEPOSITION METHODS
98
Patent #:
Issue Dt:
05/26/2009
Application #:
11413466
Filing Dt:
04/28/2006
Publication #:
Pub Dt:
11/01/2007
Title:
ALD METHODS IN WHICH TWO OR MORE DIFFERENT PRECURSORS ARE UTILIZED WITH ONE OR MORE REACTANTS TO FORM MATERIAL OVER SUBSTRATES
99
Patent #:
Issue Dt:
09/11/2007
Application #:
11413793
Filing Dt:
04/28/2006
Publication #:
Pub Dt:
09/07/2006
Title:
MEMORY STACKING SYSTEM AND METHOD
100
Patent #:
Issue Dt:
05/27/2008
Application #:
11414407
Filing Dt:
04/28/2006
Publication #:
Pub Dt:
09/14/2006
Title:
ATOMIC LAYER DEPOSITION METHODS
Assignor
1
Exec Dt:
12/23/2009
Assignee
1
26 DEER CREEK LANE
MT. KISCO, NEW YORK 10549
Correspondence name and address
CHRISTOPHER C. HENRY
ROPES & GRAY LLP
1211 AVENUE OF THE AMERICAS
NEW YORK, NEW YORK 10036

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