|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2000
|
Application #:
|
08826827
|
Filing Dt:
|
04/08/1997
|
|
Title:
|
MEMORY CONTROLLER WITH BUFFERED CAS/RAS EXTERNAL SYNCHRONIZATION CAPABILITY FOR REDUCING THE EFFECTS OF CLOCK-TO-SIGNAL SKEW
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08827037
|
Filing Dt:
|
03/25/1997
|
|
Title:
|
ANTI-THEFT METHOD FOR DETECTING THE UNAUTHORIZED OPENING OF CONTAINERS AND BAGGAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08827867
|
Filing Dt:
|
04/11/1997
|
|
Title:
|
SPEED CONTROLLED TELEPHONE CREDIT CARD VERIFICATION SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08831181
|
Filing Dt:
|
04/02/1997
|
|
Title:
|
METHOD OF FORMING HEMISPHERICAL GRAINED SILICON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08832947
|
Filing Dt:
|
04/04/1997
|
|
Title:
|
DATA INPUT/OUTPUT CIRCUIT FOR PERFORMING HIGH SPEED MEMORY DATA READ OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/02/1998
|
Application #:
|
08833289
|
Filing Dt:
|
04/04/1997
|
|
Title:
|
DATA INPUT/OUTPUT CIRCUIT FOR PERFORMING HIGH SPEED MEMORY DATA READ OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08833315
|
Filing Dt:
|
04/04/1997
|
|
Title:
|
DATA INPUT/OUTPUT CIRCUIT FOR PERFORMING HIGH SPEED MEMORY DATA READ OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08833376
|
Filing Dt:
|
04/04/1997
|
|
Title:
|
MEMORY DEVICE WITH STAGGERED DATA PATHS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/1999
|
Application #:
|
08834289
|
Filing Dt:
|
04/15/1997
|
|
Title:
|
METHOD OF FORMING BATTERIES WITH PRINTED CATHODE LAYERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/1998
|
Application #:
|
08834292
|
Filing Dt:
|
04/15/1997
|
|
Title:
|
MULTILAYERED BATTERY HAVING A CURED CONDUCTIVE INK LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/1998
|
Application #:
|
08835138
|
Filing Dt:
|
04/04/1997
|
|
Title:
|
CHAMBERED FORCED COOLING SYSTEM AND METHOD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2002
|
Application #:
|
08835611
|
Filing Dt:
|
04/09/1997
|
|
Title:
|
ELECTRICAL ASSEMBLY FOR SEMICONDUCTOR DICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
08835732
|
Filing Dt:
|
04/11/1997
|
|
Title:
|
BACKLIGHTING SYSTEM FOR AN LCD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/1998
|
Application #:
|
08835867
|
Filing Dt:
|
04/08/1997
|
|
Title:
|
MEMORY-CELL ARRAY AND A METHOD FOR REPAIRING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
08838394
|
Filing Dt:
|
04/09/1997
|
|
Title:
|
ABRASIVE POLISHING PAD WITH COVALENTLY BONDED ABRASIVE PARTICLES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/1999
|
Application #:
|
08839873
|
Filing Dt:
|
04/17/1997
|
|
Title:
|
METHOD AND APPARATUS FOR A HIGH SPEED CYCLICAL REDUNDANCY CHECK SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2000
|
Application #:
|
08841990
|
Filing Dt:
|
04/08/1997
|
|
Title:
|
A PROTECTION FOR USE DURING BURN-IN TESTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/1998
|
Application #:
|
08842303
|
Filing Dt:
|
04/23/1997
|
|
Title:
|
METHOD TO FORM HEMI-SPHERICAL GRAIN (HSG) SILICON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/1998
|
Application #:
|
08842550
|
Filing Dt:
|
04/15/1997
|
|
Title:
|
MULTILAYERED BATTERY HAVING A CURED CONDUCTIVE INK LAYER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/1998
|
Application #:
|
08842594
|
Filing Dt:
|
04/15/1997
|
|
Title:
|
METHOD FOR FORMING BATTERY CONSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2001
|
Application #:
|
08842950
|
Filing Dt:
|
04/25/1997
|
|
Title:
|
METHOD FOR COUPLING TO SEMICONDUCTOR DEVICE IN AN INTEGRATED CIRCUIT HAVING EDGE-DEFINED SUB-LITHOGRAPHIC CONDUCTORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
08843289
|
Filing Dt:
|
04/11/1997
|
|
Title:
|
DUAL POINTING DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/1998
|
Application #:
|
08843394
|
Filing Dt:
|
04/15/1997
|
|
Title:
|
SEMICONDUCTOR PACKAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
08844669
|
Filing Dt:
|
04/18/1997
|
|
Title:
|
METHOD OF FABRICATION OF STACKED SEMICONDUCTOR DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2001
|
Application #:
|
08846725
|
Filing Dt:
|
04/30/1997
|
|
Title:
|
MEMORY CELL INCORPORATING A CHALCOGENIDE ELEMENT AND METHOD OF MAKING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/1999
|
Application #:
|
08846728
|
Filing Dt:
|
04/30/1997
|
|
Title:
|
METHOD FOR FABRICATING AN ARRAY OF ULTRA-SMALL PORES FOR CHALCOGENIDE MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
08846732
|
Filing Dt:
|
04/30/1997
|
|
Title:
|
FABRICATION OF THREE DIMENSIONAL CONTAINER DIODE FOR USE WITH MULTI-STATE MATERIAL IN A NON-VOLATILE MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2001
|
Application #:
|
08847123
|
Filing Dt:
|
05/01/1997
|
|
Title:
|
METHODS FOR FORMING INTEGRATED CIRCUITS WITHIN SUBSTRATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
08847824
|
Filing Dt:
|
04/28/1997
|
|
Title:
|
METHOD OF MAKING AN INTEGRATED CIRCUIT ELECTRODE HAVING A REDUCED CONTACT AREA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/1998
|
Application #:
|
08848529
|
Filing Dt:
|
04/28/1997
|
|
Title:
|
MEMORY AND OTHER INTEGRATED CIRCUITRY HAVING A CONDUCTIVE INTERCONNECT LINE PITCH OF LESS THAN 0.6 MICRON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/1999
|
Application #:
|
08852905
|
Filing Dt:
|
05/08/1997
|
|
Title:
|
SINGLE DEPOSITION LAYER METAL DYNAMIC RANDOM ACCESS MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2003
|
Application #:
|
08852909
|
Filing Dt:
|
05/08/1997
|
|
Title:
|
METHOD OF MAKING A SINGLE-DEPOSITION-LAYER-METAL DYNAMIC RANDOM ACCESS MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
08852911
|
Filing Dt:
|
05/08/1997
|
|
Title:
|
SINGLE DEPOSITION LAYER METAL DYNAMIC RANDOM ACCESS MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08853133
|
Filing Dt:
|
05/08/1997
|
|
Title:
|
REFERENCE VOLTAGE GENERATOR USING FLASH MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08853308
|
Filing Dt:
|
05/08/1997
|
|
Title:
|
APPARATUS AND METHOD TO DETERMINE CAUSE OF FAILED BOOT SEQUENCE TO IMPROVE LIKELIHOOD OF SUCCESSFUL SUBSEQUENT BOOT ATTEMPT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/1998
|
Application #:
|
08853852
|
Filing Dt:
|
05/09/1997
|
|
Title:
|
ELECTRONIC CIRCUIT BONDING INTERCONNECT COMPONENT AND FLIP CHIP INTERCONNECT BOND
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08854220
|
Filing Dt:
|
05/09/1997
|
|
Title:
|
SMALL ELECTRODE FOR A CHALCOGENIDE SWITCHING DEVICE AND METHOD FOR FABRICATING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08858021
|
Filing Dt:
|
05/16/1997
|
|
Title:
|
METHODS OF FIXTURING FLEXIBLE CIRCUIT SUBSTRATES AND A PROCESSING CARRIER, PROCESSING A FLEXIBLE CIRCUIT AND PROCESSING A FLEXIBLE CIRCUIT SUBSTRATE RELATIVE TO A PROCESSING CARRIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2004
|
Application #:
|
08858022
|
Filing Dt:
|
05/16/1997
|
|
Title:
|
METHODS OF FIXTURING FLEXIBLE SUBSTRATES AND METHODS OF PROCESSING FLEXIBLE SUBSTRATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08858026
|
Filing Dt:
|
05/16/1997
|
|
Title:
|
METHODS OF ENHANCING ELECTROMAGNETIC RADIATION PROPERTIES OF ENCAPSULATED CIRCUIT, AND RELATED DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/1999
|
Application #:
|
08859015
|
Filing Dt:
|
05/20/1997
|
|
Title:
|
METHOD AND SYSTEM FOR USING A VIRTUAL REGISTER FILE IN SYSTEM MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08859894
|
Filing Dt:
|
05/21/1997
|
|
Title:
|
COMPUTER SYSTEM WITH A SWITCH INTERCONNECTOR FOR COMPUTER DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/1999
|
Application #:
|
08865507
|
Filing Dt:
|
05/30/1997
|
|
Title:
|
TIMING CONTROL FOR A MATRIXED SCANNED ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1998
|
Application #:
|
08866887
|
Filing Dt:
|
05/30/1997
|
|
Title:
|
METHOD OF FORMING CMOS INTEGRATED CIRCUITRY HAVING HALO REGIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/1999
|
Application #:
|
08867025
|
Filing Dt:
|
06/02/1997
|
|
Title:
|
TEMPERATURE SENSITIVE OSCILLATOR CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/1999
|
Application #:
|
08867026
|
Filing Dt:
|
06/02/1997
|
|
Title:
|
TEMPERATURE SENSITIVE OSCILLATOR CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/1999
|
Application #:
|
08868051
|
Filing Dt:
|
06/03/1997
|
|
Title:
|
BUTTON TYPE BATTERY WITH IMPROVED SEPARATOR AND GASKET CONSTRUCTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
08868064
|
Filing Dt:
|
06/03/1997
|
|
Title:
|
DIMPLED THERMAL PROCESSING FURNACE TUBE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
08869441
|
Filing Dt:
|
06/05/1997
|
|
Title:
|
THIN PROFILE BATTERY MOUNTING CONTACT FOR PRINTED CIRCUIT BOARDS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2000
|
Application #:
|
08870786
|
Filing Dt:
|
06/06/1997
|
|
Title:
|
SEMICONDUCTOR PROCESSING METHODS OF FORMING STACKED CAPACITORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/1999
|
Application #:
|
08871202
|
Filing Dt:
|
06/09/1997
|
|
Title:
|
DYNAMIC ADDRESS REMAPPING DECODER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2003
|
Application #:
|
08872010
|
Filing Dt:
|
06/10/1997
|
|
Title:
|
BROADBAND CABLE TELEVISION AND COMPUTER NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/1999
|
Application #:
|
08872011
|
Filing Dt:
|
06/09/1997
|
|
Title:
|
METHOD AND SYSTEM FOR INDICATING COMPUTER STATUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/1999
|
Application #:
|
08873059
|
Filing Dt:
|
06/11/1997
|
|
Title:
|
METHOD AND APPARATUS FOR SELECTIVELY CONDITIONING A POLISHING PAD USED IN PLANARIZNG SUBSTRATES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
08873213
|
Filing Dt:
|
06/11/1997
|
|
Title:
|
DATA TRANSFER METHOD FOR A BUS DEVICE IN A COMPUTER SYSTEM BY PLACING FIRST AND SECOND ADDRESSES CORRESPONDING TO A BRIDGE AND WITH THE BUS DEVICE RESPECTIVELY ON A BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/2000
|
Application #:
|
08873994
|
Filing Dt:
|
06/11/1997
|
|
Title:
|
SYSTEM FOR COMMUNICATING THROUGH A COMPUTER SYSTEM BUS BRIDGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2000
|
Application #:
|
08874315
|
Filing Dt:
|
06/13/1997
|
|
Title:
|
METHOD AND APPARATUS FOR TRANSFERRING TEST DATA FROM A MEMORY ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/1999
|
Application #:
|
08874690
|
Filing Dt:
|
06/13/1997
|
|
Title:
|
TWO STEP MEMORY DEVICE COMMAND BUFFER APPARATUS AND METHOD AND MEMORY DEVICES AND COMPUTER SYSTEMS USING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2000
|
Application #:
|
08874779
|
Filing Dt:
|
06/13/1997
|
|
Title:
|
LOW SCRATCH DENSITY CHEMICAL MECHANICAL PLANARIZATION PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/1998
|
Application #:
|
08874973
|
Filing Dt:
|
06/13/1997
|
|
Title:
|
METHOD AND SYSTEM FOR STORING AND PROCESSING MULTIPLE MEMORY ADDRESSES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2000
|
Application #:
|
08876454
|
Filing Dt:
|
06/16/1997
|
|
Title:
|
MEMORY CELL HAVING A REDUCED ACTIVE AREA AND A MEMORY ARRAY INCORPORATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2000
|
Application #:
|
08877082
|
Filing Dt:
|
06/17/1997
|
|
Title:
|
METHOD FOR LOCATING A STOLEN ELECTRONIC DEVICE USING ELECTRONIC MAIL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/1999
|
Application #:
|
08877123
|
Filing Dt:
|
06/17/1997
|
|
Title:
|
INTEGRATED CIRCUIT WITH SUPPLY VOLTAGE DETECTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/25/2000
|
Application #:
|
08877133
|
Filing Dt:
|
06/17/1997
|
|
Title:
|
MEMORY DEVICE WITH PIPELINED ADDRESS PATH
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
08877191
|
Filing Dt:
|
06/17/1997
|
|
Title:
|
METHOD AND SYSTEM FOR STORING AND PROCESSING MULTIPLE MEMORY COMMANDS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/1999
|
Application #:
|
08877229
|
Filing Dt:
|
06/17/1997
|
|
Title:
|
INTEGRATED CIRCUIT WITH TEMPERATURE DETECTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/1999
|
Application #:
|
08877253
|
Filing Dt:
|
06/17/1997
|
|
Title:
|
CLOCK SIGNAL FROM AN ADJUSTABLE OSCILLATOR FOR AN INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1999
|
Application #:
|
08877957
|
Filing Dt:
|
06/18/1997
|
|
Title:
|
METHOD AND APPARATUS FOR LOCAL CONTROL SIGNAL GENERATION IN A MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/03/2000
|
Application #:
|
08877959
|
Filing Dt:
|
06/17/1997
|
|
Title:
|
APPARATUS FOR LOCATING A STOLEN ELECTRONIC DEVICE USING ELECTRONIC MAIL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/29/2000
|
Application #:
|
08878450
|
Filing Dt:
|
06/18/1997
|
|
Title:
|
CONTACT STRUCTURE AND MEMORY ELEMENT INCORPORATING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/1999
|
Application #:
|
08878729
|
Filing Dt:
|
06/19/1997
|
|
Title:
|
LIQUID VAPOR DEPOSITION OR ETCHING METHOD
|
|
|
|
|
Patent #:
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Issue Dt:
|
08/10/1999
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Application #:
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08879207
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Filing Dt:
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06/19/1997
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Title:
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HIGH DENSITY SEMICONDUCTOR MEMORY AND METHOD OF MAKING
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|
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Patent #:
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Issue Dt:
|
12/21/1999
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Application #:
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08879845
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Filing Dt:
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06/20/1997
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Title:
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MEMORY DEVICE WITH PIPELINED COLUMN ADDRESS PATH
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Patent #:
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Issue Dt:
|
01/09/2001
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Application #:
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08879847
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Filing Dt:
|
06/20/1997
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Title:
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METHOD AND APPARATUS FOR GENERATING A SEQUENCE OF CLOCK SIGNALS
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Patent #:
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Issue Dt:
|
09/01/1998
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Application #:
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08879848
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Filing Dt:
|
06/20/1997
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Title:
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THIN PROFILE BATTERY WITH IMPROVED SEPERATOR AND GASKET CONSTRUCTION
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Patent #:
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Issue Dt:
|
01/19/1999
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Application #:
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08880175
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Filing Dt:
|
06/20/1997
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Title:
|
CHAMBERED FORCED COOLING METHOD
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|
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Patent #:
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|
Issue Dt:
|
07/01/2003
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Application #:
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08881852
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Filing Dt:
|
06/24/1997
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Publication #:
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Pub Dt:
|
04/25/2002
| | | | |
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Title:
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METHOD OF FORMING A SEMICONDUCTOR-ON-INSULATOR TRANSISTOR
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|
|
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Patent #:
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|
Issue Dt:
|
01/05/1999
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Application #:
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08881918
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Filing Dt:
|
06/25/1997
|
|
Title:
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METHOD FOR ALIGNING A CONTROL SIGNAL AND A CLOCK SIGNAL
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|
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Patent #:
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|
Issue Dt:
|
06/19/2001
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Application #:
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08882054
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Filing Dt:
|
06/25/1997
|
|
Title:
|
GART AND PTES DEFINED BY CONFIGURATION REGISTERS
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|
|
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Patent #:
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|
Issue Dt:
|
08/28/2001
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Application #:
|
08882327
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Filing Dt:
|
06/25/1997
|
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Title:
|
GART AND PITES DEFINED BY CONFIGURAT ION REGISTERS
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|
|
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Patent #:
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|
Issue Dt:
|
05/30/2000
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Application #:
|
08882428
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Filing Dt:
|
06/25/1997
|
|
Title:
|
SYSTEM FOR ACCELERATED GRAPHICS PORT ADDRESS REMAPPING INTERFACE TO MAIN MEMORY
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|
|
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Patent #:
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|
Issue Dt:
|
10/06/1998
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Application #:
|
08882559
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Filing Dt:
|
06/25/1997
|
|
Title:
|
MEMORY CONTROLLER WITH LOW SKEW CONTROL SIGNAL
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|
|
|
|
Patent #:
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|
Issue Dt:
|
12/21/1999
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Application #:
|
08884925
|
Filing Dt:
|
06/30/1997
|
|
Title:
|
INTEGRATED CIRCUITRY, DRAM CELLS, CAPACITORS, AND METHODS OF FORMING INTEGRATED CIRCUITRY, DRAM CELLS AND CAPACITORS
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|
|
|
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Patent #:
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|
Issue Dt:
|
02/27/2001
|
Application #:
|
08886525
|
Filing Dt:
|
07/02/1997
|
|
Title:
|
SYSTEM FOR IMPLEMENTING A GRAPHIC ADDRESS REMAPPING TABLE AS A VIRTUAL REGISTER FILE IN SYSTEM MEMORY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2001
|
Application #:
|
08886753
|
Filing Dt:
|
07/01/1997
|
|
Title:
|
PIPELINED PACKET-ORIENTED MEMORY SYSTEM HAVING A UNIDIRECTIONAL COMMAND AND ADDRESS BUS AND A BIDIRECTIONAL DATA BUS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2000
|
Application #:
|
08886908
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Filing Dt:
|
07/02/1997
|
|
Title:
|
APPARATUS FOR PERFORMING A LOW LATENCY MEMORY READ WITH CONCURRENT SNOOP
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/1999
|
Application #:
|
08887039
|
Filing Dt:
|
07/02/1997
|
|
Title:
|
LOW LATENCY MEMORY READ WITH CONCURRENT PIPELINED SNOOPS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2001
|
Application #:
|
08887041
|
Filing Dt:
|
07/02/1997
|
|
Title:
|
METHOD OF PROCESSING MEMORY TRANSACTIONS IN A COMPUTER SYSTEM HAVING DUAL SYSTEM MEMORIES AND MEMORY CONTROLLERS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2000
|
Application #:
|
08887042
|
Filing Dt:
|
07/02/1997
|
|
Title:
|
A SEGMENTED MEMORY SYSTEM EMPLOYING DIFFERENT INTERLEAVING SCHEME FOR EACH DIFFERENT MEMEORY SEGMENT
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/1999
|
Application #:
|
08887612
|
Filing Dt:
|
07/03/1997
|
|
Title:
|
METHOD OF IMPROVING ALIGNMENT SIGNAL STRENGTH BY REDUCING REFRACTION INDEX AT INTERFACE OF MATERIALS IN SEMICONDUCTORS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/27/2001
|
Application #:
|
08887742
|
Filing Dt:
|
07/03/1997
|
|
Title:
|
CAPACITORS, DRAM ARRAYS, MONOLITHIC INTEGRATED CIRCUITS, AND METHODS OF FORMING CAPACITORS, DRAM ARRAYS, AND MONOLITHIC INTEGRATED CIRCUITS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2001
|
Application #:
|
08887868
|
Filing Dt:
|
07/02/1997
|
|
Title:
|
METHOD FOR IMPLEMENTING A GRAPHIC ADDRESS REMAPPING TABLE AS A VIRTUAL REGISTER FILE IN SYSTEM MEMORY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08888353
|
Filing Dt:
|
07/03/1997
|
|
Title:
|
METHOD OF FORMING THIN PROFILE BATTERIES AND METHODS OF PROVIDING SEALING GASKETS BETWEEN TERMINAL HOUSING MEMBERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
08890055
|
Filing Dt:
|
07/09/1997
|
|
Title:
|
METHOD AND APPARATUS FOR ADAPTIVELY ADJUSTING THE TIMING OF A CLOCK SIGNAL USED TO LATCH DIGITAL SIGNALS AND MEMORY DEVICE USING SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08890418
|
Filing Dt:
|
07/09/1997
|
|
Title:
|
ADDRESS STROBE RECOGNITION IN A MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/1998
|
Application #:
|
08890921
|
Filing Dt:
|
07/10/1997
|
|
Title:
|
LOW POWER, HIGH SPEED LEVEL SHIFTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1999
|
Application #:
|
08891557
|
Filing Dt:
|
07/11/1997
|
|
Title:
|
CONTINUOUS BURST EDO MEMORY DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2001
|
Application #:
|
08892188
|
Filing Dt:
|
07/14/1997
|
|
Title:
|
METHOD TO FORM HEMISPHERICAL GRAINED POLYSILICON
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
08892607
|
Filing Dt:
|
07/14/1997
|
|
Title:
|
ARCHITECTURE AND PACKAGE ORIENTATION FOR HIGH SPEED MEMORY DEVICES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/1999
|
Application #:
|
08893368
|
Filing Dt:
|
07/15/1997
|
|
Title:
|
DPSK DEMODULATOR WHICH MAY BE USED IN AN INTERROGATOR OF A REMOTE INTELLIGENCE COMMUNICATION SYSTEM
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|
