Total properties:
45
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10094761
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Filing Dt:
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03/11/2002
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Publication #:
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Pub Dt:
|
01/02/2003
| | | | |
Title:
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TRANSMISSION LINE STRUCTURE WITH AN AIR DIELECTRIC
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Patent #:
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Issue Dt:
|
08/23/2005
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Application #:
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10370422
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Filing Dt:
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02/19/2003
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Publication #:
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Pub Dt:
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11/06/2003
| | | | |
Title:
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METHOD OF BONDING A SEMICONDUCTOR DIE WITHOUT AN ESD CIRCUIT AND A SEPARATE ESD CIRCUIT TO AN EXTERNAL LEAD, AND A SEMICONDUCTOR DEVICE MADE THEREBY
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Patent #:
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Issue Dt:
|
12/11/2007
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Application #:
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10426930
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Filing Dt:
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04/29/2003
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Publication #:
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Pub Dt:
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12/04/2003
| | | | |
Title:
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DIRECT-CONNECT INTEGRATED CIRCUIT SIGNALING SYSTEM FOR BYPASSING INTRA-SUBSTRATE PRINTED CIRCUIT SIGNAL PATHS
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Patent #:
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Issue Dt:
|
04/26/2005
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Application #:
|
10608255
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Filing Dt:
|
06/27/2003
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Title:
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ARRAY CONNECTOR WITH DEFLECTABLE COUPLING STRUCTURE FOR MATING WITH OTHER COMPONENTS
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Patent #:
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Issue Dt:
|
05/10/2005
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Application #:
|
10632730
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Filing Dt:
|
07/31/2003
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Title:
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MULTI-PATH VIA INTERCONNECTION STRUCTURES AND METHODS FOR MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
|
03/21/2006
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Application #:
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10756924
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Filing Dt:
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01/13/2004
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Publication #:
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Pub Dt:
|
01/20/2005
| | | | |
Title:
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SYSTEM FOR MAKING HIGH-SPEED CONNECTIONS TO BOARD-MOUNTED MODULES
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Patent #:
|
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Issue Dt:
|
12/11/2007
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Application #:
|
10757000
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Filing Dt:
|
01/13/2004
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Publication #:
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Pub Dt:
|
07/29/2004
| | | | |
Title:
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MEMORY CHAIN
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Patent #:
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Issue Dt:
|
09/19/2006
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Application #:
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10823499
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Filing Dt:
|
04/12/2004
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Publication #:
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Pub Dt:
|
11/25/2004
| | | | |
Title:
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MEMORY SYSTEM HAVING A MULTIPLEXED HIGH-SPEED CHANNEL
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|
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Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
10857830
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Filing Dt:
|
06/01/2004
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Title:
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LOW PROFILE DISCRETE ELECTRONIC COMPONENTS AND APPLICATIONS OF SAME
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|
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Patent #:
|
|
Issue Dt:
|
06/13/2006
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Application #:
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10947686
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Filing Dt:
|
09/23/2004
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Publication #:
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Pub Dt:
|
05/05/2005
| | | | |
Title:
|
MULTI-SURFACE IC PACKAGING STRUCTURES AND METHODS FOR THEIR MANUFACTURE
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|
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Patent #:
|
|
Issue Dt:
|
06/08/2010
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Application #:
|
10964578
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Filing Dt:
|
10/12/2004
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Publication #:
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|
Pub Dt:
|
05/05/2005
| | | | |
Title:
|
MULTI-SURFACE CONTACT IC PACKAGING STRUCTURES AND ASSEMBLIES
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|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
10973172
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Filing Dt:
|
10/25/2004
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Title:
|
STRUCTURES AND METHODS FOR WIRE BONDING OVER ACTIVE, BRITTLE AND LOW K DIELECTRIC AREAS OF AN IC CHIP
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|
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Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
10977355
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Filing Dt:
|
10/29/2004
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Title:
|
PARTITIONED INTEGRATED CIRCUIT PACKAGE WITH CENTRAL CLOCK DRIVER
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|
|
Patent #:
|
|
Issue Dt:
|
06/17/2008
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Application #:
|
10987187
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Filing Dt:
|
11/12/2004
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Publication #:
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|
Pub Dt:
|
06/23/2005
| | | | |
Title:
|
TAPERED DIELECTRIC AND CONDUCTOR STRUCTURES AND APPLICATIONS THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
10990280
|
Filing Dt:
|
11/15/2004
|
Publication #:
|
|
Pub Dt:
|
05/19/2005
| | | | |
Title:
|
STAIR STEP PRINTED CIRCUIT BOARD STRUCTURES FOR HIGH SPEED SIGNAL TRANSMISSIONS
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|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
11033354
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Filing Dt:
|
01/07/2005
|
Publication #:
|
|
Pub Dt:
|
07/07/2005
| | | | |
Title:
|
INSULATING SUBSTRATE FOR IC PACKAGES HAVING INTEGRAL ESD PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2010
|
Application #:
|
11055578
|
Filing Dt:
|
02/09/2005
|
Publication #:
|
|
Pub Dt:
|
09/01/2005
| | | | |
Title:
|
INTERCONNECT SYSTEM WITHOUT THROUGH-HOLES
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|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11055579
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Filing Dt:
|
02/09/2005
|
Publication #:
|
|
Pub Dt:
|
10/27/2005
| | | | |
Title:
|
HIGH SPEED, DIRECT PATH, STAIR-STEP, ELECTRONIC CONNECTORS WITH IMPROVED SIGNAL INTEGRITY CHARACTERISTICS AND METHODS FOR THEIR MANUFACTURE
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|
|
Patent #:
|
|
Issue Dt:
|
12/18/2007
|
Application #:
|
11062112
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Filing Dt:
|
02/18/2005
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Title:
|
IC PACKAGING INTERPOSER HAVING CONTROLLED IMPEDANCE OR OPTICAL INTERCONNECTIONS AND AN INTEGRAL HEAT SPREADER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
11092034
|
Filing Dt:
|
03/28/2005
|
Publication #:
|
|
Pub Dt:
|
09/29/2005
| | | | |
Title:
|
ACTIVE CONNECTOR
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|
|
Patent #:
|
|
Issue Dt:
|
03/20/2007
|
Application #:
|
11093266
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Filing Dt:
|
03/28/2005
|
Publication #:
|
|
Pub Dt:
|
10/06/2005
| | | | |
Title:
|
ELECTRICAL INTERCONNECTION DEVICES INCORPORATING REDUNDANT CONTACT POINTS FOR REDUCING CAPACITIVE STUBS AND IMPROVED SIGNAL INTEGRITY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2007
|
Application #:
|
11097450
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Filing Dt:
|
04/01/2005
|
Publication #:
|
|
Pub Dt:
|
02/16/2006
| | | | |
Title:
|
SIGNAL-SEGREGATING CONNECTOR SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
11182484
|
Filing Dt:
|
07/14/2005
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Publication #:
|
|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
IC PACKAGE STRUCTURES HAVING SEPARATE CIRCUIT INTERCONNECTION STRUCTURES AND ASSEMBLIES CONSTRUCTED THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2010
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Application #:
|
11353564
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Filing Dt:
|
02/13/2006
|
Publication #:
|
|
Pub Dt:
|
07/20/2006
| | | | |
Title:
|
MULTI-SURFACE IC PACKAGING STRUCTURES AND METHODS FOR THEIR MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2008
|
Application #:
|
11381357
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Filing Dt:
|
05/02/2006
|
Publication #:
|
|
Pub Dt:
|
11/02/2006
| | | | |
Title:
|
MEMORY PACKAGES HAVING STAIR STEP INTERCONNECTION LAYERS
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|
|
Patent #:
|
|
Issue Dt:
|
07/29/2008
|
Application #:
|
11607143
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Filing Dt:
|
12/01/2006
|
Publication #:
|
|
Pub Dt:
|
08/02/2007
| | | | |
Title:
|
ELECTRICAL INTERCONNECTION DEVICES INCORPORATING REDUNDANT CONTACT POINTS FOR REDUCING CAPACITIVE STUBS AND IMPROVED SIGNAL INTEGRITY
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|
|
Patent #:
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|
Issue Dt:
|
11/03/2009
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Application #:
|
11748045
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Filing Dt:
|
05/14/2007
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Publication #:
|
|
Pub Dt:
|
10/11/2007
| | | | |
Title:
|
SIGNAL-SEGREGATING CONNECTOR SYSTEM
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|
|
Patent #:
|
|
Issue Dt:
|
01/26/2010
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Application #:
|
11868947
|
Filing Dt:
|
10/08/2007
|
Publication #:
|
|
Pub Dt:
|
04/09/2009
| | | | |
Title:
|
HIGH SPEED, DIRECT PATH, STAIR-STEP, ELECTRONIC CONNECTORS WITH IMPROVED SIGNAL INTEGRITY CHARACTERISTICS AND METHODS FOR THEIR MANUFACTURE
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|
|
Patent #:
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|
Issue Dt:
|
08/02/2011
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Application #:
|
11930217
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Filing Dt:
|
10/31/2007
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Publication #:
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|
Pub Dt:
|
04/30/2009
| | | | |
Title:
|
DIRECT-CONNECT SIGNALING SYSTEM
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|
|
Patent #:
|
|
Issue Dt:
|
06/21/2011
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Application #:
|
11933445
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Filing Dt:
|
11/01/2007
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Publication #:
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|
Pub Dt:
|
05/07/2009
| | | | |
Title:
|
MEMORY SYSTEMS INCLUDING MEMORY DEVICES COUPLED TOGETHER IN A DAISY-CHAINED ARRANGEMENT
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|
Patent #:
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Issue Dt:
|
12/25/2012
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Application #:
|
11939554
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Filing Dt:
|
11/14/2007
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Publication #:
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|
Pub Dt:
|
05/14/2009
| | | | |
Title:
|
CABLED SIGNALING SYSTEM AND COMPONENTS THEREOF
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|
Patent #:
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|
Issue Dt:
|
05/24/2011
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Application #:
|
11965705
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Filing Dt:
|
12/27/2007
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Publication #:
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|
Pub Dt:
|
09/04/2008
| | | | |
Title:
|
MEMORY IC PACKAGE ASSEMBLY HAVING STAIR STEP METAL LAYER AND APERTURES
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Patent #:
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Issue Dt:
|
01/26/2010
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Application #:
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12127195
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Filing Dt:
|
05/27/2008
|
Publication #:
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|
Pub Dt:
|
11/06/2008
| | | | |
Title:
|
ELECTRICAL INTERCONNECTION DEVICES INCORPORATING REDUNDANT CONTACT POINTS FOR REDUCING CAPACITIVE STUBS AND IMPROVED SIGNAL INTEGRITY
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|
Patent #:
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Issue Dt:
|
07/05/2011
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Application #:
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12128620
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Filing Dt:
|
05/29/2008
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Publication #:
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|
Pub Dt:
|
01/29/2009
| | | | |
Title:
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TAPERED DIELECTRIC AND CONDUCTOR STRUCTURES AND APPLICATIONS THEREOF
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
12335372
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Filing Dt:
|
12/15/2008
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Publication #:
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|
Pub Dt:
|
04/09/2009
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGES AND ELECTRICAL ASSEMBLIES HAVING STAIR STEP INTERCONNECTION LAYERS
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Patent #:
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Issue Dt:
|
09/27/2011
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Application #:
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12348273
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Filing Dt:
|
01/02/2009
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Publication #:
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Pub Dt:
|
07/02/2009
| | | | |
Title:
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CONTROLLED IMPEDANCE STRUCTURES FOR HIGH DENSITY INTERCONNECTIONS
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Patent #:
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Issue Dt:
|
06/12/2012
|
Application #:
|
12435812
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Filing Dt:
|
05/05/2009
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Publication #:
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Pub Dt:
|
11/11/2010
| | | | |
Title:
|
ESD PROTECTION UTILIZING RADIATED THERMAL RELIEF
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|
Patent #:
|
NONE
|
Issue Dt:
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|
Application #:
|
12464253
|
Filing Dt:
|
05/12/2009
|
Publication #:
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|
Pub Dt:
|
11/18/2010
| | | | |
Title:
|
Method and Apparatus for Vertical Stacking of Integrated Circuit Chips
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|
|
Patent #:
|
|
Issue Dt:
|
11/08/2011
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Application #:
|
12573724
|
Filing Dt:
|
10/05/2009
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Publication #:
|
|
Pub Dt:
|
04/07/2011
| | | | |
Title:
|
CONNECTION FOR OFF-CHIP ELECTROSTATIC DISCHARGE PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2010
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Application #:
|
12651970
|
Filing Dt:
|
01/04/2010
|
Publication #:
|
|
Pub Dt:
|
05/06/2010
| | | | |
Title:
|
ELECTRICAL INTERCONNECTION DEVICES INCORPORATING REDUNDANT CONTACT POINTS FOR REDUCING CAPACITIVE STUBS AND IMPROVED SIGNAL INTEGRITY
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12692974
|
Filing Dt:
|
01/25/2010
|
Publication #:
|
|
Pub Dt:
|
05/27/2010
| | | | |
Title:
|
Interconnect System without Through-Holes
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
|
Application #:
|
12693097
|
Filing Dt:
|
01/25/2010
|
Publication #:
|
|
Pub Dt:
|
06/17/2010
| | | | |
Title:
|
HIGH SPEED, DIRECT PATH, STAIR-STEP, ELECTRONIC CONNECTORS WITH IMPROVED SIGNAL INTEGRITY CHARACTERISTICS AND METHODS FOR THEIR MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2012
|
Application #:
|
12720110
|
Filing Dt:
|
03/09/2010
|
Publication #:
|
|
Pub Dt:
|
07/01/2010
| | | | |
Title:
|
LOW PROFILE DISCRETE ELECTRONIC COMPONENTS AND APPLICATIONS OF SAME
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12755961
|
Filing Dt:
|
04/07/2010
|
Publication #:
|
|
Pub Dt:
|
10/14/2010
| | | | |
Title:
|
Interconnection of IC Chips by Flex Circuit Superstructure
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2011
|
Application #:
|
12778972
|
Filing Dt:
|
05/12/2010
|
Publication #:
|
|
Pub Dt:
|
09/02/2010
| | | | |
Title:
|
MULTI-SURFACE IC PACKAGING STRUCTURES AND METHODS FOR THEIR MANUFACTURE
|
|