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Patent Assignment Details
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Reel/Frame:025996/0421   Pages: 6
Recorded: 03/22/2011
Attorney Dkt #:6057-58900
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 5
1
Patent #:
NONE
Issue Dt:
Application #:
10690263
Filing Dt:
10/21/2003
Publication #:
Pub Dt:
04/21/2005
Title:
Integrated circuit capable of working with multiple bus interface standards
2
Patent #:
NONE
Issue Dt:
Application #:
10690266
Filing Dt:
05/20/2004
Publication #:
Pub Dt:
11/24/2005
Title:
Integrated circuit with a plurality of host processor family types
3
Patent #:
NONE
Issue Dt:
Application #:
11010548
Filing Dt:
12/13/2004
Publication #:
Pub Dt:
06/02/2005
Title:
Clock generation systems and methods
4
Patent #:
NONE
Issue Dt:
Application #:
11218692
Filing Dt:
09/02/2005
Publication #:
Pub Dt:
03/16/2006
Title:
Low power clocking systems and methods
5
Patent #:
NONE
Issue Dt:
Application #:
11484426
Filing Dt:
07/11/2006
Publication #:
Pub Dt:
11/09/2006
Title:
Integrated CMOS high precision piezo-electrically driven clock
Assignor
1
Exec Dt:
12/07/2010
Assignee
1
2711 CENTERVILLE RD.
SUITE 400
WILMINGTON, DELAWARE 19808
Correspondence name and address
MEYERTONS, HOOD, KIVLIN, KOWERT & GOETZE
1120 SOUTH CAPITAL OF TEXAS HIGHWAY
BUILDING 2, SUITE 300
AUSTIN, TX 78746

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