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Reel/Frame:026445/0017   Pages: 13
Recorded: 06/14/2011
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 48
1
Patent #:
5627784
Issue Dt:
05/06/1997
Application #:
08508923
Filing Dt:
07/28/1995
Title:
MEMORY SYSTEM HAVING NON-VOLATILE DATA STORAGE STRUCTURE FOR MEMORY CONTROL PARAMETERS AND METHOD
2
Patent #:
5880996
Issue Dt:
03/09/1999
Application #:
08850582
Filing Dt:
05/02/1997
Title:
MEMORY SYSTEM HAVING NON-VOLATILE DATA STORAGE STRUCTURE FOR MEMORY CONTROL PARAMETERS AND METHOD
3
Patent #:
7129794
Issue Dt:
10/31/2006
Application #:
10623959
Filing Dt:
07/21/2003
Publication #:
US20050017810
Pub Dt:
01/27/2005
Title:
PHASE DETECTOR FOR REDUCING NOISE
4
Patent #:
7120743
Issue Dt:
10/10/2006
Application #:
10690810
Filing Dt:
10/20/2003
Publication #:
US20050086441
Pub Dt:
04/21/2005
Title:
ARBITRATION SYSTEM AND METHOD FOR MEMORY RESPONSES IN A HUB-BASED MEMORY SYSTEM
5
Patent #:
7006389
Issue Dt:
02/28/2006
Application #:
10734944
Filing Dt:
12/12/2003
Publication #:
US20050128822
Pub Dt:
06/16/2005
Title:
VOLTAGE TRANSLATOR FOR MULTIPLE VOLTAGE OPERATIONS
6
Patent #:
7508722
Issue Dt:
03/24/2009
Application #:
10765310
Filing Dt:
01/27/2004
Publication #:
US20050165999
Pub Dt:
07/28/2005
Title:
MEMORY DEVICE HAVING STROBE TERMINALS WITH MULTIPLE FUNCTIONS
7
Patent #:
7444559
Issue Dt:
10/28/2008
Application #:
10766386
Filing Dt:
01/28/2004
Publication #:
US20050166110
Pub Dt:
07/28/2005
Title:
GENERATION OF MEMORY TEST PATTERNS FOR DLL CALIBRATION
8
Patent #:
7694202
Issue Dt:
04/06/2010
Application #:
10766611
Filing Dt:
01/28/2004
Publication #:
US20050162948
Pub Dt:
07/28/2005
Title:
PROVIDING MEMORY TEST PATTERNS FOR DLL CALIBRATION
9
Patent #:
7583551
Issue Dt:
09/01/2009
Application #:
10796111
Filing Dt:
03/10/2004
Publication #:
US20050201174
Pub Dt:
09/15/2005
Title:
POWER MANAGEMENT CONTROL AND CONTROLLING MEMORY REFRESH OPERATIONS
10
Patent #:
7082075
Issue Dt:
07/25/2006
Application #:
10804249
Filing Dt:
03/18/2004
Publication #:
US20050207257
Pub Dt:
09/22/2005
Title:
MEMORY DEVICE AND METHOD HAVING BANKS OF DIFFERENT SIZES
11
Patent #:
7120065
Issue Dt:
10/10/2006
Application #:
10816241
Filing Dt:
04/01/2004
Publication #:
US20050219915
Pub Dt:
10/06/2005
Title:
TECHNIQUES FOR IMPLEMENTING ACCURATE OPERATING CURRENT VALUES STORED IN A DATABASE
12
Patent #:
7162567
Issue Dt:
01/09/2007
Application #:
10846988
Filing Dt:
05/14/2004
Publication #:
US20050257005
Pub Dt:
11/17/2005
Title:
MEMORY HUB AND METHOD FOR MEMORY SEQUENCING
13
Patent #:
7289378
Issue Dt:
10/30/2007
Application #:
10921435
Filing Dt:
08/19/2004
Publication #:
US20050219919
Pub Dt:
10/06/2005
Title:
RECONSTRUCTION OF SIGNAL TIMING IN INTEGRATED CIRCUITS
14
Patent #:
7164600
Issue Dt:
01/16/2007
Application #:
11010235
Filing Dt:
12/10/2004
Publication #:
US20060126401
Pub Dt:
06/15/2006
Title:
REDUCING DQ PIN CAPACITANCE IN A MEMORY DEVICE
15
Patent #:
7193927
Issue Dt:
03/20/2007
Application #:
11144229
Filing Dt:
06/02/2005
Publication #:
US20050219917
Pub Dt:
10/06/2005
Title:
MEMORY DEVICE AND METHOD HAVING BANKS OF DIFFERENT SIZES
16
Patent #:
7177223
Issue Dt:
02/13/2007
Application #:
11144230
Filing Dt:
06/02/2005
Publication #:
US20050219918
Pub Dt:
10/06/2005
Title:
MEMORY DEVICE AND METHOD HAVING BANKS OF DIFFERENT SIZES
17
Patent #:
7132898
Issue Dt:
11/07/2006
Application #:
11145648
Filing Dt:
06/06/2005
Publication #:
US20050280456
Pub Dt:
12/22/2005
Title:
PHASE DETECTOR FOR REDUCING NOISE
18
Patent #:
7109807
Issue Dt:
09/19/2006
Application #:
11145664
Filing Dt:
06/06/2005
Publication #:
US20050225368
Pub Dt:
10/13/2005
Title:
PHASE DETECTOR FOR REDUCING NOISE
19
Patent #:
7283418
Issue Dt:
10/16/2007
Application #:
11190270
Filing Dt:
07/26/2005
Publication #:
US20070025173
Pub Dt:
02/01/2007
Title:
MEMORY DEVICE AND METHOD HAVING MULTIPLE ADDRESS, DATA AND COMMAND BUSES
20
Patent #:
7333355
Issue Dt:
02/19/2008
Application #:
11211940
Filing Dt:
08/24/2005
Publication #:
US20060053248
Pub Dt:
03/09/2006
Title:
TECHNIQUES FOR IMPLEMENTING ACCURATE OPERATING CURRENT VALUES STORED IN A DATABASE
21
Patent #:
7227793
Issue Dt:
06/05/2007
Application #:
11297624
Filing Dt:
12/08/2005
Publication #:
US20060087905
Pub Dt:
04/27/2006
Title:
VOLTAGE TRANSLATOR FOR MULTIPLE VOLTAGE OPERATIONS
22
Patent #:
8589643
Issue Dt:
11/19/2013
Application #:
11318356
Filing Dt:
12/22/2005
Publication #:
US20060136683
Pub Dt:
06/22/2006
Title:
ARBITRATION SYSTEM AND METHOD FOR MEMORY RESPONSES IN A HUB-BASED MEMORY SYSTEM
23
Patent #:
7151700
Issue Dt:
12/19/2006
Application #:
11406643
Filing Dt:
04/19/2006
Publication #:
US20060193183
Pub Dt:
08/31/2006
Title:
REDUCING DQ PIN CAPACITANCE IN A MEMORY DEVICE
24
Patent #:
7483315
Issue Dt:
01/27/2009
Application #:
11452773
Filing Dt:
06/14/2006
Publication #:
US20060233025
Pub Dt:
10/19/2006
Title:
TECHNIQUES FOR IMPLEMENTING ACCURATE OPERATING CURRENT VALUES STORED IN A DATABASE
25
Patent #:
7319621
Issue Dt:
01/15/2008
Application #:
11493354
Filing Dt:
07/26/2006
Publication #:
US20070008788
Pub Dt:
01/11/2007
Title:
REDUCING DQ PIN CAPACITANCE IN A MEMORY DEVICE
26
Patent #:
NONE
Issue Dt:
Application #:
11499232
Filing Dt:
08/03/2006
Publication #:
US20060271746
Pub Dt:
11/30/2006
Title:
Arbitration system and method for memory responses in a hub-based memory system
27
Patent #:
7541963
Issue Dt:
06/02/2009
Application #:
11523097
Filing Dt:
09/19/2006
Publication #:
US20070069936
Pub Dt:
03/29/2007
Title:
VARIABLE QUANTIZATION ADC FOR IMAGE SENSORS
28
Patent #:
7463099
Issue Dt:
12/09/2008
Application #:
11524842
Filing Dt:
09/21/2006
Publication #:
US20070013450
Pub Dt:
01/18/2007
Title:
PHASE DETECTOR FOR REDUCING NOISE
29
Patent #:
7483334
Issue Dt:
01/27/2009
Application #:
11527948
Filing Dt:
09/26/2006
Publication #:
US20080080291
Pub Dt:
04/03/2008
Title:
INTERLEAVED INPUT SIGNAL PATH FOR MULTIPLEXED INPUT
30
Patent #:
7353320
Issue Dt:
04/01/2008
Application #:
11580424
Filing Dt:
10/12/2006
Publication #:
US20070033353
Pub Dt:
02/08/2007
Title:
MEMORY HUB AND METHOD FOR MEMORY SEQUENCING
31
Patent #:
7489569
Issue Dt:
02/10/2009
Application #:
11583338
Filing Dt:
10/19/2006
Publication #:
US20070061536
Pub Dt:
03/15/2007
Title:
RECONSTRUCTION OF SIGNAL TIMING IN INTEGRATED CIRCUITS
32
Patent #:
7539062
Issue Dt:
05/26/2009
Application #:
11642334
Filing Dt:
12/20/2006
Publication #:
US20080151637
Pub Dt:
06/26/2008
Title:
INTERLEAVED MEMORY PROGRAM AND VERIFY METHOD, DEVICE AND SYSTEM
33
Patent #:
7525842
Issue Dt:
04/28/2009
Application #:
11657950
Filing Dt:
01/25/2007
Publication #:
US20080181003
Pub Dt:
07/31/2008
Title:
INCREASED NAND FLASH MEMORY READ THROUGHPUT
34
Patent #:
7453746
Issue Dt:
11/18/2008
Application #:
11677429
Filing Dt:
02/21/2007
Publication #:
US20070133321
Pub Dt:
06/14/2007
Title:
RECONSTRUCTION OF SIGNAL TIMING IN INTEGRATED CIRCUITS
35
Patent #:
7483333
Issue Dt:
01/27/2009
Application #:
11705722
Filing Dt:
02/12/2007
Publication #:
US20070280027
Pub Dt:
12/06/2007
Title:
MEMORY DEVICE AND METHOD HAVING BANKS OF DIFFERENT SIZES
36
Patent #:
7548483
Issue Dt:
06/16/2009
Application #:
11900296
Filing Dt:
09/10/2007
Publication #:
US20080043565
Pub Dt:
02/21/2008
Title:
MEMORY DEVICE AND METHOD HAVING MULTIPLE ADDRESS, DATA AND COMMAND BUSES
37
Patent #:
7663901
Issue Dt:
02/16/2010
Application #:
12013266
Filing Dt:
01/11/2008
Publication #:
US20080130343
Pub Dt:
06/05/2008
Title:
TECHNIQUES FOR IMPLEMENTING ACCURATE DEVICE PARAMETERS STORED IN A DATABASE
38
Patent #:
7562178
Issue Dt:
07/14/2009
Application #:
12069197
Filing Dt:
02/08/2008
Publication #:
US20080133853
Pub Dt:
06/05/2008
Title:
MEMORY HUB AND METHOD FOR MEMORY SEQUENCING
39
Patent #:
7639090
Issue Dt:
12/29/2009
Application #:
12324077
Filing Dt:
11/26/2008
Publication #:
US20090079485
Pub Dt:
03/26/2009
Title:
PHASE DETECTOR FOR REDUCING NOISE
40
Patent #:
7613070
Issue Dt:
11/03/2009
Application #:
12336330
Filing Dt:
12/16/2008
Publication #:
US20090097331
Pub Dt:
04/16/2009
Title:
INTERLEAVED INPUT SIGNAL PATH FOR MULTIPLEXED INPUT
41
Patent #:
8619485
Issue Dt:
12/31/2013
Application #:
12367216
Filing Dt:
02/06/2009
Publication #:
US20090147608
Pub Dt:
06/11/2009
Title:
POWER MANAGEMENT CONTROL AND CONTROLLING MEMORY REFRESH OPERATIONS
42
Patent #:
7751260
Issue Dt:
07/06/2010
Application #:
12397181
Filing Dt:
03/03/2009
Publication #:
US20090231936
Pub Dt:
09/17/2009
Title:
MEMORY DEVICE HAVING STROBE TERMINALS WITH MULTIPLE FUNCTIONS
43
Patent #:
7903463
Issue Dt:
03/08/2011
Application #:
12425200
Filing Dt:
04/16/2009
Publication #:
US20090201736
Pub Dt:
08/13/2009
Title:
INCREASED NAND FLASH MEMORY READ THROUGHPUT
44
Patent #:
7808824
Issue Dt:
10/05/2010
Application #:
12471774
Filing Dt:
05/26/2009
Publication #:
US20090231918
Pub Dt:
09/17/2009
Title:
INTERLEAVED MEMORY PROGRAM AND VERIFY METHOD, DEVICE AND SYSTEM
45
Patent #:
8174858
Issue Dt:
05/08/2012
Application #:
12690790
Filing Dt:
01/20/2010
Publication #:
US20100122061
Pub Dt:
05/13/2010
Title:
TECHNIQUES FOR IMPLEMENTING ACCURATE DEVICE PARAMETERS STORED IN A DATABASE
46
Patent #:
7944761
Issue Dt:
05/17/2011
Application #:
12827954
Filing Dt:
06/30/2010
Publication #:
US20100265777
Pub Dt:
10/21/2010
Title:
MEMORY DEVICE HAVING STROBE TERMINALS WITH MULTIPLE FUNCTIONS
47
Patent #:
8004897
Issue Dt:
08/23/2011
Application #:
12870377
Filing Dt:
08/27/2010
Publication #:
US20100322003
Pub Dt:
12/23/2010
Title:
INTERLEAVED MEMORY PROGRAM AND VERIFY METHOD, DEVICE AND SYSTEM
48
Patent #:
8174892
Issue Dt:
05/08/2012
Application #:
13042071
Filing Dt:
03/07/2011
Publication #:
US20110161591
Pub Dt:
06/30/2011
Title:
INCREASED NAND FLASH MEMORY READ THROUGHPUT
Assignor
1
MICRON TECHNOLOGY, INC.
Exec Dt:
05/20/2011
Assignee
1
ROUND ROCK RESEARCH, LLC
26 DEER CREEK LANE
MOUNT KISCO, NEW YORK 10549
Correspondence name and address
RICHARD J. BOTOS
LERNER, DAVID, LITTENBERG, KRUMHOLZ &
MENTLIK, LLP
600 SOUTH AVENUE WEST
WESTFIELD, NJ 07090

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